Lines Matching refs:sccr1_reg
193 u32 *sccr1_reg) in pxa2xx_spi_clear_rx_thre() argument
205 *sccr1_reg &= ~mask; in pxa2xx_spi_clear_rx_thre()
209 u32 *sccr1_reg, u32 threshold) in pxa2xx_spi_set_rx_thre() argument
213 *sccr1_reg |= QUARK_X1000_SSCR1_RxTresh(threshold); in pxa2xx_spi_set_rx_thre()
216 *sccr1_reg |= SSCR1_RxTresh(threshold); in pxa2xx_spi_set_rx_thre()
548 u32 sccr1_reg; in reset_sccr1() local
550 sccr1_reg = pxa2xx_spi_read(drv_data, SSCR1) & ~drv_data->int_cr1; in reset_sccr1()
551 sccr1_reg &= ~SSCR1_RFT; in reset_sccr1()
552 sccr1_reg |= chip->threshold; in reset_sccr1()
553 pxa2xx_spi_write(drv_data, SSCR1, sccr1_reg); in reset_sccr1()
631 u32 sccr1_reg; in interrupt_transfer() local
633 sccr1_reg = pxa2xx_spi_read(drv_data, SSCR1); in interrupt_transfer()
634 sccr1_reg &= ~SSCR1_TIE; in interrupt_transfer()
643 pxa2xx_spi_clear_rx_thre(drv_data, &sccr1_reg); in interrupt_transfer()
657 pxa2xx_spi_set_rx_thre(drv_data, &sccr1_reg, rx_thre); in interrupt_transfer()
659 pxa2xx_spi_write(drv_data, SSCR1, sccr1_reg); in interrupt_transfer()
669 u32 sccr1_reg; in ssp_int() local
692 sccr1_reg = pxa2xx_spi_read(drv_data, SSCR1); in ssp_int()
695 if (!(sccr1_reg & SSCR1_TIE)) in ssp_int()
699 if (!(sccr1_reg & SSCR1_TINTE)) in ssp_int()