90 	struct fsl_spi_reg *reg_base = mspi->reg_base;  in fsl_spi_change_mode()  local
91 	__be32 __iomem *mode = &reg_base->mode;  in fsl_spi_change_mode()
292 	struct fsl_spi_reg *reg_base = mspi->reg_base;  in fsl_spi_cpu_bufs()  local
297 	mpc8xxx_spi_write_reg(&reg_base->mask, SPIM_NE);  in fsl_spi_cpu_bufs()
301 	mpc8xxx_spi_write_reg(&reg_base->transmit, word);  in fsl_spi_cpu_bufs()
310 	struct fsl_spi_reg *reg_base;  in fsl_spi_bufs()  local
315 	reg_base = mpc8xxx_spi->reg_base;  in fsl_spi_bufs()
348 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in fsl_spi_bufs()
425 	struct fsl_spi_reg *reg_base;  in fsl_spi_setup()  local
441 	reg_base = mpc8xxx_spi->reg_base;  in fsl_spi_setup()
444 	cs->hw_mode = mpc8xxx_spi_read_reg(&reg_base->mode);  in fsl_spi_setup()
510 	struct fsl_spi_reg *reg_base = mspi->reg_base;  in fsl_spi_cpu_irq()  local
514 		u32 rx_data = mpc8xxx_spi_read_reg(&reg_base->receive);  in fsl_spi_cpu_irq()
523 			mpc8xxx_spi_read_reg(&reg_base->event)) &  in fsl_spi_cpu_irq()
528 	mpc8xxx_spi_write_reg(&reg_base->event, events);  in fsl_spi_cpu_irq()
534 		mpc8xxx_spi_write_reg(&reg_base->transmit, word);  in fsl_spi_cpu_irq()
545 	struct fsl_spi_reg *reg_base = mspi->reg_base;  in fsl_spi_irq()  local
548 	events = mpc8xxx_spi_read_reg(&reg_base->event);  in fsl_spi_irq()
565 	struct fsl_spi_reg *reg_base = mpc8xxx_spi->reg_base;  in fsl_spi_grlib_cs_control()  local
572 		slvsel = mpc8xxx_spi_read_reg(&reg_base->slvsel);  in fsl_spi_grlib_cs_control()
574 		mpc8xxx_spi_write_reg(&reg_base->slvsel, slvsel);  in fsl_spi_grlib_cs_control()
583 	struct fsl_spi_reg *reg_base = mpc8xxx_spi->reg_base;  in fsl_spi_grlib_probe()  local
587 	capabilities = mpc8xxx_spi_read_reg(&reg_base->cap);  in fsl_spi_grlib_probe()
597 		mpc8xxx_spi_write_reg(&reg_base->slvsel, 0xffffffff);  in fsl_spi_grlib_probe()
609 	struct fsl_spi_reg *reg_base;  in fsl_spi_probe()  local
635 	mpc8xxx_spi->reg_base = devm_ioremap_resource(dev, mem);  in fsl_spi_probe()
636 	if (IS_ERR(mpc8xxx_spi->reg_base)) {  in fsl_spi_probe()
637 		ret = PTR_ERR(mpc8xxx_spi->reg_base);  in fsl_spi_probe()
663 	reg_base = mpc8xxx_spi->reg_base;  in fsl_spi_probe()
666 	mpc8xxx_spi_write_reg(&reg_base->mode, 0);  in fsl_spi_probe()
667 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in fsl_spi_probe()
668 	mpc8xxx_spi_write_reg(&reg_base->command, 0);  in fsl_spi_probe()
669 	mpc8xxx_spi_write_reg(&reg_base->event, 0xffffffff);  in fsl_spi_probe()
680 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in fsl_spi_probe()
686 	dev_info(dev, "at 0x%p (irq = %d), %s mode\n", reg_base,  in fsl_spi_probe()