95 	struct fsl_espi_reg *reg_base = mspi->reg_base;  in fsl_espi_change_mode()  local
96 	__be32 __iomem *mode = &reg_base->csmode[spi->chip_select];  in fsl_espi_change_mode()
97 	__be32 __iomem *espi_mode = &reg_base->mode;  in fsl_espi_change_mode()
206 	struct fsl_espi_reg *reg_base = mspi->reg_base;  in fsl_espi_cpu_bufs()  local
211 	mpc8xxx_spi_write_reg(&reg_base->mask, SPIM_NE);  in fsl_espi_cpu_bufs()
215 	mpc8xxx_spi_write_reg(&reg_base->transmit, word);  in fsl_espi_cpu_bufs()
223 	struct fsl_espi_reg *reg_base = mpc8xxx_spi->reg_base;  in fsl_espi_bufs()  local
241 	mpc8xxx_spi_write_reg(&reg_base->command,  in fsl_espi_bufs()
251 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in fsl_espi_bufs()
472 	struct fsl_espi_reg *reg_base;  in fsl_espi_setup()  local
489 	reg_base = mpc8xxx_spi->reg_base;  in fsl_espi_setup()
495 			&reg_base->csmode[spi->chip_select]);  in fsl_espi_setup()
508 	loop_mode = mpc8xxx_spi_read_reg(&reg_base->mode);  in fsl_espi_setup()
512 	mpc8xxx_spi_write_reg(&reg_base->mode, loop_mode);  in fsl_espi_setup()
536 	struct fsl_espi_reg *reg_base = mspi->reg_base;  in fsl_espi_cpu_irq()  local
546 			events = mpc8xxx_spi_read_reg(&reg_base->event);  in fsl_espi_cpu_irq()
550 			rx_data = mpc8xxx_spi_read_reg(&reg_base->receive);  in fsl_espi_cpu_irq()
555 				rx_data_8 = in_8((u8 *)&reg_base->receive);  in fsl_espi_cpu_irq()
573 				&reg_base->event)) & SPIE_NF), 1000, 0);  in fsl_espi_cpu_irq()
578 			mpc8xxx_spi_write_reg(&reg_base->event, events);  in fsl_espi_cpu_irq()
585 	mpc8xxx_spi_write_reg(&reg_base->event, events);  in fsl_espi_cpu_irq()
591 		mpc8xxx_spi_write_reg(&reg_base->transmit, word);  in fsl_espi_cpu_irq()
600 	struct fsl_espi_reg *reg_base = mspi->reg_base;  in fsl_espi_irq()  local
605 	events = mpc8xxx_spi_read_reg(&reg_base->event);  in fsl_espi_irq()
621 	struct fsl_espi_reg *reg_base = mpc8xxx_spi->reg_base;  in fsl_espi_runtime_suspend()  local
624 	regval = mpc8xxx_spi_read_reg(&reg_base->mode);  in fsl_espi_runtime_suspend()
626 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in fsl_espi_runtime_suspend()
635 	struct fsl_espi_reg *reg_base = mpc8xxx_spi->reg_base;  in fsl_espi_runtime_resume()  local
638 	regval = mpc8xxx_spi_read_reg(&reg_base->mode);  in fsl_espi_runtime_resume()
640 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in fsl_espi_runtime_resume()
652 	struct fsl_espi_reg *reg_base;  in fsl_espi_probe()  local
676 	mpc8xxx_spi->reg_base = devm_ioremap_resource(dev, mem);  in fsl_espi_probe()
677 	if (IS_ERR(mpc8xxx_spi->reg_base)) {  in fsl_espi_probe()
678 		ret = PTR_ERR(mpc8xxx_spi->reg_base);  in fsl_espi_probe()
682 	reg_base = mpc8xxx_spi->reg_base;  in fsl_espi_probe()
696 	mpc8xxx_spi_write_reg(&reg_base->mode, 0);  in fsl_espi_probe()
697 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in fsl_espi_probe()
698 	mpc8xxx_spi_write_reg(&reg_base->command, 0);  in fsl_espi_probe()
699 	mpc8xxx_spi_write_reg(&reg_base->event, 0xffffffff);  in fsl_espi_probe()
724 		mpc8xxx_spi_write_reg(&reg_base->csmode[i], csmode);  in fsl_espi_probe()
732 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in fsl_espi_probe()
744 	dev_info(dev, "at 0x%p (irq = %d)\n", reg_base, mpc8xxx_spi->irq);  in fsl_espi_probe()
850 	struct fsl_espi_reg *reg_base;  in of_fsl_espi_resume()  local
855 	reg_base = mpc8xxx_spi->reg_base;  in of_fsl_espi_resume()
858 	mpc8xxx_spi_write_reg(&reg_base->mode, 0);  in of_fsl_espi_resume()
859 	mpc8xxx_spi_write_reg(&reg_base->mask, 0);  in of_fsl_espi_resume()
860 	mpc8xxx_spi_write_reg(&reg_base->command, 0);  in of_fsl_espi_resume()
861 	mpc8xxx_spi_write_reg(&reg_base->event, 0xffffffff);  in of_fsl_espi_resume()
865 		mpc8xxx_spi_write_reg(&reg_base->csmode[i], CSMODE_INIT_VAL);  in of_fsl_espi_resume()
870 	mpc8xxx_spi_write_reg(&reg_base->mode, regval);  in of_fsl_espi_resume()