Lines Matching refs:drv_data
111 static void adi_spi_enable(struct adi_spi_master *drv_data) in adi_spi_enable() argument
115 ctl = ioread32(&drv_data->regs->control); in adi_spi_enable()
117 iowrite32(ctl, &drv_data->regs->control); in adi_spi_enable()
120 static void adi_spi_disable(struct adi_spi_master *drv_data) in adi_spi_disable() argument
124 ctl = ioread32(&drv_data->regs->control); in adi_spi_disable()
126 iowrite32(ctl, &drv_data->regs->control); in adi_spi_disable()
139 static int adi_spi_flush(struct adi_spi_master *drv_data) in adi_spi_flush() argument
144 while (!(ioread32(&drv_data->regs->status) & SPI_STAT_SPIF) && --limit) in adi_spi_flush()
147 iowrite32(0xFFFFFFFF, &drv_data->regs->status); in adi_spi_flush()
153 static void adi_spi_cs_active(struct adi_spi_master *drv_data, struct adi_spi_device *chip) in adi_spi_cs_active() argument
157 reg = ioread32(&drv_data->regs->ssel); in adi_spi_cs_active()
159 iowrite32(reg, &drv_data->regs->ssel); in adi_spi_cs_active()
165 static void adi_spi_cs_deactive(struct adi_spi_master *drv_data, in adi_spi_cs_deactive() argument
170 reg = ioread32(&drv_data->regs->ssel); in adi_spi_cs_deactive()
172 iowrite32(reg, &drv_data->regs->ssel); in adi_spi_cs_deactive()
183 static inline void adi_spi_cs_enable(struct adi_spi_master *drv_data, in adi_spi_cs_enable() argument
188 reg = ioread32(&drv_data->regs->ssel); in adi_spi_cs_enable()
190 iowrite32(reg, &drv_data->regs->ssel); in adi_spi_cs_enable()
194 static inline void adi_spi_cs_disable(struct adi_spi_master *drv_data, in adi_spi_cs_disable() argument
199 reg = ioread32(&drv_data->regs->ssel); in adi_spi_cs_disable()
201 iowrite32(reg, &drv_data->regs->ssel); in adi_spi_cs_disable()
206 static void adi_spi_restore_state(struct adi_spi_master *drv_data) in adi_spi_restore_state() argument
208 struct adi_spi_device *chip = drv_data->cur_chip; in adi_spi_restore_state()
211 iowrite32(0xFFFFFFFF, &drv_data->regs->status); in adi_spi_restore_state()
212 iowrite32(0x0, &drv_data->regs->rx_control); in adi_spi_restore_state()
213 iowrite32(0x0, &drv_data->regs->tx_control); in adi_spi_restore_state()
214 adi_spi_disable(drv_data); in adi_spi_restore_state()
217 iowrite32(chip->control, &drv_data->regs->control); in adi_spi_restore_state()
218 iowrite32(chip->clock, &drv_data->regs->clock); in adi_spi_restore_state()
220 adi_spi_enable(drv_data); in adi_spi_restore_state()
221 drv_data->tx_num = drv_data->rx_num = 0; in adi_spi_restore_state()
223 iowrite32(SPI_RXCTL_REN, &drv_data->regs->rx_control); in adi_spi_restore_state()
224 iowrite32(SPI_TXCTL_TEN | SPI_TXCTL_TTI, &drv_data->regs->tx_control); in adi_spi_restore_state()
225 adi_spi_cs_active(drv_data, chip); in adi_spi_restore_state()
229 static inline void dummy_read(struct adi_spi_master *drv_data) in dummy_read() argument
231 while (!(ioread32(&drv_data->regs->status) & SPI_STAT_RFE)) in dummy_read()
232 ioread32(&drv_data->regs->rfifo); in dummy_read()
235 static void adi_spi_u8_write(struct adi_spi_master *drv_data) in adi_spi_u8_write() argument
237 dummy_read(drv_data); in adi_spi_u8_write()
238 while (drv_data->tx < drv_data->tx_end) { in adi_spi_u8_write()
239 iowrite32(*(u8 *)(drv_data->tx++), &drv_data->regs->tfifo); in adi_spi_u8_write()
240 while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) in adi_spi_u8_write()
242 ioread32(&drv_data->regs->rfifo); in adi_spi_u8_write()
246 static void adi_spi_u8_read(struct adi_spi_master *drv_data) in adi_spi_u8_read() argument
248 u32 tx_val = drv_data->cur_chip->tx_dummy_val; in adi_spi_u8_read()
250 dummy_read(drv_data); in adi_spi_u8_read()
251 while (drv_data->rx < drv_data->rx_end) { in adi_spi_u8_read()
252 iowrite32(tx_val, &drv_data->regs->tfifo); in adi_spi_u8_read()
253 while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) in adi_spi_u8_read()
255 *(u8 *)(drv_data->rx++) = ioread32(&drv_data->regs->rfifo); in adi_spi_u8_read()
259 static void adi_spi_u8_duplex(struct adi_spi_master *drv_data) in adi_spi_u8_duplex() argument
261 dummy_read(drv_data); in adi_spi_u8_duplex()
262 while (drv_data->rx < drv_data->rx_end) { in adi_spi_u8_duplex()
263 iowrite32(*(u8 *)(drv_data->tx++), &drv_data->regs->tfifo); in adi_spi_u8_duplex()
264 while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) in adi_spi_u8_duplex()
266 *(u8 *)(drv_data->rx++) = ioread32(&drv_data->regs->rfifo); in adi_spi_u8_duplex()
276 static void adi_spi_u16_write(struct adi_spi_master *drv_data) in adi_spi_u16_write() argument
278 dummy_read(drv_data); in adi_spi_u16_write()
279 while (drv_data->tx < drv_data->tx_end) { in adi_spi_u16_write()
280 iowrite32(*(u16 *)drv_data->tx, &drv_data->regs->tfifo); in adi_spi_u16_write()
281 drv_data->tx += 2; in adi_spi_u16_write()
282 while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) in adi_spi_u16_write()
284 ioread32(&drv_data->regs->rfifo); in adi_spi_u16_write()
288 static void adi_spi_u16_read(struct adi_spi_master *drv_data) in adi_spi_u16_read() argument
290 u32 tx_val = drv_data->cur_chip->tx_dummy_val; in adi_spi_u16_read()
292 dummy_read(drv_data); in adi_spi_u16_read()
293 while (drv_data->rx < drv_data->rx_end) { in adi_spi_u16_read()
294 iowrite32(tx_val, &drv_data->regs->tfifo); in adi_spi_u16_read()
295 while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) in adi_spi_u16_read()
297 *(u16 *)drv_data->rx = ioread32(&drv_data->regs->rfifo); in adi_spi_u16_read()
298 drv_data->rx += 2; in adi_spi_u16_read()
302 static void adi_spi_u16_duplex(struct adi_spi_master *drv_data) in adi_spi_u16_duplex() argument
304 dummy_read(drv_data); in adi_spi_u16_duplex()
305 while (drv_data->rx < drv_data->rx_end) { in adi_spi_u16_duplex()
306 iowrite32(*(u16 *)drv_data->tx, &drv_data->regs->tfifo); in adi_spi_u16_duplex()
307 drv_data->tx += 2; in adi_spi_u16_duplex()
308 while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) in adi_spi_u16_duplex()
310 *(u16 *)drv_data->rx = ioread32(&drv_data->regs->rfifo); in adi_spi_u16_duplex()
311 drv_data->rx += 2; in adi_spi_u16_duplex()
321 static void adi_spi_u32_write(struct adi_spi_master *drv_data) in adi_spi_u32_write() argument
323 dummy_read(drv_data); in adi_spi_u32_write()
324 while (drv_data->tx < drv_data->tx_end) { in adi_spi_u32_write()
325 iowrite32(*(u32 *)drv_data->tx, &drv_data->regs->tfifo); in adi_spi_u32_write()
326 drv_data->tx += 4; in adi_spi_u32_write()
327 while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) in adi_spi_u32_write()
329 ioread32(&drv_data->regs->rfifo); in adi_spi_u32_write()
333 static void adi_spi_u32_read(struct adi_spi_master *drv_data) in adi_spi_u32_read() argument
335 u32 tx_val = drv_data->cur_chip->tx_dummy_val; in adi_spi_u32_read()
337 dummy_read(drv_data); in adi_spi_u32_read()
338 while (drv_data->rx < drv_data->rx_end) { in adi_spi_u32_read()
339 iowrite32(tx_val, &drv_data->regs->tfifo); in adi_spi_u32_read()
340 while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) in adi_spi_u32_read()
342 *(u32 *)drv_data->rx = ioread32(&drv_data->regs->rfifo); in adi_spi_u32_read()
343 drv_data->rx += 4; in adi_spi_u32_read()
347 static void adi_spi_u32_duplex(struct adi_spi_master *drv_data) in adi_spi_u32_duplex() argument
349 dummy_read(drv_data); in adi_spi_u32_duplex()
350 while (drv_data->rx < drv_data->rx_end) { in adi_spi_u32_duplex()
351 iowrite32(*(u32 *)drv_data->tx, &drv_data->regs->tfifo); in adi_spi_u32_duplex()
352 drv_data->tx += 4; in adi_spi_u32_duplex()
353 while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) in adi_spi_u32_duplex()
355 *(u32 *)drv_data->rx = ioread32(&drv_data->regs->rfifo); in adi_spi_u32_duplex()
356 drv_data->rx += 4; in adi_spi_u32_duplex()
384 static void adi_spi_giveback(struct adi_spi_master *drv_data) in adi_spi_giveback() argument
386 struct adi_spi_device *chip = drv_data->cur_chip; in adi_spi_giveback()
388 adi_spi_cs_deactive(drv_data, chip); in adi_spi_giveback()
389 spi_finalize_current_message(drv_data->master); in adi_spi_giveback()
439 static int adi_spi_dma_xfer(struct adi_spi_master *drv_data) in adi_spi_dma_xfer() argument
441 struct spi_transfer *t = drv_data->cur_transfer; in adi_spi_dma_xfer()
442 struct spi_message *msg = drv_data->cur_msg; in adi_spi_dma_xfer()
443 struct adi_spi_device *chip = drv_data->cur_chip; in adi_spi_dma_xfer()
451 word_count = drv_data->transfer_len; in adi_spi_dma_xfer()
456 word_count = drv_data->transfer_len / 2; in adi_spi_dma_xfer()
461 word_count = drv_data->transfer_len / 4; in adi_spi_dma_xfer()
466 if (!drv_data->rx) { in adi_spi_dma_xfer()
467 tx_buf = drv_data->tx; in adi_spi_dma_xfer()
468 rx_buf = &drv_data->dummy_buffer; in adi_spi_dma_xfer()
469 drv_data->tx_dma_size = drv_data->transfer_len; in adi_spi_dma_xfer()
470 drv_data->rx_dma_size = sizeof(drv_data->dummy_buffer); in adi_spi_dma_xfer()
471 set_dma_x_modify(drv_data->tx_dma, word_size); in adi_spi_dma_xfer()
472 set_dma_x_modify(drv_data->rx_dma, 0); in adi_spi_dma_xfer()
473 } else if (!drv_data->tx) { in adi_spi_dma_xfer()
474 drv_data->dummy_buffer = chip->tx_dummy_val; in adi_spi_dma_xfer()
475 tx_buf = &drv_data->dummy_buffer; in adi_spi_dma_xfer()
476 rx_buf = drv_data->rx; in adi_spi_dma_xfer()
477 drv_data->tx_dma_size = sizeof(drv_data->dummy_buffer); in adi_spi_dma_xfer()
478 drv_data->rx_dma_size = drv_data->transfer_len; in adi_spi_dma_xfer()
479 set_dma_x_modify(drv_data->tx_dma, 0); in adi_spi_dma_xfer()
480 set_dma_x_modify(drv_data->rx_dma, word_size); in adi_spi_dma_xfer()
482 tx_buf = drv_data->tx; in adi_spi_dma_xfer()
483 rx_buf = drv_data->rx; in adi_spi_dma_xfer()
484 drv_data->tx_dma_size = drv_data->rx_dma_size in adi_spi_dma_xfer()
485 = drv_data->transfer_len; in adi_spi_dma_xfer()
486 set_dma_x_modify(drv_data->tx_dma, word_size); in adi_spi_dma_xfer()
487 set_dma_x_modify(drv_data->rx_dma, word_size); in adi_spi_dma_xfer()
490 drv_data->tx_dma_addr = dma_map_single(&msg->spi->dev, in adi_spi_dma_xfer()
492 drv_data->tx_dma_size, in adi_spi_dma_xfer()
495 drv_data->tx_dma_addr)) in adi_spi_dma_xfer()
498 drv_data->rx_dma_addr = dma_map_single(&msg->spi->dev, in adi_spi_dma_xfer()
500 drv_data->rx_dma_size, in adi_spi_dma_xfer()
503 drv_data->rx_dma_addr)) { in adi_spi_dma_xfer()
505 drv_data->tx_dma_addr, in adi_spi_dma_xfer()
506 drv_data->tx_dma_size, in adi_spi_dma_xfer()
511 dummy_read(drv_data); in adi_spi_dma_xfer()
512 set_dma_x_count(drv_data->tx_dma, word_count); in adi_spi_dma_xfer()
513 set_dma_x_count(drv_data->rx_dma, word_count); in adi_spi_dma_xfer()
514 set_dma_start_addr(drv_data->tx_dma, drv_data->tx_dma_addr); in adi_spi_dma_xfer()
515 set_dma_start_addr(drv_data->rx_dma, drv_data->rx_dma_addr); in adi_spi_dma_xfer()
517 set_dma_config(drv_data->tx_dma, dma_config); in adi_spi_dma_xfer()
518 set_dma_config(drv_data->rx_dma, dma_config | WNR); in adi_spi_dma_xfer()
519 enable_dma(drv_data->tx_dma); in adi_spi_dma_xfer()
520 enable_dma(drv_data->rx_dma); in adi_spi_dma_xfer()
523 &drv_data->regs->rx_control); in adi_spi_dma_xfer()
525 &drv_data->regs->tx_control); in adi_spi_dma_xfer()
530 static int adi_spi_pio_xfer(struct adi_spi_master *drv_data) in adi_spi_pio_xfer() argument
532 struct spi_message *msg = drv_data->cur_msg; in adi_spi_pio_xfer()
534 if (!drv_data->rx) { in adi_spi_pio_xfer()
536 drv_data->ops->write(drv_data); in adi_spi_pio_xfer()
537 if (drv_data->tx != drv_data->tx_end) in adi_spi_pio_xfer()
539 } else if (!drv_data->tx) { in adi_spi_pio_xfer()
541 drv_data->ops->read(drv_data); in adi_spi_pio_xfer()
542 if (drv_data->rx != drv_data->rx_end) in adi_spi_pio_xfer()
546 drv_data->ops->duplex(drv_data); in adi_spi_pio_xfer()
547 if (drv_data->tx != drv_data->tx_end) in adi_spi_pio_xfer()
551 if (!adi_spi_flush(drv_data)) in adi_spi_pio_xfer()
553 msg->actual_length += drv_data->transfer_len; in adi_spi_pio_xfer()
554 tasklet_schedule(&drv_data->pump_transfers); in adi_spi_pio_xfer()
560 struct adi_spi_master *drv_data = (struct adi_spi_master *)data; in adi_spi_pump_transfers() local
567 msg = drv_data->cur_msg; in adi_spi_pump_transfers()
568 t = drv_data->cur_transfer; in adi_spi_pump_transfers()
569 chip = drv_data->cur_chip; in adi_spi_pump_transfers()
572 if (drv_data->state == ERROR_STATE) { in adi_spi_pump_transfers()
574 adi_spi_giveback(drv_data); in adi_spi_pump_transfers()
578 if (drv_data->state == RUNNING_STATE) { in adi_spi_pump_transfers()
582 adi_spi_cs_deactive(drv_data, chip); in adi_spi_pump_transfers()
583 adi_spi_next_transfer(drv_data); in adi_spi_pump_transfers()
584 t = drv_data->cur_transfer; in adi_spi_pump_transfers()
587 if (drv_data->state == DONE_STATE) { in adi_spi_pump_transfers()
589 adi_spi_giveback(drv_data); in adi_spi_pump_transfers()
595 tasklet_schedule(&drv_data->pump_transfers); in adi_spi_pump_transfers()
599 ret = adi_spi_setup_transfer(drv_data); in adi_spi_pump_transfers()
602 adi_spi_giveback(drv_data); in adi_spi_pump_transfers()
605 iowrite32(0xFFFFFFFF, &drv_data->regs->status); in adi_spi_pump_transfers()
606 adi_spi_cs_active(drv_data, chip); in adi_spi_pump_transfers()
607 drv_data->state = RUNNING_STATE; in adi_spi_pump_transfers()
610 ret = adi_spi_dma_xfer(drv_data); in adi_spi_pump_transfers()
612 ret = adi_spi_pio_xfer(drv_data); in adi_spi_pump_transfers()
615 adi_spi_giveback(drv_data); in adi_spi_pump_transfers()
622 struct adi_spi_master *drv_data = spi_master_get_devdata(master); in adi_spi_transfer_one_message() local
624 drv_data->cur_msg = m; in adi_spi_transfer_one_message()
625 drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi); in adi_spi_transfer_one_message()
626 adi_spi_restore_state(drv_data); in adi_spi_transfer_one_message()
628 drv_data->state = START_STATE; in adi_spi_transfer_one_message()
629 drv_data->cur_transfer = list_entry(drv_data->cur_msg->transfers.next, in adi_spi_transfer_one_message()
632 tasklet_schedule(&drv_data->pump_transfers); in adi_spi_transfer_one_message()
654 struct adi_spi_master *drv_data = spi_master_get_devdata(spi->master); in adi_spi_setup() local
712 chip->clock = hz_to_spi_clock(drv_data->sclk, spi->max_speed_hz); in adi_spi_setup()
714 adi_spi_cs_enable(drv_data, chip); in adi_spi_setup()
715 adi_spi_cs_deactive(drv_data, chip); in adi_spi_setup()
730 struct adi_spi_master *drv_data = spi_master_get_devdata(spi->master); in adi_spi_cleanup() local
738 adi_spi_cs_disable(drv_data, chip); in adi_spi_cleanup()
749 struct adi_spi_master *drv_data = dev_id; in adi_spi_tx_dma_isr() local
750 u32 dma_stat = get_dma_curr_irqstat(drv_data->tx_dma); in adi_spi_tx_dma_isr()
753 clear_dma_irqstat(drv_data->tx_dma); in adi_spi_tx_dma_isr()
755 drv_data->tx_num++; in adi_spi_tx_dma_isr()
757 dev_err(&drv_data->master->dev, in adi_spi_tx_dma_isr()
759 if (drv_data->tx) in adi_spi_tx_dma_isr()
760 drv_data->state = ERROR_STATE; in adi_spi_tx_dma_isr()
762 tx_ctl = ioread32(&drv_data->regs->tx_control); in adi_spi_tx_dma_isr()
764 iowrite32(tx_ctl, &drv_data->regs->tx_control); in adi_spi_tx_dma_isr()
770 struct adi_spi_master *drv_data = dev_id; in adi_spi_rx_dma_isr() local
771 struct spi_message *msg = drv_data->cur_msg; in adi_spi_rx_dma_isr()
772 u32 dma_stat = get_dma_curr_irqstat(drv_data->rx_dma); in adi_spi_rx_dma_isr()
774 clear_dma_irqstat(drv_data->rx_dma); in adi_spi_rx_dma_isr()
776 drv_data->rx_num++; in adi_spi_rx_dma_isr()
778 if (drv_data->state != ERROR_STATE) in adi_spi_rx_dma_isr()
779 msg->actual_length += drv_data->transfer_len; in adi_spi_rx_dma_isr()
781 drv_data->state = ERROR_STATE; in adi_spi_rx_dma_isr()
782 dev_err(&drv_data->master->dev, in adi_spi_rx_dma_isr()
785 iowrite32(0, &drv_data->regs->tx_control); in adi_spi_rx_dma_isr()
786 iowrite32(0, &drv_data->regs->rx_control); in adi_spi_rx_dma_isr()
787 if (drv_data->rx_num != drv_data->tx_num) in adi_spi_rx_dma_isr()
788 dev_dbg(&drv_data->master->dev, in adi_spi_rx_dma_isr()
790 drv_data->tx_num, drv_data->rx_num); in adi_spi_rx_dma_isr()
791 tasklet_schedule(&drv_data->pump_transfers); in adi_spi_rx_dma_isr()
800 struct adi_spi_master *drv_data; in adi_spi_probe() local
832 master = spi_alloc_master(dev, sizeof(*drv_data)); in adi_spi_probe()
850 drv_data = spi_master_get_devdata(master); in adi_spi_probe()
851 drv_data->master = master; in adi_spi_probe()
852 drv_data->tx_dma = tx_dma; in adi_spi_probe()
853 drv_data->rx_dma = rx_dma; in adi_spi_probe()
854 drv_data->pin_req = info->pin_req; in adi_spi_probe()
855 drv_data->sclk = clk_get_rate(sclk); in adi_spi_probe()
858 drv_data->regs = devm_ioremap_resource(dev, mem); in adi_spi_probe()
859 if (IS_ERR(drv_data->regs)) { in adi_spi_probe()
860 ret = PTR_ERR(drv_data->regs); in adi_spi_probe()
870 set_dma_callback(tx_dma, adi_spi_tx_dma_isr, drv_data); in adi_spi_probe()
877 set_dma_callback(drv_data->rx_dma, adi_spi_rx_dma_isr, drv_data); in adi_spi_probe()
880 ret = peripheral_request_list(drv_data->pin_req, "adi-spi3"); in adi_spi_probe()
886 iowrite32(SPI_CTL_MSTR | SPI_CTL_CPHA, &drv_data->regs->control); in adi_spi_probe()
887 iowrite32(0x0000FE00, &drv_data->regs->ssel); in adi_spi_probe()
888 iowrite32(0x0, &drv_data->regs->delay); in adi_spi_probe()
890 tasklet_init(&drv_data->pump_transfers, in adi_spi_probe()
891 adi_spi_pump_transfers, (unsigned long)drv_data); in adi_spi_probe()
902 peripheral_free_list(drv_data->pin_req); in adi_spi_probe()
916 struct adi_spi_master *drv_data = spi_master_get_devdata(master); in adi_spi_remove() local
918 adi_spi_disable(drv_data); in adi_spi_remove()
919 peripheral_free_list(drv_data->pin_req); in adi_spi_remove()
920 free_dma(drv_data->rx_dma); in adi_spi_remove()
921 free_dma(drv_data->tx_dma); in adi_spi_remove()
929 struct adi_spi_master *drv_data = spi_master_get_devdata(master); in adi_spi_suspend() local
933 drv_data->control = ioread32(&drv_data->regs->control); in adi_spi_suspend()
934 drv_data->ssel = ioread32(&drv_data->regs->ssel); in adi_spi_suspend()
936 iowrite32(SPI_CTL_MSTR | SPI_CTL_CPHA, &drv_data->regs->control); in adi_spi_suspend()
937 iowrite32(0x0000FE00, &drv_data->regs->ssel); in adi_spi_suspend()
938 dma_disable_irq(drv_data->rx_dma); in adi_spi_suspend()
939 dma_disable_irq(drv_data->tx_dma); in adi_spi_suspend()
947 struct adi_spi_master *drv_data = spi_master_get_devdata(master); in adi_spi_resume() local
951 disable_dma(drv_data->rx_dma); in adi_spi_resume()
953 dma_enable_irq(drv_data->rx_dma); in adi_spi_resume()
954 dma_enable_irq(drv_data->tx_dma); in adi_spi_resume()
955 iowrite32(drv_data->control, &drv_data->regs->control); in adi_spi_resume()
956 iowrite32(drv_data->ssel, &drv_data->regs->ssel); in adi_spi_resume()
960 free_dma(drv_data->rx_dma); in adi_spi_resume()
961 free_dma(drv_data->tx_dma); in adi_spi_resume()