Lines Matching refs:__le32
24 __le32 ext_hw_conf; /* 0x50 R/W */
25 __le32 rsrvd0; /* 0x54 */
26 __le32 port_ctrl; /* 0x58 */
27 __le32 port_status; /* 0x5c */
28 __le32 rsrvd1[32]; /* 0x60-0xdf */
29 __le32 gp_out; /* 0xe0 */
30 __le32 gp_in; /* 0xe4 */
31 __le32 rsrvd2[5]; /* 0xe8-0xfb */
32 __le32 port_err_status; /* 0xfc */
36 __le32 rsrvd0[12]; /* 0x50-0x79 */
37 __le32 req_q_out; /* 0x80 */
38 __le32 rsrvd1[31]; /* 0x84-0xFF */
45 __le32 req_q_out; /* 0x0000 (R): Request Queue out-Pointer. */
46 __le32 reserve1[63]; /* Request Queue out-Pointer. (64 * 4) */
47 __le32 rsp_q_in; /* 0x0100 (R/W): Response Queue In-Pointer. */
48 __le32 reserve2[63]; /* Response Queue In-Pointer. */
49 __le32 rsp_q_out; /* 0x0200 (R/W): Response Queue Out-Pointer. */
50 __le32 reserve3[63]; /* Response Queue Out-Pointer. */
52 __le32 mailbox_in[8]; /* 0x0300 (R/W): Mail box In registers */
53 __le32 reserve4[24];
54 __le32 hint; /* 0x0380 (R/W): Host interrupt register */
56 __le32 reserve5[31];
57 __le32 mailbox_out[8]; /* 0x0400 (R): Mail box Out registers */
58 __le32 reserve6[56];
60 __le32 host_status; /* Offset 0x500 (R): host status */
64 __le32 host_int; /* Offset 0x0504 (R/W): Interrupt status. */
70 __le32 mailbox_in[16]; /* 0x0000 */
71 __le32 reserve1[496]; /* 0x0040 */
72 __le32 mailbox_out[16]; /* 0x0800 */
73 __le32 reserve2[496];
74 __le32 mbox_int; /* 0x1000 */
75 __le32 reserve3[63];
76 __le32 req_q_out; /* 0x1100 */
77 __le32 reserve4[63];
79 __le32 rsp_q_in; /* 0x1200 */
80 __le32 reserve5[1919];
82 __le32 req_q_in; /* 0x3000 */
83 __le32 reserve6[3];
84 __le32 iocb_int_mask; /* 0x3010 */
85 __le32 reserve7[3];
86 __le32 rsp_q_out; /* 0x3020 */
87 __le32 reserve8[3];
88 __le32 anonymousbuff; /* 0x3030 */
89 __le32 mb_int_mask; /* 0x3034 */
91 __le32 host_intr; /* 0x3038 - Host Interrupt Register */
92 __le32 risc_intr; /* 0x303C - RISC Interrupt Register */
93 __le32 reserve9[544];
94 __le32 leg_int_ptr; /* 0x38C0 - Legacy Interrupt Pointer Register */
95 __le32 leg_int_trig; /* 0x38C4 - Legacy Interrupt Trigger Control */
96 __le32 leg_int_mask; /* 0x38C8 - Legacy Interrupt Mask Register */
105 __le32 mailbox[MBOX_REG_COUNT];
107 __le32 flash_address; /* 0x20 */
108 __le32 flash_data;
109 __le32 ctrl_status;
113 __le32 nvram;
114 __le32 reserved1[2]; /* 0x30 */
117 __le32 intr_mask;
118 __le32 nvram; /* 0x30 */
119 __le32 semaphore;
123 __le32 req_q_in; /* SCSI Request Queue Producer Index */
124 __le32 rsp_q_out; /* SCSI Completion Queue Consumer Index */
126 __le32 reserved2[4]; /* 0x40 */
130 __le32 ext_hw_conf; /* 0x50 */
131 __le32 flow_ctrl;
132 __le32 port_ctrl;
133 __le32 port_status;
135 __le32 reserved3[8]; /* 0x60 */
137 __le32 req_q_out; /* 0x80 */
139 __le32 reserved4[23]; /* 0x84 */
141 __le32 gp_out; /* 0xe0 */
142 __le32 gp_in;
144 __le32 reserved5[5];
146 __le32 port_err_status; /* 0xfc */
252 __le32 req_q_out; /* 0 x0 R */
255 __le32 rsp_q_in; /* 4 x4 R */
265 __le32 bReserved0:1;
266 __le32 bSDRAMProtectionMethod:2;
267 __le32 bSDRAMBanks:1;
268 __le32 bSDRAMChipWidth:1;
269 __le32 bSDRAMChipSize:2;
270 __le32 bParityDisable:1;
271 __le32 bExternalMemoryType:1;
272 __le32 bFlashBIOSWriteEnable:1;
273 __le32 bFlashUpperBankSelect:1;
274 __le32 bWriteBurst:2;
275 __le32 bReserved1:3;
276 __le32 bMask:16;