Lines Matching refs:ha
322 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req, in qla2x00_alloc_queues() argument
325 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla2x00_alloc_queues()
326 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues, in qla2x00_alloc_queues()
328 if (!ha->req_q_map) { in qla2x00_alloc_queues()
334 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues, in qla2x00_alloc_queues()
336 if (!ha->rsp_q_map) { in qla2x00_alloc_queues()
345 ha->rsp_q_map[0] = rsp; in qla2x00_alloc_queues()
346 ha->req_q_map[0] = req; in qla2x00_alloc_queues()
347 set_bit(0, ha->rsp_qid_map); in qla2x00_alloc_queues()
348 set_bit(0, ha->req_qid_map); in qla2x00_alloc_queues()
352 kfree(ha->req_q_map); in qla2x00_alloc_queues()
353 ha->req_q_map = NULL; in qla2x00_alloc_queues()
358 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req) in qla2x00_free_req_que() argument
360 if (IS_QLAFX00(ha)) { in qla2x00_free_req_que()
362 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_req_que()
366 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_req_que()
377 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp) in qla2x00_free_rsp_que() argument
379 if (IS_QLAFX00(ha)) { in qla2x00_free_rsp_que()
381 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_rsp_que()
385 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_rsp_que()
393 static void qla2x00_free_queues(struct qla_hw_data *ha) in qla2x00_free_queues() argument
399 for (cnt = 0; cnt < ha->max_req_queues; cnt++) { in qla2x00_free_queues()
400 if (!test_bit(cnt, ha->req_qid_map)) in qla2x00_free_queues()
403 req = ha->req_q_map[cnt]; in qla2x00_free_queues()
404 qla2x00_free_req_que(ha, req); in qla2x00_free_queues()
406 kfree(ha->req_q_map); in qla2x00_free_queues()
407 ha->req_q_map = NULL; in qla2x00_free_queues()
409 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) { in qla2x00_free_queues()
410 if (!test_bit(cnt, ha->rsp_qid_map)) in qla2x00_free_queues()
413 rsp = ha->rsp_q_map[cnt]; in qla2x00_free_queues()
414 qla2x00_free_rsp_que(ha, rsp); in qla2x00_free_queues()
416 kfree(ha->rsp_q_map); in qla2x00_free_queues()
417 ha->rsp_q_map = NULL; in qla2x00_free_queues()
424 struct qla_hw_data *ha = vha->hw; in qla25xx_setup_mode() local
426 if (!(ha->fw_attributes & BIT_6)) { in qla25xx_setup_mode()
434 req = qla25xx_create_req_que(ha, options, 0, 0, -1, in qla25xx_setup_mode()
441 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1); in qla25xx_setup_mode()
442 vha->req = ha->req_q_map[req]; in qla25xx_setup_mode()
444 for (ques = 1; ques < ha->max_rsp_queues; ques++) { in qla25xx_setup_mode()
445 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req); in qla25xx_setup_mode()
452 ha->flags.cpu_affinity_enabled = 1; in qla25xx_setup_mode()
456 ha->max_rsp_queues, ha->max_req_queues); in qla25xx_setup_mode()
460 ha->max_rsp_queues, ha->max_req_queues); in qla25xx_setup_mode()
465 destroy_workqueue(ha->wq); in qla25xx_setup_mode()
466 ha->wq = NULL; in qla25xx_setup_mode()
467 vha->req = ha->req_q_map[0]; in qla25xx_setup_mode()
469 ha->mqenable = 0; in qla25xx_setup_mode()
470 kfree(ha->req_q_map); in qla25xx_setup_mode()
471 kfree(ha->rsp_q_map); in qla25xx_setup_mode()
472 ha->max_req_queues = ha->max_rsp_queues = 1; in qla25xx_setup_mode()
479 struct qla_hw_data *ha = vha->hw; in qla2x00_pci_info_str() local
486 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9; in qla2x00_pci_info_str()
491 pci_bus = (ha->pci_attr & BIT_8) >> 8; in qla2x00_pci_info_str()
504 struct qla_hw_data *ha = vha->hw; in qla24xx_pci_info_str() local
507 if (pci_is_pcie(ha->pdev)) { in qla24xx_pci_info_str()
511 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat); in qla24xx_pci_info_str()
537 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8; in qla24xx_pci_info_str()
559 struct qla_hw_data *ha = vha->hw; in qla2x00_fw_version_str() local
561 snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version, in qla2x00_fw_version_str()
562 ha->fw_minor_version, ha->fw_subminor_version); in qla2x00_fw_version_str()
564 if (ha->fw_attributes & BIT_9) { in qla2x00_fw_version_str()
569 switch (ha->fw_attributes & 0xFF) { in qla2x00_fw_version_str()
583 sprintf(un_str, "(%x)", ha->fw_attributes); in qla2x00_fw_version_str()
587 if (ha->fw_attributes & 0x100) in qla2x00_fw_version_str()
596 struct qla_hw_data *ha = vha->hw; in qla24xx_fw_version_str() local
598 snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version, in qla24xx_fw_version_str()
599 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes); in qla24xx_fw_version_str()
608 struct qla_hw_data *ha = sp->fcport->vha->hw; in qla2x00_sp_free_dma() local
617 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd), in qla2x00_sp_free_dma()
624 qla2x00_clean_dsd_pool(ha, sp, NULL); in qla2x00_sp_free_dma()
629 dma_pool_free(ha->dl_dma_pool, ctx, in qla2x00_sp_free_dma()
637 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd, in qla2x00_sp_free_dma()
639 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list); in qla2x00_sp_free_dma()
640 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt; in qla2x00_sp_free_dma()
641 ha->gbl_dsd_avail += ctx1->dsd_use_cnt; in qla2x00_sp_free_dma()
642 mempool_free(ctx1, ha->ctx_mempool); in qla2x00_sp_free_dma()
653 struct qla_hw_data *ha = (struct qla_hw_data *)data; in qla2x00_sp_compl() local
670 qla2x00_sp_free_dma(ha, sp); in qla2x00_sp_compl()
683 struct qla_hw_data *ha = vha->hw; in qla2xxx_queuecommand() local
684 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla2xxx_queuecommand()
688 if (ha->flags.eeh_busy) { in qla2xxx_queuecommand()
689 if (ha->flags.pci_channel_io_perm_failure) { in qla2xxx_queuecommand()
760 rval = ha->isp_ops->start_scsi(sp); in qla2xxx_queuecommand()
770 qla2x00_sp_free_dma(ha, sp); in qla2xxx_queuecommand()
803 struct qla_hw_data *ha = vha->hw; in qla2x00_eh_wait_on_command() local
806 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) { in qla2x00_eh_wait_on_command()
843 struct qla_hw_data *ha = vha->hw; in qla2x00_wait_for_hba_online() local
844 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla2x00_wait_for_hba_online()
850 ha->dpc_active) && time_before(jiffies, wait_online)) { in qla2x00_wait_for_hba_online()
877 struct qla_hw_data *ha = vha->hw; in qla2x00_wait_for_hba_ready() local
879 while (((qla2x00_reset_active(vha)) || ha->dpc_active || in qla2x00_wait_for_hba_ready()
880 ha->flags.mbox_busy) || in qla2x00_wait_for_hba_ready()
891 struct qla_hw_data *ha = vha->hw; in qla2x00_wait_for_chip_reset() local
892 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla2x00_wait_for_chip_reset()
898 ha->dpc_active) && time_before(jiffies, wait_reset)) { in qla2x00_wait_for_chip_reset()
903 ha->flags.chip_reset_done) in qla2x00_wait_for_chip_reset()
906 if (ha->flags.chip_reset_done) in qla2x00_wait_for_chip_reset()
945 struct qla_hw_data *ha = vha->hw; in qla2xxx_eh_abort() local
958 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2xxx_eh_abort()
961 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2xxx_eh_abort()
972 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2xxx_eh_abort()
973 rval = ha->isp_ops->abort_command(sp); in qla2xxx_eh_abort()
988 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2xxx_eh_abort()
989 sp->done(ha, sp, 0); in qla2xxx_eh_abort()
990 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2xxx_eh_abort()
1018 struct qla_hw_data *ha = vha->hw; in qla2x00_eh_wait_for_pending_commands() local
1025 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_eh_wait_for_pending_commands()
1053 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_eh_wait_for_pending_commands()
1055 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_eh_wait_for_pending_commands()
1057 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_eh_wait_for_pending_commands()
1128 struct qla_hw_data *ha = vha->hw; in qla2xxx_eh_device_reset() local
1131 ha->isp_ops->lun_reset); in qla2xxx_eh_device_reset()
1138 struct qla_hw_data *ha = vha->hw; in qla2xxx_eh_target_reset() local
1141 ha->isp_ops->target_reset); in qla2xxx_eh_target_reset()
1230 struct qla_hw_data *ha = vha->hw; in qla2xxx_eh_host_reset() local
1234 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla2xxx_eh_host_reset()
1246 if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING) in qla2xxx_eh_host_reset()
1261 if (ha->wq) in qla2xxx_eh_host_reset()
1262 flush_workqueue(ha->wq); in qla2xxx_eh_host_reset()
1265 if (ha->isp_ops->abort_isp(base_vha)) { in qla2xxx_eh_host_reset()
1307 struct qla_hw_data *ha = vha->hw; in qla2x00_loop_reset() local
1309 if (IS_QLAFX00(ha)) { in qla2x00_loop_reset()
1313 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) { in qla2x00_loop_reset()
1318 ret = ha->isp_ops->target_reset(fcport, 0, 0); in qla2x00_loop_reset()
1328 if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) { in qla2x00_loop_reset()
1339 if (ha->flags.enable_lip_reset) { in qla2x00_loop_reset()
1358 struct qla_hw_data *ha = vha->hw; in qla2x00_abort_all_cmds() local
1361 qlt_host_reset_handler(ha); in qla2x00_abort_all_cmds()
1363 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_abort_all_cmds()
1364 for (que = 0; que < ha->max_req_queues; que++) { in qla2x00_abort_all_cmds()
1365 req = ha->req_q_map[que]; in qla2x00_abort_all_cmds()
1378 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_abort_all_cmds()
1421 qla2x00_config_dma_addressing(struct qla_hw_data *ha) in qla2x00_config_dma_addressing() argument
1424 ha->flags.enable_64bit_addressing = 0; in qla2x00_config_dma_addressing()
1426 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) { in qla2x00_config_dma_addressing()
1428 if (MSD(dma_get_required_mask(&ha->pdev->dev)) && in qla2x00_config_dma_addressing()
1429 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) { in qla2x00_config_dma_addressing()
1431 ha->flags.enable_64bit_addressing = 1; in qla2x00_config_dma_addressing()
1432 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64; in qla2x00_config_dma_addressing()
1433 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64; in qla2x00_config_dma_addressing()
1438 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32)); in qla2x00_config_dma_addressing()
1439 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32)); in qla2x00_config_dma_addressing()
1443 qla2x00_enable_intrs(struct qla_hw_data *ha) in qla2x00_enable_intrs() argument
1446 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_enable_intrs()
1448 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_enable_intrs()
1449 ha->interrupts_on = 1; in qla2x00_enable_intrs()
1453 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_enable_intrs()
1458 qla2x00_disable_intrs(struct qla_hw_data *ha) in qla2x00_disable_intrs() argument
1461 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_disable_intrs()
1463 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_disable_intrs()
1464 ha->interrupts_on = 0; in qla2x00_disable_intrs()
1468 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_disable_intrs()
1472 qla24xx_enable_intrs(struct qla_hw_data *ha) in qla24xx_enable_intrs() argument
1475 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_enable_intrs()
1477 spin_lock_irqsave(&ha->hardware_lock, flags); in qla24xx_enable_intrs()
1478 ha->interrupts_on = 1; in qla24xx_enable_intrs()
1481 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla24xx_enable_intrs()
1485 qla24xx_disable_intrs(struct qla_hw_data *ha) in qla24xx_disable_intrs() argument
1488 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_disable_intrs()
1490 if (IS_NOPOLLING_TYPE(ha)) in qla24xx_disable_intrs()
1492 spin_lock_irqsave(&ha->hardware_lock, flags); in qla24xx_disable_intrs()
1493 ha->interrupts_on = 0; in qla24xx_disable_intrs()
1496 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla24xx_disable_intrs()
1500 qla2x00_iospace_config(struct qla_hw_data *ha) in qla2x00_iospace_config() argument
1506 if (pci_request_selected_regions(ha->pdev, ha->bars, in qla2x00_iospace_config()
1508 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011, in qla2x00_iospace_config()
1510 pci_name(ha->pdev)); in qla2x00_iospace_config()
1513 if (!(ha->bars & 1)) in qla2x00_iospace_config()
1517 pio = pci_resource_start(ha->pdev, 0); in qla2x00_iospace_config()
1518 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) { in qla2x00_iospace_config()
1519 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) { in qla2x00_iospace_config()
1520 ql_log_pci(ql_log_warn, ha->pdev, 0x0012, in qla2x00_iospace_config()
1522 pci_name(ha->pdev)); in qla2x00_iospace_config()
1526 ql_log_pci(ql_log_warn, ha->pdev, 0x0013, in qla2x00_iospace_config()
1528 pci_name(ha->pdev)); in qla2x00_iospace_config()
1531 ha->pio_address = pio; in qla2x00_iospace_config()
1532 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014, in qla2x00_iospace_config()
1534 (unsigned long long)ha->pio_address); in qla2x00_iospace_config()
1538 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) { in qla2x00_iospace_config()
1539 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015, in qla2x00_iospace_config()
1541 pci_name(ha->pdev)); in qla2x00_iospace_config()
1544 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) { in qla2x00_iospace_config()
1545 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016, in qla2x00_iospace_config()
1547 pci_name(ha->pdev)); in qla2x00_iospace_config()
1551 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN); in qla2x00_iospace_config()
1552 if (!ha->iobase) { in qla2x00_iospace_config()
1553 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017, in qla2x00_iospace_config()
1555 pci_name(ha->pdev)); in qla2x00_iospace_config()
1560 ha->max_req_queues = ha->max_rsp_queues = 1; in qla2x00_iospace_config()
1563 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))) in qla2x00_iospace_config()
1566 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3), in qla2x00_iospace_config()
1567 pci_resource_len(ha->pdev, 3)); in qla2x00_iospace_config()
1568 if (ha->mqiobase) { in qla2x00_iospace_config()
1569 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018, in qla2x00_iospace_config()
1570 "MQIO Base=%p.\n", ha->mqiobase); in qla2x00_iospace_config()
1572 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix); in qla2x00_iospace_config()
1573 ha->msix_count = msix; in qla2x00_iospace_config()
1578 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ? in qla2x00_iospace_config()
1579 (cpus + 1) : (ha->msix_count - 1); in qla2x00_iospace_config()
1580 ha->max_req_queues = 2; in qla2x00_iospace_config()
1582 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ? in qla2x00_iospace_config()
1584 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008, in qla2x00_iospace_config()
1586 ha->max_req_queues); in qla2x00_iospace_config()
1587 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019, in qla2x00_iospace_config()
1589 ha->max_req_queues); in qla2x00_iospace_config()
1591 ql_log_pci(ql_log_info, ha->pdev, 0x001a, in qla2x00_iospace_config()
1594 ql_log_pci(ql_log_info, ha->pdev, 0x001b, in qla2x00_iospace_config()
1598 ha->msix_count = ha->max_rsp_queues + 1; in qla2x00_iospace_config()
1599 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c, in qla2x00_iospace_config()
1600 "MSIX Count:%d.\n", ha->msix_count); in qla2x00_iospace_config()
1609 qla83xx_iospace_config(struct qla_hw_data *ha) in qla83xx_iospace_config() argument
1614 if (pci_request_selected_regions(ha->pdev, ha->bars, in qla83xx_iospace_config()
1616 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117, in qla83xx_iospace_config()
1618 pci_name(ha->pdev)); in qla83xx_iospace_config()
1624 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { in qla83xx_iospace_config()
1625 ql_log_pci(ql_log_warn, ha->pdev, 0x0118, in qla83xx_iospace_config()
1627 pci_name(ha->pdev)); in qla83xx_iospace_config()
1630 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) { in qla83xx_iospace_config()
1631 ql_log_pci(ql_log_warn, ha->pdev, 0x0119, in qla83xx_iospace_config()
1633 pci_name(ha->pdev)); in qla83xx_iospace_config()
1637 ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN); in qla83xx_iospace_config()
1638 if (!ha->iobase) { in qla83xx_iospace_config()
1639 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a, in qla83xx_iospace_config()
1641 pci_name(ha->pdev)); in qla83xx_iospace_config()
1648 ha->max_req_queues = ha->max_rsp_queues = 1; in qla83xx_iospace_config()
1649 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4), in qla83xx_iospace_config()
1650 pci_resource_len(ha->pdev, 4)); in qla83xx_iospace_config()
1652 if (!ha->mqiobase) { in qla83xx_iospace_config()
1653 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d, in qla83xx_iospace_config()
1658 ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2), in qla83xx_iospace_config()
1659 pci_resource_len(ha->pdev, 2)); in qla83xx_iospace_config()
1660 if (ha->msixbase) { in qla83xx_iospace_config()
1662 pci_read_config_word(ha->pdev, in qla83xx_iospace_config()
1664 ha->msix_count = msix; in qla83xx_iospace_config()
1669 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ? in qla83xx_iospace_config()
1670 (cpus + 1) : (ha->msix_count - 1); in qla83xx_iospace_config()
1671 ha->max_req_queues = 2; in qla83xx_iospace_config()
1673 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ? in qla83xx_iospace_config()
1675 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c, in qla83xx_iospace_config()
1677 ha->max_req_queues); in qla83xx_iospace_config()
1678 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b, in qla83xx_iospace_config()
1680 ha->max_req_queues); in qla83xx_iospace_config()
1682 ql_log_pci(ql_log_info, ha->pdev, 0x011c, in qla83xx_iospace_config()
1685 ql_log_pci(ql_log_info, ha->pdev, 0x011e, in qla83xx_iospace_config()
1689 ha->msix_count = ha->max_rsp_queues + 1; in qla83xx_iospace_config()
1691 qlt_83xx_iospace_config(ha); in qla83xx_iospace_config()
1693 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f, in qla83xx_iospace_config()
1694 "MSIX Count:%d.\n", ha->msix_count); in qla83xx_iospace_config()
2082 qla2x00_set_isp_flags(struct qla_hw_data *ha) in qla2x00_set_isp_flags() argument
2084 ha->device_type = DT_EXTENDED_IDS; in qla2x00_set_isp_flags()
2085 switch (ha->pdev->device) { in qla2x00_set_isp_flags()
2087 ha->device_type |= DT_ISP2100; in qla2x00_set_isp_flags()
2088 ha->device_type &= ~DT_EXTENDED_IDS; in qla2x00_set_isp_flags()
2089 ha->fw_srisc_address = RISC_START_ADDRESS_2100; in qla2x00_set_isp_flags()
2092 ha->device_type |= DT_ISP2200; in qla2x00_set_isp_flags()
2093 ha->device_type &= ~DT_EXTENDED_IDS; in qla2x00_set_isp_flags()
2094 ha->fw_srisc_address = RISC_START_ADDRESS_2100; in qla2x00_set_isp_flags()
2097 ha->device_type |= DT_ISP2300; in qla2x00_set_isp_flags()
2098 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2099 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2102 ha->device_type |= DT_ISP2312; in qla2x00_set_isp_flags()
2103 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2104 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2107 ha->device_type |= DT_ISP2322; in qla2x00_set_isp_flags()
2108 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2109 if (ha->pdev->subsystem_vendor == 0x1028 && in qla2x00_set_isp_flags()
2110 ha->pdev->subsystem_device == 0x0170) in qla2x00_set_isp_flags()
2111 ha->device_type |= DT_OEM_001; in qla2x00_set_isp_flags()
2112 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2115 ha->device_type |= DT_ISP6312; in qla2x00_set_isp_flags()
2116 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2119 ha->device_type |= DT_ISP6322; in qla2x00_set_isp_flags()
2120 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2123 ha->device_type |= DT_ISP2422; in qla2x00_set_isp_flags()
2124 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2125 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2126 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2127 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2130 ha->device_type |= DT_ISP2432; in qla2x00_set_isp_flags()
2131 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2132 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2133 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2134 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2137 ha->device_type |= DT_ISP8432; in qla2x00_set_isp_flags()
2138 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2139 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2140 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2141 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2144 ha->device_type |= DT_ISP5422; in qla2x00_set_isp_flags()
2145 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2146 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2149 ha->device_type |= DT_ISP5432; in qla2x00_set_isp_flags()
2150 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2151 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2154 ha->device_type |= DT_ISP2532; in qla2x00_set_isp_flags()
2155 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2156 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2157 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2158 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2161 ha->device_type |= DT_ISP8001; in qla2x00_set_isp_flags()
2162 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2163 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2164 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2165 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2168 ha->device_type |= DT_ISP8021; in qla2x00_set_isp_flags()
2169 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2170 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2171 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2173 qla82xx_init_flags(ha); in qla2x00_set_isp_flags()
2176 ha->device_type |= DT_ISP8044; in qla2x00_set_isp_flags()
2177 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2178 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2179 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2181 qla82xx_init_flags(ha); in qla2x00_set_isp_flags()
2184 ha->device_type |= DT_ISP2031; in qla2x00_set_isp_flags()
2185 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2186 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2187 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2188 ha->device_type |= DT_T10_PI; in qla2x00_set_isp_flags()
2189 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2192 ha->device_type |= DT_ISP8031; in qla2x00_set_isp_flags()
2193 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2194 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2195 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2196 ha->device_type |= DT_T10_PI; in qla2x00_set_isp_flags()
2197 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2200 ha->device_type |= DT_ISPFX00; in qla2x00_set_isp_flags()
2203 ha->device_type |= DT_ISP2071; in qla2x00_set_isp_flags()
2204 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2205 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2206 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2207 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2210 ha->device_type |= DT_ISP2271; in qla2x00_set_isp_flags()
2211 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2212 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2213 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2214 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2217 ha->device_type |= DT_ISP2261; in qla2x00_set_isp_flags()
2218 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2219 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2220 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2221 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2225 if (IS_QLA82XX(ha)) in qla2x00_set_isp_flags()
2226 ha->port_no = ha->portnum & 1; in qla2x00_set_isp_flags()
2229 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no); in qla2x00_set_isp_flags()
2230 if (IS_QLA27XX(ha)) in qla2x00_set_isp_flags()
2231 ha->port_no--; in qla2x00_set_isp_flags()
2233 ha->port_no = !(ha->port_no & 1); in qla2x00_set_isp_flags()
2236 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b, in qla2x00_set_isp_flags()
2238 ha->device_type, ha->port_no, ha->fw_srisc_address); in qla2x00_set_isp_flags()
2277 struct qla_hw_data *ha; in qla2x00_probe_one() local
2321 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL); in qla2x00_probe_one()
2322 if (!ha) { in qla2x00_probe_one()
2328 "Memory allocated for ha=%p.\n", ha); in qla2x00_probe_one()
2329 ha->pdev = pdev; in qla2x00_probe_one()
2330 ha->tgt.enable_class_2 = ql2xenableclass2; in qla2x00_probe_one()
2331 INIT_LIST_HEAD(&ha->tgt.q_full_list); in qla2x00_probe_one()
2332 spin_lock_init(&ha->tgt.q_full_lock); in qla2x00_probe_one()
2335 ha->bars = bars; in qla2x00_probe_one()
2336 ha->mem_only = mem_only; in qla2x00_probe_one()
2337 spin_lock_init(&ha->hardware_lock); in qla2x00_probe_one()
2338 spin_lock_init(&ha->vport_slock); in qla2x00_probe_one()
2339 mutex_init(&ha->selflogin_lock); in qla2x00_probe_one()
2340 mutex_init(&ha->optrom_mutex); in qla2x00_probe_one()
2343 qla2x00_set_isp_flags(ha); in qla2x00_probe_one()
2346 if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) || in qla2x00_probe_one()
2347 IS_QLA83XX(ha) || IS_QLA27XX(ha)) in qla2x00_probe_one()
2350 ha->prev_topology = 0; in qla2x00_probe_one()
2351 ha->init_cb_size = sizeof(init_cb_t); in qla2x00_probe_one()
2352 ha->link_data_rate = PORT_SPEED_UNKNOWN; in qla2x00_probe_one()
2353 ha->optrom_size = OPTROM_SIZE_2300; in qla2x00_probe_one()
2356 if (IS_QLA2100(ha)) { in qla2x00_probe_one()
2357 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100; in qla2x00_probe_one()
2358 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100; in qla2x00_probe_one()
2361 ha->max_loop_id = SNS_LAST_LOOP_ID_2100; in qla2x00_probe_one()
2362 ha->gid_list_info_size = 4; in qla2x00_probe_one()
2363 ha->flash_conf_off = ~0; in qla2x00_probe_one()
2364 ha->flash_data_off = ~0; in qla2x00_probe_one()
2365 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2366 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2367 ha->isp_ops = &qla2100_isp_ops; in qla2x00_probe_one()
2368 } else if (IS_QLA2200(ha)) { in qla2x00_probe_one()
2369 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100; in qla2x00_probe_one()
2370 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200; in qla2x00_probe_one()
2373 ha->max_loop_id = SNS_LAST_LOOP_ID_2100; in qla2x00_probe_one()
2374 ha->gid_list_info_size = 4; in qla2x00_probe_one()
2375 ha->flash_conf_off = ~0; in qla2x00_probe_one()
2376 ha->flash_data_off = ~0; in qla2x00_probe_one()
2377 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2378 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2379 ha->isp_ops = &qla2100_isp_ops; in qla2x00_probe_one()
2380 } else if (IS_QLA23XX(ha)) { in qla2x00_probe_one()
2381 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100; in qla2x00_probe_one()
2382 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2385 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2386 ha->gid_list_info_size = 6; in qla2x00_probe_one()
2387 if (IS_QLA2322(ha) || IS_QLA6322(ha)) in qla2x00_probe_one()
2388 ha->optrom_size = OPTROM_SIZE_2322; in qla2x00_probe_one()
2389 ha->flash_conf_off = ~0; in qla2x00_probe_one()
2390 ha->flash_data_off = ~0; in qla2x00_probe_one()
2391 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2392 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2393 ha->isp_ops = &qla2300_isp_ops; in qla2x00_probe_one()
2394 } else if (IS_QLA24XX_TYPE(ha)) { in qla2x00_probe_one()
2395 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2396 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2399 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
2400 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2401 ha->init_cb_size = sizeof(struct mid_init_cb_24xx); in qla2x00_probe_one()
2402 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2403 ha->optrom_size = OPTROM_SIZE_24XX; in qla2x00_probe_one()
2404 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX; in qla2x00_probe_one()
2405 ha->isp_ops = &qla24xx_isp_ops; in qla2x00_probe_one()
2406 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; in qla2x00_probe_one()
2407 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; in qla2x00_probe_one()
2408 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; in qla2x00_probe_one()
2409 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; in qla2x00_probe_one()
2410 } else if (IS_QLA25XX(ha)) { in qla2x00_probe_one()
2411 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2412 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2415 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
2416 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2417 ha->init_cb_size = sizeof(struct mid_init_cb_24xx); in qla2x00_probe_one()
2418 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2419 ha->optrom_size = OPTROM_SIZE_25XX; in qla2x00_probe_one()
2420 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2421 ha->isp_ops = &qla25xx_isp_ops; in qla2x00_probe_one()
2422 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; in qla2x00_probe_one()
2423 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; in qla2x00_probe_one()
2424 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; in qla2x00_probe_one()
2425 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; in qla2x00_probe_one()
2426 } else if (IS_QLA81XX(ha)) { in qla2x00_probe_one()
2427 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2428 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2431 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
2432 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2433 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
2434 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2435 ha->optrom_size = OPTROM_SIZE_81XX; in qla2x00_probe_one()
2436 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2437 ha->isp_ops = &qla81xx_isp_ops; in qla2x00_probe_one()
2438 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; in qla2x00_probe_one()
2439 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; in qla2x00_probe_one()
2440 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2441 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2442 } else if (IS_QLA82XX(ha)) { in qla2x00_probe_one()
2443 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2444 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2447 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2448 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
2449 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2450 ha->optrom_size = OPTROM_SIZE_82XX; in qla2x00_probe_one()
2451 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2452 ha->isp_ops = &qla82xx_isp_ops; in qla2x00_probe_one()
2453 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; in qla2x00_probe_one()
2454 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; in qla2x00_probe_one()
2455 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; in qla2x00_probe_one()
2456 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; in qla2x00_probe_one()
2457 } else if (IS_QLA8044(ha)) { in qla2x00_probe_one()
2458 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2459 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2462 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2463 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
2464 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2465 ha->optrom_size = OPTROM_SIZE_83XX; in qla2x00_probe_one()
2466 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2467 ha->isp_ops = &qla8044_isp_ops; in qla2x00_probe_one()
2468 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; in qla2x00_probe_one()
2469 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; in qla2x00_probe_one()
2470 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; in qla2x00_probe_one()
2471 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; in qla2x00_probe_one()
2472 } else if (IS_QLA83XX(ha)) { in qla2x00_probe_one()
2473 ha->portnum = PCI_FUNC(ha->pdev->devfn); in qla2x00_probe_one()
2474 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2475 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2478 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
2479 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2480 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
2481 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2482 ha->optrom_size = OPTROM_SIZE_83XX; in qla2x00_probe_one()
2483 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2484 ha->isp_ops = &qla83xx_isp_ops; in qla2x00_probe_one()
2485 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; in qla2x00_probe_one()
2486 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; in qla2x00_probe_one()
2487 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2488 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2489 } else if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
2490 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00; in qla2x00_probe_one()
2491 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00; in qla2x00_probe_one()
2492 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00; in qla2x00_probe_one()
2495 ha->isp_ops = &qlafx00_isp_ops; in qla2x00_probe_one()
2496 ha->port_down_retry_count = 30; /* default value */ in qla2x00_probe_one()
2497 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL; in qla2x00_probe_one()
2498 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; in qla2x00_probe_one()
2499 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL; in qla2x00_probe_one()
2500 ha->mr.fw_hbt_en = 1; in qla2x00_probe_one()
2501 ha->mr.host_info_resend = false; in qla2x00_probe_one()
2502 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL; in qla2x00_probe_one()
2503 } else if (IS_QLA27XX(ha)) { in qla2x00_probe_one()
2504 ha->portnum = PCI_FUNC(ha->pdev->devfn); in qla2x00_probe_one()
2505 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2506 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2509 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
2510 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2511 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
2512 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2513 ha->optrom_size = OPTROM_SIZE_83XX; in qla2x00_probe_one()
2514 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2515 ha->isp_ops = &qla27xx_isp_ops; in qla2x00_probe_one()
2516 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; in qla2x00_probe_one()
2517 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; in qla2x00_probe_one()
2518 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2519 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2527 ha->mbx_count, req_length, rsp_length, ha->max_loop_id, in qla2x00_probe_one()
2528 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size, in qla2x00_probe_one()
2529 ha->nvram_npiv_size, ha->max_fibre_devices); in qla2x00_probe_one()
2533 ha->isp_ops, ha->flash_conf_off, ha->flash_data_off, in qla2x00_probe_one()
2534 ha->nvram_conf_off, ha->nvram_data_off); in qla2x00_probe_one()
2537 ret = ha->isp_ops->iospace_config(ha); in qla2x00_probe_one()
2543 pdev->device, pdev->irq, ha->iobase); in qla2x00_probe_one()
2544 mutex_init(&ha->vport_lock); in qla2x00_probe_one()
2545 init_completion(&ha->mbx_cmd_comp); in qla2x00_probe_one()
2546 complete(&ha->mbx_cmd_comp); in qla2x00_probe_one()
2547 init_completion(&ha->mbx_intr_comp); in qla2x00_probe_one()
2548 init_completion(&ha->dcbx_comp); in qla2x00_probe_one()
2549 init_completion(&ha->lb_portup_comp); in qla2x00_probe_one()
2551 set_bit(0, (unsigned long *) ha->vp_idx_map); in qla2x00_probe_one()
2553 qla2x00_config_dma_addressing(ha); in qla2x00_probe_one()
2556 ha->flags.enable_64bit_addressing ? "enable" : in qla2x00_probe_one()
2558 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp); in qla2x00_probe_one()
2571 base_vha = qla2x00_create_host(sht, ha); in qla2x00_probe_one()
2574 qla2x00_mem_free(ha); in qla2x00_probe_one()
2575 qla2x00_free_req_que(ha, req); in qla2x00_probe_one()
2576 qla2x00_free_rsp_que(ha, rsp); in qla2x00_probe_one()
2585 if (IS_QLA2XXX_MIDTYPE(ha)) in qla2x00_probe_one()
2592 ha->mr.fcport.vha = base_vha; in qla2x00_probe_one()
2593 ha->mr.fcport.port_type = FCT_UNKNOWN; in qla2x00_probe_one()
2594 ha->mr.fcport.loop_id = FC_NO_LOOP_ID; in qla2x00_probe_one()
2595 qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED); in qla2x00_probe_one()
2596 ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED; in qla2x00_probe_one()
2597 ha->mr.fcport.scan_state = 1; in qla2x00_probe_one()
2600 if (!IS_FWI2_CAPABLE(ha)) { in qla2x00_probe_one()
2601 if (IS_QLA2100(ha)) in qla2x00_probe_one()
2604 if (!IS_QLA82XX(ha)) in qla2x00_probe_one()
2607 host->max_id = ha->max_fibre_devices; in qla2x00_probe_one()
2610 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) in qla2x00_probe_one()
2616 if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) && in qla2x00_probe_one()
2634 if (!qla2x00_alloc_queues(ha, req, rsp)) { in qla2x00_probe_one()
2641 qlt_probe_one_stage1(base_vha, ha); in qla2x00_probe_one()
2644 ret = qla2x00_request_irqs(ha, rsp); in qla2x00_probe_one()
2654 if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
2655 ha->rsp_q_map[0] = rsp; in qla2x00_probe_one()
2656 ha->req_q_map[0] = req; in qla2x00_probe_one()
2657 set_bit(0, ha->req_qid_map); in qla2x00_probe_one()
2658 set_bit(0, ha->rsp_qid_map); in qla2x00_probe_one()
2662 req->req_q_in = &ha->iobase->isp24.req_q_in; in qla2x00_probe_one()
2663 req->req_q_out = &ha->iobase->isp24.req_q_out; in qla2x00_probe_one()
2664 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in; in qla2x00_probe_one()
2665 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out; in qla2x00_probe_one()
2666 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { in qla2x00_probe_one()
2667 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in; in qla2x00_probe_one()
2668 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out; in qla2x00_probe_one()
2669 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in; in qla2x00_probe_one()
2670 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out; in qla2x00_probe_one()
2673 if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
2674 req->req_q_in = &ha->iobase->ispfx00.req_q_in; in qla2x00_probe_one()
2675 req->req_q_out = &ha->iobase->ispfx00.req_q_out; in qla2x00_probe_one()
2676 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in; in qla2x00_probe_one()
2677 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out; in qla2x00_probe_one()
2680 if (IS_P3P_TYPE(ha)) { in qla2x00_probe_one()
2681 req->req_q_out = &ha->iobase->isp82.req_q_out[0]; in qla2x00_probe_one()
2682 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0]; in qla2x00_probe_one()
2683 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0]; in qla2x00_probe_one()
2688 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp); in qla2x00_probe_one()
2696 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp); in qla2x00_probe_one()
2701 if (ha->isp_ops->initialize_adapter(base_vha)) { in qla2x00_probe_one()
2706 if (IS_QLA82XX(ha)) { in qla2x00_probe_one()
2707 qla82xx_idc_lock(ha); in qla2x00_probe_one()
2708 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla2x00_probe_one()
2710 qla82xx_idc_unlock(ha); in qla2x00_probe_one()
2713 } else if (IS_QLA8044(ha)) { in qla2x00_probe_one()
2714 qla8044_idc_lock(ha); in qla2x00_probe_one()
2718 qla8044_idc_unlock(ha); in qla2x00_probe_one()
2727 if (IS_QLAFX00(ha)) in qla2x00_probe_one()
2737 if (ha->mqenable) { in qla2x00_probe_one()
2745 if (ha->flags.running_gold_fw) in qla2x00_probe_one()
2751 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha, in qla2x00_probe_one()
2753 if (IS_ERR(ha->dpc_thread)) { in qla2x00_probe_one()
2756 ret = PTR_ERR(ha->dpc_thread); in qla2x00_probe_one()
2770 INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error); in qla2x00_probe_one()
2772 if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) { in qla2x00_probe_one()
2774 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name); in qla2x00_probe_one()
2775 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen); in qla2x00_probe_one()
2778 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name); in qla2x00_probe_one()
2779 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work); in qla2x00_probe_one()
2780 INIT_WORK(&ha->idc_state_handler, in qla2x00_probe_one()
2782 INIT_WORK(&ha->nic_core_unrecoverable, in qla2x00_probe_one()
2787 list_add_tail(&base_vha->list, &ha->vp_list); in qla2x00_probe_one()
2788 base_vha->host->irq = ha->pdev->irq; in qla2x00_probe_one()
2797 ha); in qla2x00_probe_one()
2799 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { in qla2x00_probe_one()
2800 if (ha->fw_attributes & BIT_4) { in qla2x00_probe_one()
2817 if (IS_PI_IPGUARD_CAPABLE(ha) && in qla2x00_probe_one()
2818 (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha))) in qla2x00_probe_one()
2826 ha->isp_ops->enable_intrs(ha); in qla2x00_probe_one()
2828 if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
2831 host->sg_tablesize = (ha->mr.extended_io_enabled) ? in qla2x00_probe_one()
2841 ha->prev_minidump_failed = 0; in qla2x00_probe_one()
2854 if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
2868 "QLogic %s - %s.\n", ha->model_number, ha->model_desc); in qla2x00_probe_one()
2871 pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info), in qla2x00_probe_one()
2872 pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-', in qla2x00_probe_one()
2874 ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str))); in qla2x00_probe_one()
2876 qlt_add_target(ha, base_vha); in qla2x00_probe_one()
2882 qla2x00_free_req_que(ha, req); in qla2x00_probe_one()
2883 ha->req_q_map[0] = NULL; in qla2x00_probe_one()
2884 clear_bit(0, ha->req_qid_map); in qla2x00_probe_one()
2885 qla2x00_free_rsp_que(ha, rsp); in qla2x00_probe_one()
2886 ha->rsp_q_map[0] = NULL; in qla2x00_probe_one()
2887 clear_bit(0, ha->rsp_qid_map); in qla2x00_probe_one()
2888 ha->max_req_queues = ha->max_rsp_queues = 0; in qla2x00_probe_one()
2894 if (ha->dpc_thread) { in qla2x00_probe_one()
2895 struct task_struct *t = ha->dpc_thread; in qla2x00_probe_one()
2897 ha->dpc_thread = NULL; in qla2x00_probe_one()
2906 qla2x00_clear_drv_active(ha); in qla2x00_probe_one()
2909 if (IS_P3P_TYPE(ha)) { in qla2x00_probe_one()
2910 if (!ha->nx_pcibase) in qla2x00_probe_one()
2911 iounmap((device_reg_t *)ha->nx_pcibase); in qla2x00_probe_one()
2913 iounmap((device_reg_t *)ha->nxdb_wr_ptr); in qla2x00_probe_one()
2915 if (ha->iobase) in qla2x00_probe_one()
2916 iounmap(ha->iobase); in qla2x00_probe_one()
2917 if (ha->cregbase) in qla2x00_probe_one()
2918 iounmap(ha->cregbase); in qla2x00_probe_one()
2920 pci_release_selected_regions(ha->pdev, ha->bars); in qla2x00_probe_one()
2921 kfree(ha); in qla2x00_probe_one()
2922 ha = NULL; in qla2x00_probe_one()
2933 struct qla_hw_data *ha; in qla2x00_shutdown() local
2939 ha = vha->hw; in qla2x00_shutdown()
2942 if (IS_QLAFX00(ha)) in qla2x00_shutdown()
2946 if (ha->flags.fce_enabled) { in qla2x00_shutdown()
2948 ha->flags.fce_enabled = 0; in qla2x00_shutdown()
2952 if (ha->eft) in qla2x00_shutdown()
2962 if (ha->interrupts_on) { in qla2x00_shutdown()
2964 ha->isp_ops->disable_intrs(ha); in qla2x00_shutdown()
2969 qla2x00_free_fw_dump(ha); in qla2x00_shutdown()
2977 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha) in qla2x00_delete_all_vps() argument
2982 mutex_lock(&ha->vport_lock); in qla2x00_delete_all_vps()
2983 while (ha->cur_vport_count) { in qla2x00_delete_all_vps()
2984 spin_lock_irqsave(&ha->vport_slock, flags); in qla2x00_delete_all_vps()
2986 BUG_ON(base_vha->list.next == &ha->vp_list); in qla2x00_delete_all_vps()
2991 spin_unlock_irqrestore(&ha->vport_slock, flags); in qla2x00_delete_all_vps()
2992 mutex_unlock(&ha->vport_lock); in qla2x00_delete_all_vps()
2997 mutex_lock(&ha->vport_lock); in qla2x00_delete_all_vps()
2999 mutex_unlock(&ha->vport_lock); in qla2x00_delete_all_vps()
3004 qla2x00_destroy_deferred_work(struct qla_hw_data *ha) in qla2x00_destroy_deferred_work() argument
3007 if (ha->wq) { in qla2x00_destroy_deferred_work()
3008 flush_workqueue(ha->wq); in qla2x00_destroy_deferred_work()
3009 destroy_workqueue(ha->wq); in qla2x00_destroy_deferred_work()
3010 ha->wq = NULL; in qla2x00_destroy_deferred_work()
3014 if (ha->dpc_lp_wq) { in qla2x00_destroy_deferred_work()
3015 cancel_work_sync(&ha->idc_aen); in qla2x00_destroy_deferred_work()
3016 destroy_workqueue(ha->dpc_lp_wq); in qla2x00_destroy_deferred_work()
3017 ha->dpc_lp_wq = NULL; in qla2x00_destroy_deferred_work()
3020 if (ha->dpc_hp_wq) { in qla2x00_destroy_deferred_work()
3021 cancel_work_sync(&ha->nic_core_reset); in qla2x00_destroy_deferred_work()
3022 cancel_work_sync(&ha->idc_state_handler); in qla2x00_destroy_deferred_work()
3023 cancel_work_sync(&ha->nic_core_unrecoverable); in qla2x00_destroy_deferred_work()
3024 destroy_workqueue(ha->dpc_hp_wq); in qla2x00_destroy_deferred_work()
3025 ha->dpc_hp_wq = NULL; in qla2x00_destroy_deferred_work()
3029 if (ha->dpc_thread) { in qla2x00_destroy_deferred_work()
3030 struct task_struct *t = ha->dpc_thread; in qla2x00_destroy_deferred_work()
3036 ha->dpc_thread = NULL; in qla2x00_destroy_deferred_work()
3042 qla2x00_unmap_iobases(struct qla_hw_data *ha) in qla2x00_unmap_iobases() argument
3044 if (IS_QLA82XX(ha)) { in qla2x00_unmap_iobases()
3046 iounmap((device_reg_t *)ha->nx_pcibase); in qla2x00_unmap_iobases()
3048 iounmap((device_reg_t *)ha->nxdb_wr_ptr); in qla2x00_unmap_iobases()
3050 if (ha->iobase) in qla2x00_unmap_iobases()
3051 iounmap(ha->iobase); in qla2x00_unmap_iobases()
3053 if (ha->cregbase) in qla2x00_unmap_iobases()
3054 iounmap(ha->cregbase); in qla2x00_unmap_iobases()
3056 if (ha->mqiobase) in qla2x00_unmap_iobases()
3057 iounmap(ha->mqiobase); in qla2x00_unmap_iobases()
3059 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase) in qla2x00_unmap_iobases()
3060 iounmap(ha->msixbase); in qla2x00_unmap_iobases()
3065 qla2x00_clear_drv_active(struct qla_hw_data *ha) in qla2x00_clear_drv_active() argument
3067 if (IS_QLA8044(ha)) { in qla2x00_clear_drv_active()
3068 qla8044_idc_lock(ha); in qla2x00_clear_drv_active()
3069 qla8044_clear_drv_active(ha); in qla2x00_clear_drv_active()
3070 qla8044_idc_unlock(ha); in qla2x00_clear_drv_active()
3071 } else if (IS_QLA82XX(ha)) { in qla2x00_clear_drv_active()
3072 qla82xx_idc_lock(ha); in qla2x00_clear_drv_active()
3073 qla82xx_clear_drv_active(ha); in qla2x00_clear_drv_active()
3074 qla82xx_idc_unlock(ha); in qla2x00_clear_drv_active()
3082 struct qla_hw_data *ha; in qla2x00_remove_one() local
3085 ha = base_vha->hw; in qla2x00_remove_one()
3090 cancel_work_sync(&ha->board_disable); in qla2x00_remove_one()
3099 kfree(ha); in qla2x00_remove_one()
3108 if (IS_QLAFX00(ha)) in qla2x00_remove_one()
3111 qla2x00_delete_all_vps(ha, base_vha); in qla2x00_remove_one()
3113 if (IS_QLA8031(ha)) { in qla2x00_remove_one()
3128 if (IS_QLA2031(ha)) in qla2x00_remove_one()
3137 qla2x00_destroy_deferred_work(ha); in qla2x00_remove_one()
3139 qlt_remove_target(ha, base_vha); in qla2x00_remove_one()
3149 qla2x00_clear_drv_active(ha); in qla2x00_remove_one()
3153 qla2x00_unmap_iobases(ha); in qla2x00_remove_one()
3155 pci_release_selected_regions(ha->pdev, ha->bars); in qla2x00_remove_one()
3156 kfree(ha); in qla2x00_remove_one()
3157 ha = NULL; in qla2x00_remove_one()
3167 struct qla_hw_data *ha = vha->hw; in qla2x00_free_device() local
3177 if (ha->flags.fce_enabled) in qla2x00_free_device()
3180 if (ha->eft) in qla2x00_free_device()
3189 if (ha->interrupts_on) { in qla2x00_free_device()
3191 ha->isp_ops->disable_intrs(ha); in qla2x00_free_device()
3198 qla2x00_mem_free(ha); in qla2x00_free_device()
3202 qla2x00_free_queues(ha); in qla2x00_free_device()
3337 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len, in qla2x00_mem_alloc() argument
3342 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size, in qla2x00_mem_alloc()
3343 &ha->init_cb_dma, GFP_KERNEL); in qla2x00_mem_alloc()
3344 if (!ha->init_cb) in qla2x00_mem_alloc()
3347 if (qlt_mem_alloc(ha) < 0) in qla2x00_mem_alloc()
3350 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
3351 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL); in qla2x00_mem_alloc()
3352 if (!ha->gid_list) in qla2x00_mem_alloc()
3355 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); in qla2x00_mem_alloc()
3356 if (!ha->srb_mempool) in qla2x00_mem_alloc()
3359 if (IS_P3P_TYPE(ha)) { in qla2x00_mem_alloc()
3368 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ, in qla2x00_mem_alloc()
3370 if (!ha->ctx_mempool) in qla2x00_mem_alloc()
3372 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021, in qla2x00_mem_alloc()
3374 ctx_cachep, ha->ctx_mempool); in qla2x00_mem_alloc()
3378 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL); in qla2x00_mem_alloc()
3379 if (!ha->nvram) in qla2x00_mem_alloc()
3383 ha->pdev->device); in qla2x00_mem_alloc()
3384 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev, in qla2x00_mem_alloc()
3386 if (!ha->s_dma_pool) in qla2x00_mem_alloc()
3389 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022, in qla2x00_mem_alloc()
3391 ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool); in qla2x00_mem_alloc()
3393 if (IS_P3P_TYPE(ha) || ql2xenabledif) { in qla2x00_mem_alloc()
3394 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev, in qla2x00_mem_alloc()
3396 if (!ha->dl_dma_pool) { in qla2x00_mem_alloc()
3397 ql_log_pci(ql_log_fatal, ha->pdev, 0x0023, in qla2x00_mem_alloc()
3402 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev, in qla2x00_mem_alloc()
3404 if (!ha->fcp_cmnd_dma_pool) { in qla2x00_mem_alloc()
3405 ql_log_pci(ql_log_fatal, ha->pdev, 0x0024, in qla2x00_mem_alloc()
3409 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025, in qla2x00_mem_alloc()
3411 ha->dl_dma_pool, ha->fcp_cmnd_dma_pool); in qla2x00_mem_alloc()
3415 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { in qla2x00_mem_alloc()
3417 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
3418 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL); in qla2x00_mem_alloc()
3419 if (!ha->sns_cmd) in qla2x00_mem_alloc()
3421 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026, in qla2x00_mem_alloc()
3422 "sns_cmd: %p.\n", ha->sns_cmd); in qla2x00_mem_alloc()
3425 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, in qla2x00_mem_alloc()
3426 &ha->ms_iocb_dma); in qla2x00_mem_alloc()
3427 if (!ha->ms_iocb) in qla2x00_mem_alloc()
3430 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
3431 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL); in qla2x00_mem_alloc()
3432 if (!ha->ct_sns) in qla2x00_mem_alloc()
3434 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027, in qla2x00_mem_alloc()
3436 ha->ms_iocb, ha->ct_sns); in qla2x00_mem_alloc()
3442 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028, in qla2x00_mem_alloc()
3447 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
3451 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029, in qla2x00_mem_alloc()
3458 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a, in qla2x00_mem_alloc()
3462 (*rsp)->hw = ha; in qla2x00_mem_alloc()
3464 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
3468 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b, in qla2x00_mem_alloc()
3474 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c, in qla2x00_mem_alloc()
3480 if (ha->nvram_npiv_size) { in qla2x00_mem_alloc()
3481 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) * in qla2x00_mem_alloc()
3482 ha->nvram_npiv_size, GFP_KERNEL); in qla2x00_mem_alloc()
3483 if (!ha->npiv_info) { in qla2x00_mem_alloc()
3484 ql_log_pci(ql_log_fatal, ha->pdev, 0x002d, in qla2x00_mem_alloc()
3489 ha->npiv_info = NULL; in qla2x00_mem_alloc()
3492 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) { in qla2x00_mem_alloc()
3493 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, in qla2x00_mem_alloc()
3494 &ha->ex_init_cb_dma); in qla2x00_mem_alloc()
3495 if (!ha->ex_init_cb) in qla2x00_mem_alloc()
3497 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e, in qla2x00_mem_alloc()
3498 "ex_init_cb=%p.\n", ha->ex_init_cb); in qla2x00_mem_alloc()
3501 INIT_LIST_HEAD(&ha->gbl_dsd_list); in qla2x00_mem_alloc()
3504 if (!IS_FWI2_CAPABLE(ha)) { in qla2x00_mem_alloc()
3505 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, in qla2x00_mem_alloc()
3506 &ha->async_pd_dma); in qla2x00_mem_alloc()
3507 if (!ha->async_pd) in qla2x00_mem_alloc()
3509 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f, in qla2x00_mem_alloc()
3510 "async_pd=%p.\n", ha->async_pd); in qla2x00_mem_alloc()
3513 INIT_LIST_HEAD(&ha->vp_list); in qla2x00_mem_alloc()
3516 ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long), in qla2x00_mem_alloc()
3518 if (!ha->loop_id_map) in qla2x00_mem_alloc()
3521 qla2x00_set_reserved_loop_ids(ha); in qla2x00_mem_alloc()
3522 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123, in qla2x00_mem_alloc()
3523 "loop_id_map=%p.\n", ha->loop_id_map); in qla2x00_mem_alloc()
3529 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma); in qla2x00_mem_alloc()
3531 kfree(ha->npiv_info); in qla2x00_mem_alloc()
3533 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) * in qla2x00_mem_alloc()
3540 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) * in qla2x00_mem_alloc()
3547 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt), in qla2x00_mem_alloc()
3548 ha->ct_sns, ha->ct_sns_dma); in qla2x00_mem_alloc()
3549 ha->ct_sns = NULL; in qla2x00_mem_alloc()
3550 ha->ct_sns_dma = 0; in qla2x00_mem_alloc()
3552 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); in qla2x00_mem_alloc()
3553 ha->ms_iocb = NULL; in qla2x00_mem_alloc()
3554 ha->ms_iocb_dma = 0; in qla2x00_mem_alloc()
3556 if (IS_QLA82XX(ha) || ql2xenabledif) { in qla2x00_mem_alloc()
3557 dma_pool_destroy(ha->fcp_cmnd_dma_pool); in qla2x00_mem_alloc()
3558 ha->fcp_cmnd_dma_pool = NULL; in qla2x00_mem_alloc()
3561 if (IS_QLA82XX(ha) || ql2xenabledif) { in qla2x00_mem_alloc()
3562 dma_pool_destroy(ha->dl_dma_pool); in qla2x00_mem_alloc()
3563 ha->dl_dma_pool = NULL; in qla2x00_mem_alloc()
3566 dma_pool_destroy(ha->s_dma_pool); in qla2x00_mem_alloc()
3567 ha->s_dma_pool = NULL; in qla2x00_mem_alloc()
3569 kfree(ha->nvram); in qla2x00_mem_alloc()
3570 ha->nvram = NULL; in qla2x00_mem_alloc()
3572 mempool_destroy(ha->ctx_mempool); in qla2x00_mem_alloc()
3573 ha->ctx_mempool = NULL; in qla2x00_mem_alloc()
3575 mempool_destroy(ha->srb_mempool); in qla2x00_mem_alloc()
3576 ha->srb_mempool = NULL; in qla2x00_mem_alloc()
3578 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha), in qla2x00_mem_alloc()
3579 ha->gid_list, in qla2x00_mem_alloc()
3580 ha->gid_list_dma); in qla2x00_mem_alloc()
3581 ha->gid_list = NULL; in qla2x00_mem_alloc()
3582 ha->gid_list_dma = 0; in qla2x00_mem_alloc()
3584 qlt_mem_free(ha); in qla2x00_mem_alloc()
3586 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb, in qla2x00_mem_alloc()
3587 ha->init_cb_dma); in qla2x00_mem_alloc()
3588 ha->init_cb = NULL; in qla2x00_mem_alloc()
3589 ha->init_cb_dma = 0; in qla2x00_mem_alloc()
3604 qla2x00_free_fw_dump(struct qla_hw_data *ha) in qla2x00_free_fw_dump() argument
3606 if (ha->fce) in qla2x00_free_fw_dump()
3607 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_fw_dump()
3608 FCE_SIZE, ha->fce, ha->fce_dma); in qla2x00_free_fw_dump()
3610 if (ha->eft) in qla2x00_free_fw_dump()
3611 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_fw_dump()
3612 EFT_SIZE, ha->eft, ha->eft_dma); in qla2x00_free_fw_dump()
3614 if (ha->fw_dump) in qla2x00_free_fw_dump()
3615 vfree(ha->fw_dump); in qla2x00_free_fw_dump()
3616 if (ha->fw_dump_template) in qla2x00_free_fw_dump()
3617 vfree(ha->fw_dump_template); in qla2x00_free_fw_dump()
3619 ha->fce = NULL; in qla2x00_free_fw_dump()
3620 ha->fce_dma = 0; in qla2x00_free_fw_dump()
3621 ha->eft = NULL; in qla2x00_free_fw_dump()
3622 ha->eft_dma = 0; in qla2x00_free_fw_dump()
3623 ha->fw_dumped = 0; in qla2x00_free_fw_dump()
3624 ha->fw_dump_cap_flags = 0; in qla2x00_free_fw_dump()
3625 ha->fw_dump_reading = 0; in qla2x00_free_fw_dump()
3626 ha->fw_dump = NULL; in qla2x00_free_fw_dump()
3627 ha->fw_dump_len = 0; in qla2x00_free_fw_dump()
3628 ha->fw_dump_template = NULL; in qla2x00_free_fw_dump()
3629 ha->fw_dump_template_len = 0; in qla2x00_free_fw_dump()
3640 qla2x00_mem_free(struct qla_hw_data *ha) in qla2x00_mem_free() argument
3642 qla2x00_free_fw_dump(ha); in qla2x00_mem_free()
3644 if (ha->mctp_dump) in qla2x00_mem_free()
3645 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump, in qla2x00_mem_free()
3646 ha->mctp_dump_dma); in qla2x00_mem_free()
3648 if (ha->srb_mempool) in qla2x00_mem_free()
3649 mempool_destroy(ha->srb_mempool); in qla2x00_mem_free()
3651 if (ha->dcbx_tlv) in qla2x00_mem_free()
3652 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE, in qla2x00_mem_free()
3653 ha->dcbx_tlv, ha->dcbx_tlv_dma); in qla2x00_mem_free()
3655 if (ha->xgmac_data) in qla2x00_mem_free()
3656 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE, in qla2x00_mem_free()
3657 ha->xgmac_data, ha->xgmac_data_dma); in qla2x00_mem_free()
3659 if (ha->sns_cmd) in qla2x00_mem_free()
3660 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt), in qla2x00_mem_free()
3661 ha->sns_cmd, ha->sns_cmd_dma); in qla2x00_mem_free()
3663 if (ha->ct_sns) in qla2x00_mem_free()
3664 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt), in qla2x00_mem_free()
3665 ha->ct_sns, ha->ct_sns_dma); in qla2x00_mem_free()
3667 if (ha->sfp_data) in qla2x00_mem_free()
3668 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma); in qla2x00_mem_free()
3670 if (ha->ms_iocb) in qla2x00_mem_free()
3671 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); in qla2x00_mem_free()
3673 if (ha->ex_init_cb) in qla2x00_mem_free()
3674 dma_pool_free(ha->s_dma_pool, in qla2x00_mem_free()
3675 ha->ex_init_cb, ha->ex_init_cb_dma); in qla2x00_mem_free()
3677 if (ha->async_pd) in qla2x00_mem_free()
3678 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma); in qla2x00_mem_free()
3680 if (ha->s_dma_pool) in qla2x00_mem_free()
3681 dma_pool_destroy(ha->s_dma_pool); in qla2x00_mem_free()
3683 if (ha->gid_list) in qla2x00_mem_free()
3684 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha), in qla2x00_mem_free()
3685 ha->gid_list, ha->gid_list_dma); in qla2x00_mem_free()
3687 if (IS_QLA82XX(ha)) { in qla2x00_mem_free()
3688 if (!list_empty(&ha->gbl_dsd_list)) { in qla2x00_mem_free()
3693 tdsd_ptr, &ha->gbl_dsd_list, list) { in qla2x00_mem_free()
3694 dma_pool_free(ha->dl_dma_pool, in qla2x00_mem_free()
3702 if (ha->dl_dma_pool) in qla2x00_mem_free()
3703 dma_pool_destroy(ha->dl_dma_pool); in qla2x00_mem_free()
3705 if (ha->fcp_cmnd_dma_pool) in qla2x00_mem_free()
3706 dma_pool_destroy(ha->fcp_cmnd_dma_pool); in qla2x00_mem_free()
3708 if (ha->ctx_mempool) in qla2x00_mem_free()
3709 mempool_destroy(ha->ctx_mempool); in qla2x00_mem_free()
3711 qlt_mem_free(ha); in qla2x00_mem_free()
3713 if (ha->init_cb) in qla2x00_mem_free()
3714 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, in qla2x00_mem_free()
3715 ha->init_cb, ha->init_cb_dma); in qla2x00_mem_free()
3716 vfree(ha->optrom_buffer); in qla2x00_mem_free()
3717 kfree(ha->nvram); in qla2x00_mem_free()
3718 kfree(ha->npiv_info); in qla2x00_mem_free()
3719 kfree(ha->swl); in qla2x00_mem_free()
3720 kfree(ha->loop_id_map); in qla2x00_mem_free()
3722 ha->srb_mempool = NULL; in qla2x00_mem_free()
3723 ha->ctx_mempool = NULL; in qla2x00_mem_free()
3724 ha->sns_cmd = NULL; in qla2x00_mem_free()
3725 ha->sns_cmd_dma = 0; in qla2x00_mem_free()
3726 ha->ct_sns = NULL; in qla2x00_mem_free()
3727 ha->ct_sns_dma = 0; in qla2x00_mem_free()
3728 ha->ms_iocb = NULL; in qla2x00_mem_free()
3729 ha->ms_iocb_dma = 0; in qla2x00_mem_free()
3730 ha->init_cb = NULL; in qla2x00_mem_free()
3731 ha->init_cb_dma = 0; in qla2x00_mem_free()
3732 ha->ex_init_cb = NULL; in qla2x00_mem_free()
3733 ha->ex_init_cb_dma = 0; in qla2x00_mem_free()
3734 ha->async_pd = NULL; in qla2x00_mem_free()
3735 ha->async_pd_dma = 0; in qla2x00_mem_free()
3737 ha->s_dma_pool = NULL; in qla2x00_mem_free()
3738 ha->dl_dma_pool = NULL; in qla2x00_mem_free()
3739 ha->fcp_cmnd_dma_pool = NULL; in qla2x00_mem_free()
3741 ha->gid_list = NULL; in qla2x00_mem_free()
3742 ha->gid_list_dma = 0; in qla2x00_mem_free()
3744 ha->tgt.atio_ring = NULL; in qla2x00_mem_free()
3745 ha->tgt.atio_dma = 0; in qla2x00_mem_free()
3746 ha->tgt.tgt_vp_map = NULL; in qla2x00_mem_free()
3750 struct qla_hw_data *ha) in qla2x00_create_host() argument
3757 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107, in qla2x00_create_host()
3768 vha->hw = ha; in qla2x00_create_host()
3783 dev_name(&(ha->pdev->dev))); in qla2x00_create_host()
3995 struct qla_hw_data *ha = vha->hw; in qla2x00_relogin() local
4008 ha->isp_ops->fabric_logout(vha, in qla2x00_relogin()
4016 ha->min_external_loopid; in qla2x00_relogin()
4025 if (IS_ALOGIO_CAPABLE(ha)) { in qla2x00_relogin()
4088 struct qla_hw_data *ha = base_vha->hw; in qla83xx_schedule_work() local
4092 if (ha->dpc_lp_wq) in qla83xx_schedule_work()
4093 queue_work(ha->dpc_lp_wq, &ha->idc_aen); in qla83xx_schedule_work()
4097 if (!ha->flags.nic_core_reset_hdlr_active) { in qla83xx_schedule_work()
4098 if (ha->dpc_hp_wq) in qla83xx_schedule_work()
4099 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset); in qla83xx_schedule_work()
4106 if (ha->dpc_hp_wq) in qla83xx_schedule_work()
4107 queue_work(ha->dpc_hp_wq, &ha->idc_state_handler); in qla83xx_schedule_work()
4110 if (ha->dpc_hp_wq) in qla83xx_schedule_work()
4111 queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable); in qla83xx_schedule_work()
4125 struct qla_hw_data *ha = in qla83xx_nic_core_unrecoverable_work() local
4127 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla83xx_nic_core_unrecoverable_work()
4133 if (ha->flags.nic_core_reset_owner) { in qla83xx_nic_core_unrecoverable_work()
4134 ha->flags.nic_core_reset_owner = 0; in qla83xx_nic_core_unrecoverable_work()
4147 struct qla_hw_data *ha = in qla83xx_idc_state_handler_work() local
4149 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla83xx_idc_state_handler_work()
4193 struct qla_hw_data *ha = in qla83xx_nic_core_reset_work() local
4195 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla83xx_nic_core_reset_work()
4198 if (IS_QLA2031(ha)) { in qla83xx_nic_core_reset_work()
4205 if (!ha->flags.nic_core_reset_hdlr_active) { in qla83xx_nic_core_reset_work()
4218 ha->flags.nic_core_reset_hdlr_active = 1; in qla83xx_nic_core_reset_work()
4224 ha->flags.nic_core_reset_hdlr_active = 0; in qla83xx_nic_core_reset_work()
4232 struct qla_hw_data *ha = in qla83xx_service_idc_aen() local
4234 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla83xx_service_idc_aen()
4285 struct qla_hw_data *ha = base_vha->hw; in qla83xx_force_lock_recovery() local
4296 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2); in qla83xx_force_lock_recovery()
4309 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) { in qla83xx_force_lock_recovery()
4380 struct qla_hw_data *ha = base_vha->hw; in qla83xx_idc_lock() local
4389 ha->portnum); in qla83xx_idc_lock()
4436 struct qla_hw_data *ha = base_vha->hw; in qla83xx_idc_unlock() local
4445 if (data == ha->portnum) { in qla83xx_idc_unlock()
4493 struct qla_hw_data *ha = vha->hw; in __qla83xx_set_drv_presence() local
4498 drv_presence |= (1 << ha->portnum); in __qla83xx_set_drv_presence()
4522 struct qla_hw_data *ha = vha->hw; in __qla83xx_clear_drv_presence() local
4527 drv_presence &= ~(1 << ha->portnum); in __qla83xx_clear_drv_presence()
4550 struct qla_hw_data *ha = vha->hw; in qla83xx_need_reset_handler() local
4555 ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ); in qla83xx_need_reset_handler()
4623 struct qla_hw_data *ha = base_vha->hw; in qla83xx_idc_state_handler() local
4629 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ); in qla83xx_idc_state_handler()
4648 if (ha->flags.nic_core_reset_owner) in qla83xx_idc_state_handler()
4651 ha->flags.nic_core_reset_owner = 0; in qla83xx_idc_state_handler()
4654 ha->portnum); in qla83xx_idc_state_handler()
4657 if (ha->flags.nic_core_reset_owner) in qla83xx_idc_state_handler()
4673 if (!ql2xdontresethba && ha->flags.nic_core_reset_owner) in qla83xx_idc_state_handler()
4683 (ha->fcoe_dev_init_timeout * HZ); in qla83xx_idc_state_handler()
4693 if (ha->flags.quiesce_owner) in qla83xx_idc_state_handler()
4700 (ha->fcoe_dev_init_timeout * HZ); in qla83xx_idc_state_handler()
4703 if (ha->flags.nic_core_reset_owner) in qla83xx_idc_state_handler()
4706 ha->flags.nic_core_reset_owner = 0; in qla83xx_idc_state_handler()
4736 struct qla_hw_data *ha = container_of(work, struct qla_hw_data, in qla2x00_disable_board_on_pci_error() local
4738 struct pci_dev *pdev = ha->pdev; in qla2x00_disable_board_on_pci_error()
4739 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla2x00_disable_board_on_pci_error()
4746 qla2x00_delete_all_vps(ha, base_vha); in qla2x00_disable_board_on_pci_error()
4759 qla2x00_destroy_deferred_work(ha); in qla2x00_disable_board_on_pci_error()
4775 qla2x00_mem_free(ha); in qla2x00_disable_board_on_pci_error()
4777 qla2x00_free_queues(ha); in qla2x00_disable_board_on_pci_error()
4779 qla2x00_unmap_iobases(ha); in qla2x00_disable_board_on_pci_error()
4781 pci_release_selected_regions(ha->pdev, ha->bars); in qla2x00_disable_board_on_pci_error()
4807 struct qla_hw_data *ha; in qla2x00_do_dpc() local
4809 ha = (struct qla_hw_data *)data; in qla2x00_do_dpc()
4810 base_vha = pci_get_drvdata(ha->pdev); in qla2x00_do_dpc()
4821 if (!base_vha->flags.init_done || ha->flags.mbox_busy) in qla2x00_do_dpc()
4824 if (ha->flags.eeh_busy) { in qla2x00_do_dpc()
4826 "eeh_busy=%d.\n", ha->flags.eeh_busy); in qla2x00_do_dpc()
4830 ha->dpc_active = 1; in qla2x00_do_dpc()
4838 if (IS_P3P_TYPE(ha)) { in qla2x00_do_dpc()
4839 if (IS_QLA8044(ha)) { in qla2x00_do_dpc()
4842 qla8044_idc_lock(ha); in qla2x00_do_dpc()
4846 qla8044_idc_unlock(ha); in qla2x00_do_dpc()
4856 qla82xx_idc_lock(ha); in qla2x00_do_dpc()
4857 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla2x00_do_dpc()
4859 qla82xx_idc_unlock(ha); in qla2x00_do_dpc()
4888 } else if (IS_QLAFX00(ha)) { in qla2x00_do_dpc()
4939 if (ha->isp_ops->abort_isp(base_vha)) { in qla2x00_do_dpc()
4967 if (IS_QLAFX00(ha)) in qla2x00_do_dpc()
4973 if (IS_P3P_TYPE(ha)) { in qla2x00_do_dpc()
4974 if (IS_QLA82XX(ha)) in qla2x00_do_dpc()
4976 if (IS_QLA8044(ha)) in qla2x00_do_dpc()
4980 if (!ha->flags.quiesce_owner) { in qla2x00_do_dpc()
4982 if (IS_QLA82XX(ha)) { in qla2x00_do_dpc()
4983 qla82xx_idc_lock(ha); in qla2x00_do_dpc()
4986 qla82xx_idc_unlock(ha); in qla2x00_do_dpc()
4987 } else if (IS_QLA8044(ha)) { in qla2x00_do_dpc()
4988 qla8044_idc_lock(ha); in qla2x00_do_dpc()
4991 qla8044_idc_unlock(ha); in qla2x00_do_dpc()
5047 if (IS_QLAFX00(ha)) in qla2x00_do_dpc()
5057 if (!ha->interrupts_on) in qla2x00_do_dpc()
5058 ha->isp_ops->enable_intrs(ha); in qla2x00_do_dpc()
5062 if (ha->beacon_blink_led == 1) in qla2x00_do_dpc()
5063 ha->isp_ops->beacon_blink(base_vha); in qla2x00_do_dpc()
5066 if (!IS_QLAFX00(ha)) in qla2x00_do_dpc()
5069 ha->dpc_active = 0; in qla2x00_do_dpc()
5081 ha->dpc_active = 0; in qla2x00_do_dpc()
5092 struct qla_hw_data *ha = vha->hw; in qla2xxx_wake_dpc() local
5093 struct task_struct *t = ha->dpc_thread; in qla2xxx_wake_dpc()
5141 struct qla_hw_data *ha = vha->hw; in qla2x00_timer() local
5144 if (ha->flags.eeh_busy) { in qla2x00_timer()
5147 ha->flags.eeh_busy); in qla2x00_timer()
5156 if (!pci_channel_offline(ha->pdev)) { in qla2x00_timer()
5157 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w); in qla2x00_timer()
5162 if (!vha->vp_idx && IS_P3P_TYPE(ha)) { in qla2x00_timer()
5165 if (IS_QLA82XX(ha)) in qla2x00_timer()
5167 else if (IS_QLA8044(ha)) in qla2x00_timer()
5171 if (!vha->vp_idx && IS_QLAFX00(ha)) in qla2x00_timer()
5186 if (!IS_QLA2100(ha) && vha->link_down_timeout) in qla2x00_timer()
5195 spin_lock_irqsave(&ha->hardware_lock, in qla2x00_timer()
5197 req = ha->req_q_map[0]; in qla2x00_timer()
5212 if (IS_QLA82XX(ha)) in qla2x00_timer()
5220 spin_unlock_irqrestore(&ha->hardware_lock, in qla2x00_timer()
5232 if (IS_QLA82XX(ha)) in qla2x00_timer()
5245 if (!vha->vp_idx && (ha->beacon_blink_led == 1)) { in qla2x00_timer()
5247 if (!IS_P3P_TYPE(ha)) { in qla2x00_timer()
5339 struct qla_hw_data *ha = vha->hw; in qla2x00_request_firmware() local
5342 if (IS_QLA2100(ha)) { in qla2x00_request_firmware()
5344 } else if (IS_QLA2200(ha)) { in qla2x00_request_firmware()
5346 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { in qla2x00_request_firmware()
5348 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) { in qla2x00_request_firmware()
5350 } else if (IS_QLA24XX_TYPE(ha)) { in qla2x00_request_firmware()
5352 } else if (IS_QLA25XX(ha)) { in qla2x00_request_firmware()
5354 } else if (IS_QLA81XX(ha)) { in qla2x00_request_firmware()
5356 } else if (IS_QLA82XX(ha)) { in qla2x00_request_firmware()
5358 } else if (IS_QLA2031(ha)) { in qla2x00_request_firmware()
5360 } else if (IS_QLA8031(ha)) { in qla2x00_request_firmware()
5362 } else if (IS_QLA27XX(ha)) { in qla2x00_request_firmware()
5372 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) { in qla2x00_request_firmware()
5400 struct qla_hw_data *ha = vha->hw; in qla2xxx_pci_error_detected() local
5407 ha->flags.eeh_busy = 0; in qla2xxx_pci_error_detected()
5410 ha->flags.eeh_busy = 1; in qla2xxx_pci_error_detected()
5412 if (IS_QLA82XX(ha)) { in qla2xxx_pci_error_detected()
5413 ha->flags.isp82xx_fw_hung = 1; in qla2xxx_pci_error_detected()
5423 ha->flags.pci_channel_io_perm_failure = 1; in qla2xxx_pci_error_detected()
5437 struct qla_hw_data *ha = base_vha->hw; in qla2xxx_pci_mmio_enabled() local
5438 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2xxx_pci_mmio_enabled()
5439 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; in qla2xxx_pci_mmio_enabled()
5441 if (IS_QLA82XX(ha)) in qla2xxx_pci_mmio_enabled()
5444 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2xxx_pci_mmio_enabled()
5445 if (IS_QLA2100(ha) || IS_QLA2200(ha)){ in qla2xxx_pci_mmio_enabled()
5449 } else if (IS_QLA23XX(ha)) { in qla2xxx_pci_mmio_enabled()
5453 } else if (IS_FWI2_CAPABLE(ha)) { in qla2xxx_pci_mmio_enabled()
5458 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2xxx_pci_mmio_enabled()
5463 ha->isp_ops->fw_dump(base_vha, 0); in qla2xxx_pci_mmio_enabled()
5475 struct qla_hw_data *ha = base_vha->hw; in qla82xx_error_recovery() local
5491 fn = PCI_FUNC(ha->pdev->devfn); in qla82xx_error_recovery()
5497 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus), in qla82xx_error_recovery()
5498 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn), in qla82xx_error_recovery()
5517 ha->pdev->devfn); in qla82xx_error_recovery()
5518 qla82xx_idc_lock(ha); in qla82xx_error_recovery()
5520 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla82xx_error_recovery()
5523 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION, in qla82xx_error_recovery()
5526 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_error_recovery()
5530 qla82xx_idc_unlock(ha); in qla82xx_error_recovery()
5538 qla82xx_idc_lock(ha); in qla82xx_error_recovery()
5543 qla82xx_clear_drv_active(ha); in qla82xx_error_recovery()
5544 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla82xx_error_recovery()
5549 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla82xx_error_recovery()
5551 qla82xx_idc_unlock(ha); in qla82xx_error_recovery()
5552 ha->flags.isp82xx_fw_hung = 0; in qla82xx_error_recovery()
5554 qla82xx_idc_lock(ha); in qla82xx_error_recovery()
5556 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0); in qla82xx_error_recovery()
5559 qla82xx_idc_unlock(ha); in qla82xx_error_recovery()
5563 ha->pdev->devfn); in qla82xx_error_recovery()
5564 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) == in qla82xx_error_recovery()
5566 ha->flags.isp82xx_fw_hung = 0; in qla82xx_error_recovery()
5568 qla82xx_idc_lock(ha); in qla82xx_error_recovery()
5570 qla82xx_idc_unlock(ha); in qla82xx_error_recovery()
5583 struct qla_hw_data *ha = base_vha->hw; in qla2xxx_pci_slot_reset() local
5603 if (ha->mem_only) in qla2xxx_pci_slot_reset()
5614 rsp = ha->rsp_q_map[0]; in qla2xxx_pci_slot_reset()
5615 if (qla2x00_request_irqs(ha, rsp)) in qla2xxx_pci_slot_reset()
5618 if (ha->isp_ops->pci_config(base_vha)) in qla2xxx_pci_slot_reset()
5621 if (IS_QLA82XX(ha)) { in qla2xxx_pci_slot_reset()
5629 while (ha->flags.mbox_busy && retries--) in qla2xxx_pci_slot_reset()
5633 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS) in qla2xxx_pci_slot_reset()
5649 struct qla_hw_data *ha = base_vha->hw; in qla2xxx_pci_resume() local
5663 ha->flags.eeh_busy = 0; in qla2xxx_pci_resume()
5670 struct qla_hw_data *ha = vha->hw; in qla83xx_disable_laser() local
5671 struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24; in qla83xx_disable_laser()