1327 	uint64_t off8, mem_crb, tmpw, word[2] = {0, 0};  in qla82xx_pci_mem_write_2M()  local
1333 		mem_crb = QLA82XX_CRB_QDR_NET;  in qla82xx_pci_mem_write_2M()
1335 		mem_crb = QLA82XX_CRB_DDR_NET;  in qla82xx_pci_mem_write_2M()
1387 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp);  in qla82xx_pci_mem_write_2M()
1389 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp);  in qla82xx_pci_mem_write_2M()
1391 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp);  in qla82xx_pci_mem_write_2M()
1393 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp);  in qla82xx_pci_mem_write_2M()
1395 		qla82xx_wr_32(ha, mem_crb +  in qla82xx_pci_mem_write_2M()
1398 		qla82xx_wr_32(ha, mem_crb +  in qla82xx_pci_mem_write_2M()
1402 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_write_2M()
1404 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_write_2M()
1407 			temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);  in qla82xx_pci_mem_write_2M()
1463 	uint64_t      off8, val, mem_crb, word[2] = {0, 0};  in qla82xx_pci_mem_read_2M()  local
1470 		mem_crb = QLA82XX_CRB_QDR_NET;  in qla82xx_pci_mem_read_2M()
1472 		mem_crb = QLA82XX_CRB_DDR_NET;  in qla82xx_pci_mem_read_2M()
1488 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp);  in qla82xx_pci_mem_read_2M()
1490 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp);  in qla82xx_pci_mem_read_2M()
1492 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_read_2M()
1494 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_read_2M()
1497 			temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);  in qla82xx_pci_mem_read_2M()
1513 					mem_crb + MIU_TEST_AGT_RDDATA(k));  in qla82xx_pci_mem_read_2M()