Lines Matching refs:ha
355 qla82xx_pci_set_crbwindow_2M(struct qla_hw_data *ha, ulong off_in, in qla82xx_pci_set_crbwindow_2M() argument
359 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_crbwindow_2M()
361 ha->crb_win = CRB_HI(off_in); in qla82xx_pci_set_crbwindow_2M()
362 writel(ha->crb_win, CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
367 win_read = RD_REG_DWORD(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
368 if (win_read != ha->crb_win) { in qla82xx_pci_set_crbwindow_2M()
372 __func__, ha->crb_win, win_read, off_in); in qla82xx_pci_set_crbwindow_2M()
374 *off_out = (off_in & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase; in qla82xx_pci_set_crbwindow_2M()
378 qla82xx_pci_set_crbwindow(struct qla_hw_data *ha, u64 off) in qla82xx_pci_set_crbwindow() argument
380 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_crbwindow()
391 if (ha->curr_window != 0) in qla82xx_pci_set_crbwindow()
400 if (ha->curr_window != 1) in qla82xx_pci_set_crbwindow()
419 qla82xx_pci_get_crb_addr_2M(struct qla_hw_data *ha, ulong off_in, in qla82xx_pci_get_crb_addr_2M() argument
429 QLA82XX_PCI_CAMQM_2M_BASE + ha->nx_pcibase; in qla82xx_pci_get_crb_addr_2M()
442 *off_out = off_in + m->start_2M - m->start_128M + ha->nx_pcibase; in qla82xx_pci_get_crb_addr_2M()
451 static int qla82xx_crb_win_lock(struct qla_hw_data *ha) in qla82xx_crb_win_lock() argument
457 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_LOCK)); in qla82xx_crb_win_lock()
464 qla82xx_wr_32(ha, QLA82XX_CRB_WIN_LOCK_ID, ha->portnum); in qla82xx_crb_win_lock()
469 qla82xx_wr_32(struct qla_hw_data *ha, ulong off_in, u32 data) in qla82xx_wr_32() argument
475 rv = qla82xx_pci_get_crb_addr_2M(ha, off_in, &off); in qla82xx_wr_32()
481 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_wr_32()
483 qla82xx_crb_win_lock(ha); in qla82xx_wr_32()
484 qla82xx_pci_set_crbwindow_2M(ha, off_in, &off); in qla82xx_wr_32()
490 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_UNLOCK)); in qla82xx_wr_32()
492 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_wr_32()
499 qla82xx_rd_32(struct qla_hw_data *ha, ulong off_in) in qla82xx_rd_32() argument
506 rv = qla82xx_pci_get_crb_addr_2M(ha, off_in, &off); in qla82xx_rd_32()
512 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_rd_32()
514 qla82xx_crb_win_lock(ha); in qla82xx_rd_32()
515 qla82xx_pci_set_crbwindow_2M(ha, off_in, &off); in qla82xx_rd_32()
520 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_UNLOCK)); in qla82xx_rd_32()
522 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_rd_32()
529 int qla82xx_idc_lock(struct qla_hw_data *ha) in qla82xx_idc_lock() argument
536 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_LOCK)); in qla82xx_idc_lock()
556 void qla82xx_idc_unlock(struct qla_hw_data *ha) in qla82xx_idc_unlock() argument
558 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_UNLOCK)); in qla82xx_idc_unlock()
566 qla82xx_pci_mem_bound_check(struct qla_hw_data *ha, in qla82xx_pci_mem_bound_check() argument
582 qla82xx_pci_set_window(struct qla_hw_data *ha, unsigned long long addr) in qla82xx_pci_set_window() argument
586 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_window()
592 ha->ddr_mn_window = window; in qla82xx_pci_set_window()
593 qla82xx_wr_32(ha, in qla82xx_pci_set_window()
594 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
595 win_read = qla82xx_rd_32(ha, in qla82xx_pci_set_window()
596 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
612 ha->ddr_mn_window = window; in qla82xx_pci_set_window()
613 qla82xx_wr_32(ha, in qla82xx_pci_set_window()
614 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
615 win_read = qla82xx_rd_32(ha, in qla82xx_pci_set_window()
616 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
630 ha->qdr_sn_window = window; in qla82xx_pci_set_window()
631 qla82xx_wr_32(ha, in qla82xx_pci_set_window()
632 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
633 win_read = qla82xx_rd_32(ha, in qla82xx_pci_set_window()
634 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
658 static int qla82xx_pci_is_same_window(struct qla_hw_data *ha, in qla82xx_pci_is_same_window() argument
679 if (ha->qdr_sn_window == window) in qla82xx_pci_is_same_window()
685 static int qla82xx_pci_mem_read_direct(struct qla_hw_data *ha, in qla82xx_pci_mem_read_direct() argument
695 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_mem_read_direct()
697 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
703 start = qla82xx_pci_set_window(ha, off); in qla82xx_pci_mem_read_direct()
705 (qla82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla82xx_pci_mem_read_direct()
706 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
714 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
715 mem_base = pci_resource_start(ha->pdev, 0); in qla82xx_pci_mem_read_direct()
730 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
749 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
757 qla82xx_pci_mem_write_direct(struct qla_hw_data *ha, in qla82xx_pci_mem_write_direct() argument
767 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_mem_write_direct()
769 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
775 start = qla82xx_pci_set_window(ha, off); in qla82xx_pci_mem_write_direct()
777 (qla82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla82xx_pci_mem_write_direct()
778 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
786 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
787 mem_base = pci_resource_start(ha->pdev, 0); in qla82xx_pci_mem_write_direct()
801 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
820 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
855 qla82xx_rom_lock(struct qla_hw_data *ha) in qla82xx_rom_lock() argument
859 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_lock()
863 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_LOCK)); in qla82xx_rom_lock()
867 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in qla82xx_rom_lock()
870 __func__, ha->portnum, lock_owner); in qla82xx_rom_lock()
875 qla82xx_wr_32(ha, QLA82XX_ROM_LOCK_ID, ha->portnum); in qla82xx_rom_lock()
880 qla82xx_rom_unlock(struct qla_hw_data *ha) in qla82xx_rom_unlock() argument
882 qla82xx_wr_32(ha, QLA82XX_ROM_LOCK_ID, 0xffffffff); in qla82xx_rom_unlock()
883 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK)); in qla82xx_rom_unlock()
887 qla82xx_wait_rom_busy(struct qla_hw_data *ha) in qla82xx_wait_rom_busy() argument
891 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_wait_rom_busy()
894 done = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_STATUS); in qla82xx_wait_rom_busy()
908 qla82xx_wait_rom_done(struct qla_hw_data *ha) in qla82xx_wait_rom_done() argument
912 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_wait_rom_done()
915 done = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_STATUS); in qla82xx_wait_rom_done()
929 qla82xx_md_rw_32(struct qla_hw_data *ha, uint32_t off, u32 data, uint8_t flag) in qla82xx_md_rw_32() argument
933 WRT_REG_DWORD(CRB_WINDOW_2M + ha->nx_pcibase, off & 0xFFFF0000); in qla82xx_md_rw_32()
936 RD_REG_DWORD(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_md_rw_32()
940 WRT_REG_DWORD(off_value + CRB_INDIRECT_2M + ha->nx_pcibase, in qla82xx_md_rw_32()
944 ha->nx_pcibase); in qla82xx_md_rw_32()
950 qla82xx_do_rom_fast_read(struct qla_hw_data *ha, int addr, int *valp) in qla82xx_do_rom_fast_read() argument
953 qla82xx_md_rw_32(ha, MD_DIRECT_ROM_WINDOW, (addr & 0xFFFF0000), 1); in qla82xx_do_rom_fast_read()
954 *valp = qla82xx_md_rw_32(ha, MD_DIRECT_ROM_READ_BASE + in qla82xx_do_rom_fast_read()
961 qla82xx_rom_fast_read(struct qla_hw_data *ha, int addr, int *valp) in qla82xx_rom_fast_read() argument
965 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_fast_read()
967 while ((qla82xx_rom_lock(ha) != 0) && (loops < 50000)) { in qla82xx_rom_fast_read()
973 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in qla82xx_rom_fast_read()
979 ret = qla82xx_do_rom_fast_read(ha, addr, valp); in qla82xx_rom_fast_read()
980 qla82xx_rom_unlock(ha); in qla82xx_rom_fast_read()
985 qla82xx_read_status_reg(struct qla_hw_data *ha, uint32_t *val) in qla82xx_read_status_reg() argument
987 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_read_status_reg()
988 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_RDSR); in qla82xx_read_status_reg()
989 qla82xx_wait_rom_busy(ha); in qla82xx_read_status_reg()
990 if (qla82xx_wait_rom_done(ha)) { in qla82xx_read_status_reg()
995 *val = qla82xx_rd_32(ha, QLA82XX_ROMUSB_ROM_RDATA); in qla82xx_read_status_reg()
1000 qla82xx_flash_wait_write_finish(struct qla_hw_data *ha) in qla82xx_flash_wait_write_finish() argument
1006 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_flash_wait_write_finish()
1008 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 0); in qla82xx_flash_wait_write_finish()
1010 ret = qla82xx_read_status_reg(ha, &val); in qla82xx_flash_wait_write_finish()
1025 qla82xx_flash_set_write_enable(struct qla_hw_data *ha) in qla82xx_flash_set_write_enable() argument
1028 qla82xx_wait_rom_busy(ha); in qla82xx_flash_set_write_enable()
1029 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 0); in qla82xx_flash_set_write_enable()
1030 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_WREN); in qla82xx_flash_set_write_enable()
1031 qla82xx_wait_rom_busy(ha); in qla82xx_flash_set_write_enable()
1032 if (qla82xx_wait_rom_done(ha)) in qla82xx_flash_set_write_enable()
1034 if (qla82xx_read_status_reg(ha, &val) != 0) in qla82xx_flash_set_write_enable()
1042 qla82xx_write_status_reg(struct qla_hw_data *ha, uint32_t val) in qla82xx_write_status_reg() argument
1044 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_status_reg()
1045 if (qla82xx_flash_set_write_enable(ha)) in qla82xx_write_status_reg()
1047 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_WDATA, val); in qla82xx_write_status_reg()
1048 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, 0x1); in qla82xx_write_status_reg()
1049 if (qla82xx_wait_rom_done(ha)) { in qla82xx_write_status_reg()
1054 return qla82xx_flash_wait_write_finish(ha); in qla82xx_write_status_reg()
1058 qla82xx_write_disable_flash(struct qla_hw_data *ha) in qla82xx_write_disable_flash() argument
1060 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_disable_flash()
1061 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_WRDI); in qla82xx_write_disable_flash()
1062 if (qla82xx_wait_rom_done(ha)) { in qla82xx_write_disable_flash()
1071 ql82xx_rom_lock_d(struct qla_hw_data *ha) in ql82xx_rom_lock_d() argument
1075 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in ql82xx_rom_lock_d()
1077 while ((qla82xx_rom_lock(ha) != 0) && (loops < 50000)) { in ql82xx_rom_lock_d()
1083 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in ql82xx_rom_lock_d()
1092 qla82xx_write_flash_dword(struct qla_hw_data *ha, uint32_t flashaddr, in qla82xx_write_flash_dword() argument
1096 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_flash_dword()
1098 ret = ql82xx_rom_lock_d(ha); in qla82xx_write_flash_dword()
1105 if (qla82xx_flash_set_write_enable(ha)) in qla82xx_write_flash_dword()
1108 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_WDATA, data); in qla82xx_write_flash_dword()
1109 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ADDRESS, flashaddr); in qla82xx_write_flash_dword()
1110 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 3); in qla82xx_write_flash_dword()
1111 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_PP); in qla82xx_write_flash_dword()
1112 qla82xx_wait_rom_busy(ha); in qla82xx_write_flash_dword()
1113 if (qla82xx_wait_rom_done(ha)) { in qla82xx_write_flash_dword()
1120 ret = qla82xx_flash_wait_write_finish(ha); in qla82xx_write_flash_dword()
1123 qla82xx_rom_unlock(ha); in qla82xx_write_flash_dword()
1138 struct qla_hw_data *ha = vha->hw; in qla82xx_pinit_from_rom() local
1146 qla82xx_rom_lock(ha); in qla82xx_pinit_from_rom()
1149 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x10, 0x0); in qla82xx_pinit_from_rom()
1150 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x14, 0x0); in qla82xx_pinit_from_rom()
1151 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x18, 0x0); in qla82xx_pinit_from_rom()
1152 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x1c, 0x0); in qla82xx_pinit_from_rom()
1153 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x20, 0x0); in qla82xx_pinit_from_rom()
1154 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x24, 0x0); in qla82xx_pinit_from_rom()
1157 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x40, 0xff); in qla82xx_pinit_from_rom()
1159 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x70000, 0x00); in qla82xx_pinit_from_rom()
1161 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x80000, 0x00); in qla82xx_pinit_from_rom()
1163 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x90000, 0x00); in qla82xx_pinit_from_rom()
1165 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xa0000, 0x00); in qla82xx_pinit_from_rom()
1167 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xb0000, 0x00); in qla82xx_pinit_from_rom()
1170 val = qla82xx_rd_32(ha, QLA82XX_CRB_SRE + 0x1000); in qla82xx_pinit_from_rom()
1171 qla82xx_wr_32(ha, QLA82XX_CRB_SRE + 0x1000, val & (~(0x1))); in qla82xx_pinit_from_rom()
1174 qla82xx_wr_32(ha, QLA82XX_CRB_EPG + 0x1300, 0x1); in qla82xx_pinit_from_rom()
1177 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x0, 0x0); in qla82xx_pinit_from_rom()
1178 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x8, 0x0); in qla82xx_pinit_from_rom()
1179 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x10, 0x0); in qla82xx_pinit_from_rom()
1180 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x18, 0x0); in qla82xx_pinit_from_rom()
1181 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x100, 0x0); in qla82xx_pinit_from_rom()
1182 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x200, 0x0); in qla82xx_pinit_from_rom()
1185 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x3c, 1); in qla82xx_pinit_from_rom()
1186 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1 + 0x3c, 1); in qla82xx_pinit_from_rom()
1187 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2 + 0x3c, 1); in qla82xx_pinit_from_rom()
1188 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3 + 0x3c, 1); in qla82xx_pinit_from_rom()
1189 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_4 + 0x3c, 1); in qla82xx_pinit_from_rom()
1195 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xfeffffff); in qla82xx_pinit_from_rom()
1197 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xffffffff); in qla82xx_pinit_from_rom()
1198 qla82xx_rom_unlock(ha); in qla82xx_pinit_from_rom()
1205 if (qla82xx_rom_fast_read(ha, 0, &n) != 0 || n != 0xcafecafeUL || in qla82xx_pinit_from_rom()
1206 qla82xx_rom_fast_read(ha, 4, &n) != 0) { in qla82xx_pinit_from_rom()
1236 if (qla82xx_rom_fast_read(ha, 8*i + 4*offset, &val) != 0 || in qla82xx_pinit_from_rom()
1237 qla82xx_rom_fast_read(ha, 8*i + 4*offset + 4, &addr) != 0) { in qla82xx_pinit_from_rom()
1287 qla82xx_wr_32(ha, off, buf[i].data); in qla82xx_pinit_from_rom()
1304 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_D+0xec, 0x1e); in qla82xx_pinit_from_rom()
1305 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_D+0x4c, 8); in qla82xx_pinit_from_rom()
1306 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_I+0x4c, 8); in qla82xx_pinit_from_rom()
1309 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0+0x8, 0); in qla82xx_pinit_from_rom()
1310 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0+0xc, 0); in qla82xx_pinit_from_rom()
1311 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1+0x8, 0); in qla82xx_pinit_from_rom()
1312 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1+0xc, 0); in qla82xx_pinit_from_rom()
1313 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2+0x8, 0); in qla82xx_pinit_from_rom()
1314 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2+0xc, 0); in qla82xx_pinit_from_rom()
1315 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3+0x8, 0); in qla82xx_pinit_from_rom()
1316 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3+0xc, 0); in qla82xx_pinit_from_rom()
1321 qla82xx_pci_mem_write_2M(struct qla_hw_data *ha, in qla82xx_pci_mem_write_2M() argument
1336 if (qla82xx_pci_mem_bound_check(ha, off, size) == 0) in qla82xx_pci_mem_write_2M()
1337 return qla82xx_pci_mem_write_direct(ha, in qla82xx_pci_mem_write_2M()
1352 if (qla82xx_pci_mem_read_2M(ha, off8 + in qla82xx_pci_mem_write_2M()
1387 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp); in qla82xx_pci_mem_write_2M()
1389 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp); in qla82xx_pci_mem_write_2M()
1391 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp); in qla82xx_pci_mem_write_2M()
1393 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp); in qla82xx_pci_mem_write_2M()
1395 qla82xx_wr_32(ha, mem_crb + in qla82xx_pci_mem_write_2M()
1398 qla82xx_wr_32(ha, mem_crb + in qla82xx_pci_mem_write_2M()
1402 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_write_2M()
1404 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_write_2M()
1407 temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL); in qla82xx_pci_mem_write_2M()
1414 dev_err(&ha->pdev->dev, in qla82xx_pci_mem_write_2M()
1425 qla82xx_fw_load_from_flash(struct qla_hw_data *ha) in qla82xx_fw_load_from_flash() argument
1429 long flashaddr = ha->flt_region_bootload << 2; in qla82xx_fw_load_from_flash()
1436 if ((qla82xx_rom_fast_read(ha, flashaddr, (int *)&low)) || in qla82xx_fw_load_from_flash()
1437 (qla82xx_rom_fast_read(ha, flashaddr + 4, (int *)&high))) { in qla82xx_fw_load_from_flash()
1441 qla82xx_pci_mem_write_2M(ha, memaddr, &data, 8); in qla82xx_fw_load_from_flash()
1449 read_lock(&ha->hw_lock); in qla82xx_fw_load_from_flash()
1450 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x18, 0x1020); in qla82xx_fw_load_from_flash()
1451 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0x80001e); in qla82xx_fw_load_from_flash()
1452 read_unlock(&ha->hw_lock); in qla82xx_fw_load_from_flash()
1457 qla82xx_pci_mem_read_2M(struct qla_hw_data *ha, in qla82xx_pci_mem_read_2M() argument
1473 if (qla82xx_pci_mem_bound_check(ha, off, size) == 0) in qla82xx_pci_mem_read_2M()
1474 return qla82xx_pci_mem_read_direct(ha, in qla82xx_pci_mem_read_2M()
1488 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp); in qla82xx_pci_mem_read_2M()
1490 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp); in qla82xx_pci_mem_read_2M()
1492 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_read_2M()
1494 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_read_2M()
1497 temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL); in qla82xx_pci_mem_read_2M()
1504 dev_err(&ha->pdev->dev, in qla82xx_pci_mem_read_2M()
1512 temp = qla82xx_rd_32(ha, in qla82xx_pci_mem_read_2M()
1569 qla82xx_get_data_desc(struct qla_hw_data *ha, in qla82xx_get_data_desc() argument
1572 const u8 *unirom = ha->hablob->fw->data; in qla82xx_get_data_desc()
1573 int idx = cpu_to_le32(*((int *)&unirom[ha->file_prd_off] + idx_offset)); in qla82xx_get_data_desc()
1588 qla82xx_get_bootld_offset(struct qla_hw_data *ha) in qla82xx_get_bootld_offset() argument
1593 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_bootld_offset()
1594 uri_desc = qla82xx_get_data_desc(ha, in qla82xx_get_bootld_offset()
1600 return (u8 *)&ha->hablob->fw->data[offset]; in qla82xx_get_bootld_offset()
1604 qla82xx_get_fw_size(struct qla_hw_data *ha) in qla82xx_get_fw_size() argument
1608 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_fw_size()
1609 uri_desc = qla82xx_get_data_desc(ha, QLA82XX_URI_DIR_SECT_FW, in qla82xx_get_fw_size()
1615 return cpu_to_le32(*(u32 *)&ha->hablob->fw->data[FW_SIZE_OFFSET]); in qla82xx_get_fw_size()
1619 qla82xx_get_fw_offs(struct qla_hw_data *ha) in qla82xx_get_fw_offs() argument
1624 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_fw_offs()
1625 uri_desc = qla82xx_get_data_desc(ha, QLA82XX_URI_DIR_SECT_FW, in qla82xx_get_fw_offs()
1631 return (u8 *)&ha->hablob->fw->data[offset]; in qla82xx_get_fw_offs()
1654 qla82xx_iospace_config(struct qla_hw_data *ha) in qla82xx_iospace_config() argument
1658 if (pci_request_regions(ha->pdev, QLA2XXX_DRIVER_NAME)) { in qla82xx_iospace_config()
1659 ql_log_pci(ql_log_fatal, ha->pdev, 0x000c, in qla82xx_iospace_config()
1665 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { in qla82xx_iospace_config()
1666 ql_log_pci(ql_log_fatal, ha->pdev, 0x000d, in qla82xx_iospace_config()
1671 len = pci_resource_len(ha->pdev, 0); in qla82xx_iospace_config()
1672 ha->nx_pcibase = ioremap(pci_resource_start(ha->pdev, 0), len); in qla82xx_iospace_config()
1673 if (!ha->nx_pcibase) { in qla82xx_iospace_config()
1674 ql_log_pci(ql_log_fatal, ha->pdev, 0x000e, in qla82xx_iospace_config()
1680 if (IS_QLA8044(ha)) { in qla82xx_iospace_config()
1681 ha->iobase = ha->nx_pcibase; in qla82xx_iospace_config()
1682 } else if (IS_QLA82XX(ha)) { in qla82xx_iospace_config()
1683 ha->iobase = ha->nx_pcibase + 0xbc000 + (ha->pdev->devfn << 11); in qla82xx_iospace_config()
1687 ha->nxdb_wr_ptr = ioremap((pci_resource_start(ha->pdev, 4) + in qla82xx_iospace_config()
1688 (ha->pdev->devfn << 12)), 4); in qla82xx_iospace_config()
1689 if (!ha->nxdb_wr_ptr) { in qla82xx_iospace_config()
1690 ql_log_pci(ql_log_fatal, ha->pdev, 0x000f, in qla82xx_iospace_config()
1698 ha->nxdb_rd_ptr = ha->nx_pcibase + (512 * 1024) + in qla82xx_iospace_config()
1699 (ha->pdev->devfn * 8); in qla82xx_iospace_config()
1701 ha->nxdb_wr_ptr = (void __iomem *)(ha->pdev->devfn == 6 ? in qla82xx_iospace_config()
1706 ha->max_req_queues = ha->max_rsp_queues = 1; in qla82xx_iospace_config()
1707 ha->msix_count = ha->max_rsp_queues + 1; in qla82xx_iospace_config()
1708 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc006, in qla82xx_iospace_config()
1711 ha->nx_pcibase, ha->iobase, in qla82xx_iospace_config()
1712 ha->max_req_queues, ha->msix_count); in qla82xx_iospace_config()
1713 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0010, in qla82xx_iospace_config()
1716 ha->nx_pcibase, ha->iobase, in qla82xx_iospace_config()
1717 ha->max_req_queues, ha->msix_count); in qla82xx_iospace_config()
1737 struct qla_hw_data *ha = vha->hw; in qla82xx_pci_config() local
1740 pci_set_master(ha->pdev); in qla82xx_pci_config()
1741 ret = pci_set_mwi(ha->pdev); in qla82xx_pci_config()
1742 ha->chip_revision = ha->pdev->revision; in qla82xx_pci_config()
1745 ha->chip_revision, ret); in qla82xx_pci_config()
1758 struct qla_hw_data *ha = vha->hw; in qla82xx_reset_chip() local
1759 ha->isp_ops->disable_intrs(ha); in qla82xx_reset_chip()
1764 struct qla_hw_data *ha = vha->hw; in qla82xx_config_rings() local
1765 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; in qla82xx_config_rings()
1767 struct req_que *req = ha->req_q_map[0]; in qla82xx_config_rings()
1768 struct rsp_que *rsp = ha->rsp_q_map[0]; in qla82xx_config_rings()
1771 icb = (struct init_cb_81xx *)ha->init_cb; in qla82xx_config_rings()
1787 qla82xx_fw_load_from_blob(struct qla_hw_data *ha) in qla82xx_fw_load_from_blob() argument
1795 ptr64 = (u64 *)qla82xx_get_bootld_offset(ha); in qla82xx_fw_load_from_blob()
1800 if (qla82xx_pci_mem_write_2M(ha, flashaddr, &data, 8)) in qla82xx_fw_load_from_blob()
1806 size = (__force u32)qla82xx_get_fw_size(ha) / 8; in qla82xx_fw_load_from_blob()
1807 ptr64 = (u64 *)qla82xx_get_fw_offs(ha); in qla82xx_fw_load_from_blob()
1812 if (qla82xx_pci_mem_write_2M(ha, flashaddr, &data, 8)) in qla82xx_fw_load_from_blob()
1823 qla82xx_wr_32(ha, QLA82XX_CAM_RAM(0x1fc), QLA82XX_BDINFO_MAGIC); in qla82xx_fw_load_from_blob()
1825 read_lock(&ha->hw_lock); in qla82xx_fw_load_from_blob()
1826 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x18, 0x1020); in qla82xx_fw_load_from_blob()
1827 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0x80001e); in qla82xx_fw_load_from_blob()
1828 read_unlock(&ha->hw_lock); in qla82xx_fw_load_from_blob()
1833 qla82xx_set_product_offset(struct qla_hw_data *ha) in qla82xx_set_product_offset() argument
1836 const uint8_t *unirom = ha->hablob->fw->data; in qla82xx_set_product_offset()
1840 uint8_t chiprev = ha->chip_revision; in qla82xx_set_product_offset()
1863 ha->file_prd_off = offset; in qla82xx_set_product_offset()
1875 struct qla_hw_data *ha = vha->hw; in qla82xx_validate_firmware_blob() local
1876 const struct firmware *fw = ha->hablob->fw; in qla82xx_validate_firmware_blob()
1878 ha->fw_type = fw_type; in qla82xx_validate_firmware_blob()
1881 if (qla82xx_set_product_offset(ha)) in qla82xx_validate_firmware_blob()
1899 qla82xx_check_cmdpeg_state(struct qla_hw_data *ha) in qla82xx_check_cmdpeg_state() argument
1903 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_check_cmdpeg_state()
1906 read_lock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1907 val = qla82xx_rd_32(ha, CRB_CMDPEG_STATE); in qla82xx_check_cmdpeg_state()
1908 read_unlock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1930 val = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_PEGTUNE_DONE); in qla82xx_check_cmdpeg_state()
1931 read_lock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1932 qla82xx_wr_32(ha, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED); in qla82xx_check_cmdpeg_state()
1933 read_unlock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1938 qla82xx_check_rcvpeg_state(struct qla_hw_data *ha) in qla82xx_check_rcvpeg_state() argument
1942 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_check_rcvpeg_state()
1945 read_lock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1946 val = qla82xx_rd_32(ha, CRB_RCVPEG_STATE); in qla82xx_check_rcvpeg_state()
1947 read_unlock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1968 read_lock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1969 qla82xx_wr_32(ha, CRB_RCVPEG_STATE, PHAN_INITIALIZE_FAILED); in qla82xx_check_rcvpeg_state()
1970 read_unlock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1988 struct qla_hw_data *ha = vha->hw; in qla82xx_mbx_completion() local
1989 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; in qla82xx_mbx_completion()
1993 ha->flags.mbox_int = 1; in qla82xx_mbx_completion()
1994 ha->mailbox_out[0] = mb0; in qla82xx_mbx_completion()
1996 for (cnt = 1; cnt < ha->mbx_count; cnt++) { in qla82xx_mbx_completion()
1997 ha->mailbox_out[cnt] = RD_REG_WORD(wptr); in qla82xx_mbx_completion()
2001 if (!ha->mcp) in qla82xx_mbx_completion()
2020 struct qla_hw_data *ha; in qla82xx_intr_handler() local
2035 ha = rsp->hw; in qla82xx_intr_handler()
2037 if (!ha->flags.msi_enabled) { in qla82xx_intr_handler()
2038 status = qla82xx_rd_32(ha, ISR_INT_VECTOR); in qla82xx_intr_handler()
2039 if (!(status & ha->nx_legacy_intr.int_vec_bit)) in qla82xx_intr_handler()
2042 status1 = qla82xx_rd_32(ha, ISR_INT_STATE_REG); in qla82xx_intr_handler()
2048 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_status_reg, 0xffffffff); in qla82xx_intr_handler()
2051 qla82xx_rd_32(ha, ISR_INT_VECTOR); in qla82xx_intr_handler()
2052 qla82xx_rd_32(ha, ISR_INT_VECTOR); in qla82xx_intr_handler()
2054 reg = &ha->iobase->isp82; in qla82xx_intr_handler()
2056 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_intr_handler()
2057 vha = pci_get_drvdata(ha->pdev); in qla82xx_intr_handler()
2091 qla2x00_handle_mbx_completion(ha, status); in qla82xx_intr_handler()
2092 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_intr_handler()
2094 if (!ha->flags.msi_enabled) in qla82xx_intr_handler()
2095 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); in qla82xx_intr_handler()
2104 struct qla_hw_data *ha; in qla82xx_msix_default() local
2119 ha = rsp->hw; in qla82xx_msix_default()
2121 reg = &ha->iobase->isp82; in qla82xx_msix_default()
2123 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_msix_default()
2124 vha = pci_get_drvdata(ha->pdev); in qla82xx_msix_default()
2160 qla2x00_handle_mbx_completion(ha, status); in qla82xx_msix_default()
2161 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_msix_default()
2170 struct qla_hw_data *ha; in qla82xx_msix_rsp_q() local
2183 ha = rsp->hw; in qla82xx_msix_rsp_q()
2184 reg = &ha->iobase->isp82; in qla82xx_msix_rsp_q()
2185 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_msix_rsp_q()
2186 vha = pci_get_drvdata(ha->pdev); in qla82xx_msix_rsp_q()
2193 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_msix_rsp_q()
2201 struct qla_hw_data *ha; in qla82xx_poll() local
2216 ha = rsp->hw; in qla82xx_poll()
2218 reg = &ha->iobase->isp82; in qla82xx_poll()
2219 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_poll()
2220 vha = pci_get_drvdata(ha->pdev); in qla82xx_poll()
2254 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_poll()
2258 qla82xx_enable_intrs(struct qla_hw_data *ha) in qla82xx_enable_intrs() argument
2260 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_enable_intrs()
2262 spin_lock_irq(&ha->hardware_lock); in qla82xx_enable_intrs()
2263 if (IS_QLA8044(ha)) in qla82xx_enable_intrs()
2264 qla8044_wr_reg(ha, LEG_INTR_MASK_OFFSET, 0); in qla82xx_enable_intrs()
2266 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); in qla82xx_enable_intrs()
2267 spin_unlock_irq(&ha->hardware_lock); in qla82xx_enable_intrs()
2268 ha->interrupts_on = 1; in qla82xx_enable_intrs()
2272 qla82xx_disable_intrs(struct qla_hw_data *ha) in qla82xx_disable_intrs() argument
2274 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_disable_intrs()
2276 spin_lock_irq(&ha->hardware_lock); in qla82xx_disable_intrs()
2277 if (IS_QLA8044(ha)) in qla82xx_disable_intrs()
2278 qla8044_wr_reg(ha, LEG_INTR_MASK_OFFSET, 1); in qla82xx_disable_intrs()
2280 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0x0400); in qla82xx_disable_intrs()
2281 spin_unlock_irq(&ha->hardware_lock); in qla82xx_disable_intrs()
2282 ha->interrupts_on = 0; in qla82xx_disable_intrs()
2285 void qla82xx_init_flags(struct qla_hw_data *ha) in qla82xx_init_flags() argument
2290 rwlock_init(&ha->hw_lock); in qla82xx_init_flags()
2291 ha->qdr_sn_window = -1; in qla82xx_init_flags()
2292 ha->ddr_mn_window = -1; in qla82xx_init_flags()
2293 ha->curr_window = 255; in qla82xx_init_flags()
2294 ha->portnum = PCI_FUNC(ha->pdev->devfn); in qla82xx_init_flags()
2295 nx_legacy_intr = &legacy_intr[ha->portnum]; in qla82xx_init_flags()
2296 ha->nx_legacy_intr.int_vec_bit = nx_legacy_intr->int_vec_bit; in qla82xx_init_flags()
2297 ha->nx_legacy_intr.tgt_status_reg = nx_legacy_intr->tgt_status_reg; in qla82xx_init_flags()
2298 ha->nx_legacy_intr.tgt_mask_reg = nx_legacy_intr->tgt_mask_reg; in qla82xx_init_flags()
2299 ha->nx_legacy_intr.pci_int_reg = nx_legacy_intr->pci_int_reg; in qla82xx_init_flags()
2307 struct qla_hw_data *ha = vha->hw; in qla82xx_set_idc_version() local
2309 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_set_idc_version()
2310 if (drv_active == (QLA82XX_DRV_ACTIVE << (ha->portnum * 4))) { in qla82xx_set_idc_version()
2311 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION, in qla82xx_set_idc_version()
2316 idc_ver = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_IDC_VERSION); in qla82xx_set_idc_version()
2329 struct qla_hw_data *ha = vha->hw; in qla82xx_set_drv_active() local
2331 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_set_drv_active()
2335 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, in qla82xx_set_drv_active()
2337 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_set_drv_active()
2339 drv_active |= (QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_set_drv_active()
2340 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, drv_active); in qla82xx_set_drv_active()
2344 qla82xx_clear_drv_active(struct qla_hw_data *ha) in qla82xx_clear_drv_active() argument
2348 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_clear_drv_active()
2349 drv_active &= ~(QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_clear_drv_active()
2350 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, drv_active); in qla82xx_clear_drv_active()
2354 qla82xx_need_reset(struct qla_hw_data *ha) in qla82xx_need_reset() argument
2359 if (ha->flags.nic_core_reset_owner) in qla82xx_need_reset()
2362 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_reset()
2363 rval = drv_state & (QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_need_reset()
2369 qla82xx_set_rst_ready(struct qla_hw_data *ha) in qla82xx_set_rst_ready() argument
2372 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_set_rst_ready()
2374 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_set_rst_ready()
2378 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, QLA82XX_DRVST_NOT_RDY); in qla82xx_set_rst_ready()
2379 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_set_rst_ready()
2381 drv_state |= (QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_set_rst_ready()
2384 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, drv_state); in qla82xx_set_rst_ready()
2388 qla82xx_clear_rst_ready(struct qla_hw_data *ha) in qla82xx_clear_rst_ready() argument
2392 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_clear_rst_ready()
2393 drv_state &= ~(QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_clear_rst_ready()
2394 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, drv_state); in qla82xx_clear_rst_ready()
2398 qla82xx_set_qsnt_ready(struct qla_hw_data *ha) in qla82xx_set_qsnt_ready() argument
2402 qsnt_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_set_qsnt_ready()
2403 qsnt_state |= (QLA82XX_DRVST_QSNT_RDY << (ha->portnum * 4)); in qla82xx_set_qsnt_ready()
2404 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, qsnt_state); in qla82xx_set_qsnt_ready()
2410 struct qla_hw_data *ha = vha->hw; in qla82xx_clear_qsnt_ready() local
2413 qsnt_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_clear_qsnt_ready()
2414 qsnt_state &= ~(QLA82XX_DRVST_QSNT_RDY << (ha->portnum * 4)); in qla82xx_clear_qsnt_ready()
2415 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, qsnt_state); in qla82xx_clear_qsnt_ready()
2423 struct qla_hw_data *ha = vha->hw; in qla82xx_load_fw() local
2433 rst = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET); in qla82xx_load_fw()
2435 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, rst); in qla82xx_load_fw()
2448 if (qla82xx_fw_load_from_flash(ha) == QLA_SUCCESS) { in qla82xx_load_fw()
2462 blob = ha->hablob = qla2x00_request_firmware(vha); in qla82xx_load_fw()
2481 if (qla82xx_fw_load_from_blob(ha) == QLA_SUCCESS) { in qla82xx_load_fw()
2500 struct qla_hw_data *ha = vha->hw; in qla82xx_start_firmware() local
2503 qla82xx_wr_32(ha, CRB_DMA_SHIFT, QLA82XX_DMA_SHIFT_VALUE); in qla82xx_start_firmware()
2508 qla82xx_wr_32(ha, CRB_CMDPEG_STATE, 0); in qla82xx_start_firmware()
2509 qla82xx_wr_32(ha, CRB_RCVPEG_STATE, 0); in qla82xx_start_firmware()
2512 qla82xx_wr_32(ha, QLA82XX_PEG_HALT_STATUS1, 0); in qla82xx_start_firmware()
2513 qla82xx_wr_32(ha, QLA82XX_PEG_HALT_STATUS2, 0); in qla82xx_start_firmware()
2522 if (qla82xx_check_cmdpeg_state(ha) != QLA_SUCCESS) { in qla82xx_start_firmware()
2529 pcie_capability_read_word(ha->pdev, PCI_EXP_LNKSTA, &lnk); in qla82xx_start_firmware()
2530 ha->link_width = (lnk >> 4) & 0x3f; in qla82xx_start_firmware()
2533 return qla82xx_check_rcvpeg_state(ha); in qla82xx_start_firmware()
2542 struct qla_hw_data *ha = vha->hw; in qla82xx_read_flash_data() local
2546 if (qla82xx_rom_fast_read(ha, faddr, &val)) { in qla82xx_read_flash_data()
2558 qla82xx_unprotect_flash(struct qla_hw_data *ha) in qla82xx_unprotect_flash() argument
2562 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_unprotect_flash()
2564 ret = ql82xx_rom_lock_d(ha); in qla82xx_unprotect_flash()
2571 ret = qla82xx_read_status_reg(ha, &val); in qla82xx_unprotect_flash()
2576 ret = qla82xx_write_status_reg(ha, val); in qla82xx_unprotect_flash()
2579 qla82xx_write_status_reg(ha, val); in qla82xx_unprotect_flash()
2582 if (qla82xx_write_disable_flash(ha) != 0) in qla82xx_unprotect_flash()
2587 qla82xx_rom_unlock(ha); in qla82xx_unprotect_flash()
2592 qla82xx_protect_flash(struct qla_hw_data *ha) in qla82xx_protect_flash() argument
2596 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_protect_flash()
2598 ret = ql82xx_rom_lock_d(ha); in qla82xx_protect_flash()
2605 ret = qla82xx_read_status_reg(ha, &val); in qla82xx_protect_flash()
2611 ret = qla82xx_write_status_reg(ha, val); in qla82xx_protect_flash()
2616 if (qla82xx_write_disable_flash(ha) != 0) in qla82xx_protect_flash()
2620 qla82xx_rom_unlock(ha); in qla82xx_protect_flash()
2625 qla82xx_erase_sector(struct qla_hw_data *ha, int addr) in qla82xx_erase_sector() argument
2628 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_erase_sector()
2630 ret = ql82xx_rom_lock_d(ha); in qla82xx_erase_sector()
2637 qla82xx_flash_set_write_enable(ha); in qla82xx_erase_sector()
2638 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ADDRESS, addr); in qla82xx_erase_sector()
2639 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 3); in qla82xx_erase_sector()
2640 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_SE); in qla82xx_erase_sector()
2642 if (qla82xx_wait_rom_done(ha)) { in qla82xx_erase_sector()
2648 ret = qla82xx_flash_wait_write_finish(ha); in qla82xx_erase_sector()
2650 qla82xx_rom_unlock(ha); in qla82xx_erase_sector()
2677 struct qla_hw_data *ha = vha->hw; in qla82xx_write_flash_data() local
2684 optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, in qla82xx_write_flash_data()
2694 rest_addr = ha->fdt_block_size - 1; in qla82xx_write_flash_data()
2696 ret = qla82xx_unprotect_flash(ha); in qla82xx_write_flash_data()
2707 ret = qla82xx_erase_sector(ha, faddr); in qla82xx_write_flash_data()
2722 (ha->flash_data_off | faddr), in qla82xx_write_flash_data()
2728 (ha->flash_data_off | faddr), in qla82xx_write_flash_data()
2733 dma_free_coherent(&ha->pdev->dev, in qla82xx_write_flash_data()
2744 ret = qla82xx_write_flash_dword(ha, faddr, in qla82xx_write_flash_data()
2754 ret = qla82xx_protect_flash(ha); in qla82xx_write_flash_data()
2760 dma_free_coherent(&ha->pdev->dev, in qla82xx_write_flash_data()
2788 struct qla_hw_data *ha = vha->hw; in qla82xx_start_iocbs() local
2789 struct req_que *req = ha->req_q_map[0]; in qla82xx_start_iocbs()
2800 dbval = 0x04 | (ha->portnum << 5); in qla82xx_start_iocbs()
2804 qla82xx_wr_32(ha, (unsigned long)ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2806 WRT_REG_DWORD(ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2808 while (RD_REG_DWORD(ha->nxdb_rd_ptr) != dbval) { in qla82xx_start_iocbs()
2809 WRT_REG_DWORD(ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2816 qla82xx_rom_lock_recovery(struct qla_hw_data *ha) in qla82xx_rom_lock_recovery() argument
2818 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_lock_recovery()
2821 if (qla82xx_rom_lock(ha)) { in qla82xx_rom_lock_recovery()
2822 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in qla82xx_rom_lock_recovery()
2832 qla82xx_rom_unlock(ha); in qla82xx_rom_lock_recovery()
2852 struct qla_hw_data *ha = vha->hw; in qla82xx_device_bootstrap() local
2855 need_reset = qla82xx_need_reset(ha); in qla82xx_device_bootstrap()
2859 if (ha->flags.isp82xx_fw_hung) in qla82xx_device_bootstrap()
2860 qla82xx_rom_lock_recovery(ha); in qla82xx_device_bootstrap()
2862 old_count = qla82xx_rd_32(ha, QLA82XX_PEG_ALIVE_COUNTER); in qla82xx_device_bootstrap()
2865 count = qla82xx_rd_32(ha, QLA82XX_PEG_ALIVE_COUNTER); in qla82xx_device_bootstrap()
2871 qla82xx_rom_lock_recovery(ha); in qla82xx_device_bootstrap()
2877 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_INITIALIZING); in qla82xx_device_bootstrap()
2879 qla82xx_idc_unlock(ha); in qla82xx_device_bootstrap()
2881 qla82xx_idc_lock(ha); in qla82xx_device_bootstrap()
2886 qla82xx_clear_drv_active(ha); in qla82xx_device_bootstrap()
2887 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_FAILED); in qla82xx_device_bootstrap()
2894 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_READY); in qla82xx_device_bootstrap()
2912 struct qla_hw_data *ha = vha->hw; in qla82xx_need_qsnt_handler() local
2922 qla82xx_set_qsnt_ready(ha); in qla82xx_need_qsnt_handler()
2927 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_qsnt_handler()
2928 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_qsnt_handler()
2942 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla82xx_need_qsnt_handler()
2946 qla82xx_idc_unlock(ha); in qla82xx_need_qsnt_handler()
2948 qla82xx_idc_lock(ha); in qla82xx_need_qsnt_handler()
2954 qla82xx_idc_unlock(ha); in qla82xx_need_qsnt_handler()
2956 qla82xx_idc_lock(ha); in qla82xx_need_qsnt_handler()
2958 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_qsnt_handler()
2959 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_qsnt_handler()
2962 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_need_qsnt_handler()
2967 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_QUIESCENT); in qla82xx_need_qsnt_handler()
2984 struct qla_hw_data *ha = vha->hw; in qla82xx_wait_for_state_change() local
2989 qla82xx_idc_lock(ha); in qla82xx_wait_for_state_change()
2990 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_wait_for_state_change()
2991 qla82xx_idc_unlock(ha); in qla82xx_wait_for_state_change()
3000 struct qla_hw_data *ha = vha->hw; in qla8xxx_dev_failed_handler() local
3006 if (IS_QLA82XX(ha)) { in qla8xxx_dev_failed_handler()
3007 qla82xx_clear_drv_active(ha); in qla8xxx_dev_failed_handler()
3008 qla82xx_idc_unlock(ha); in qla8xxx_dev_failed_handler()
3009 } else if (IS_QLA8044(ha)) { in qla8xxx_dev_failed_handler()
3010 qla8044_clear_drv_active(ha); in qla8xxx_dev_failed_handler()
3011 qla8044_idc_unlock(ha); in qla8xxx_dev_failed_handler()
3039 struct qla_hw_data *ha = vha->hw; in qla82xx_need_reset_handler() local
3040 struct req_que *req = ha->req_q_map[0]; in qla82xx_need_reset_handler()
3043 qla82xx_idc_unlock(ha); in qla82xx_need_reset_handler()
3045 ha->isp_ops->get_flash_version(vha, req->ring); in qla82xx_need_reset_handler()
3046 ha->isp_ops->nvram_config(vha); in qla82xx_need_reset_handler()
3047 qla82xx_idc_lock(ha); in qla82xx_need_reset_handler()
3050 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_reset_handler()
3051 if (!ha->flags.nic_core_reset_owner) { in qla82xx_need_reset_handler()
3053 "reset_acknowledged by 0x%x\n", ha->portnum); in qla82xx_need_reset_handler()
3054 qla82xx_set_rst_ready(ha); in qla82xx_need_reset_handler()
3056 active_mask = ~(QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_need_reset_handler()
3063 reset_timeout = jiffies + (ha->fcoe_reset_timeout * HZ); in qla82xx_need_reset_handler()
3065 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_reset_handler()
3066 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_reset_handler()
3067 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_need_reset_handler()
3081 qla82xx_idc_unlock(ha); in qla82xx_need_reset_handler()
3083 qla82xx_idc_lock(ha); in qla82xx_need_reset_handler()
3084 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_reset_handler()
3085 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_reset_handler()
3086 if (ha->flags.nic_core_reset_owner) in qla82xx_need_reset_handler()
3088 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_need_reset_handler()
3106 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_COLD); in qla82xx_need_reset_handler()
3107 qla82xx_set_rst_ready(ha); in qla82xx_need_reset_handler()
3121 struct qla_hw_data *ha = vha->hw; in qla82xx_check_md_needed() local
3125 fw_major_version = ha->fw_major_version; in qla82xx_check_md_needed()
3126 fw_minor_version = ha->fw_minor_version; in qla82xx_check_md_needed()
3127 fw_subminor_version = ha->fw_subminor_version; in qla82xx_check_md_needed()
3134 if (!ha->fw_dumped) { in qla82xx_check_md_needed()
3135 if ((fw_major_version != ha->fw_major_version || in qla82xx_check_md_needed()
3136 fw_minor_version != ha->fw_minor_version || in qla82xx_check_md_needed()
3137 fw_subminor_version != ha->fw_subminor_version) || in qla82xx_check_md_needed()
3138 (ha->prev_minidump_failed)) { in qla82xx_check_md_needed()
3143 ha->fw_major_version, in qla82xx_check_md_needed()
3144 ha->fw_minor_version, in qla82xx_check_md_needed()
3145 ha->fw_subminor_version, in qla82xx_check_md_needed()
3146 ha->prev_minidump_failed); in qla82xx_check_md_needed()
3209 struct qla_hw_data *ha = vha->hw; in qla82xx_device_state_handler() local
3212 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3218 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_device_state_handler()
3226 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ); in qla82xx_device_state_handler()
3236 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_device_state_handler()
3251 ha->flags.nic_core_reset_owner = 0; in qla82xx_device_state_handler()
3257 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3259 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3265 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3267 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3270 (ha->fcoe_dev_init_timeout * HZ); in qla82xx_device_state_handler()
3275 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout\ in qla82xx_device_state_handler()
3282 if (ha->flags.quiesce_owner) in qla82xx_device_state_handler()
3285 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3287 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3290 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout\ in qla82xx_device_state_handler()
3298 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3300 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3305 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3313 struct qla_hw_data *ha = vha->hw; in qla82xx_check_temp() local
3315 temp = qla82xx_rd_32(ha, CRB_TEMP_STATE); in qla82xx_check_temp()
3344 struct qla_hw_data *ha = vha->hw; in qla82xx_clear_pending_mbx() local
3346 if (ha->flags.mbox_busy) { in qla82xx_clear_pending_mbx()
3347 ha->flags.mbox_int = 1; in qla82xx_clear_pending_mbx()
3348 ha->flags.mbox_busy = 0; in qla82xx_clear_pending_mbx()
3351 if (test_and_clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) in qla82xx_clear_pending_mbx()
3352 complete(&ha->mbx_intr_comp); in qla82xx_clear_pending_mbx()
3359 struct qla_hw_data *ha = vha->hw; in qla82xx_watchdog() local
3362 if (!ha->flags.nic_core_reset_hdlr_active) { in qla82xx_watchdog()
3363 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_watchdog()
3366 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3384 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3390 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, in qla82xx_watchdog()
3392 halt_status = qla82xx_rd_32(ha, in qla82xx_watchdog()
3400 qla82xx_rd_32(ha, QLA82XX_PEG_HALT_STATUS2), in qla82xx_watchdog()
3401 qla82xx_rd_32(ha, in qla82xx_watchdog()
3403 qla82xx_rd_32(ha, in qla82xx_watchdog()
3405 qla82xx_rd_32(ha, in qla82xx_watchdog()
3407 qla82xx_rd_32(ha, in qla82xx_watchdog()
3409 qla82xx_rd_32(ha, in qla82xx_watchdog()
3425 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3436 struct qla_hw_data *ha = vha->hw; in qla82xx_load_risc() local
3438 if (IS_QLA82XX(ha)) in qla82xx_load_risc()
3440 else if (IS_QLA8044(ha)) { in qla82xx_load_risc()
3441 qla8044_idc_lock(ha); in qla82xx_load_risc()
3444 qla8044_idc_unlock(ha); in qla82xx_load_risc()
3453 struct qla_hw_data *ha = vha->hw; in qla82xx_set_reset_owner() local
3456 if (IS_QLA82XX(ha)) in qla82xx_set_reset_owner()
3457 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_set_reset_owner()
3458 else if (IS_QLA8044(ha)) in qla82xx_set_reset_owner()
3464 if (IS_QLA82XX(ha)) { in qla82xx_set_reset_owner()
3465 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla82xx_set_reset_owner()
3467 ha->flags.nic_core_reset_owner = 1; in qla82xx_set_reset_owner()
3469 "reset_owner is 0x%x\n", ha->portnum); in qla82xx_set_reset_owner()
3470 } else if (IS_QLA8044(ha)) in qla82xx_set_reset_owner()
3494 struct qla_hw_data *ha = vha->hw; in qla82xx_abort_isp() local
3501 ha->flags.nic_core_reset_hdlr_active = 1; in qla82xx_abort_isp()
3503 qla82xx_idc_lock(ha); in qla82xx_abort_isp()
3505 qla82xx_idc_unlock(ha); in qla82xx_abort_isp()
3507 if (IS_QLA82XX(ha)) in qla82xx_abort_isp()
3509 else if (IS_QLA8044(ha)) { in qla82xx_abort_isp()
3510 qla8044_idc_lock(ha); in qla82xx_abort_isp()
3513 qla8044_idc_unlock(ha); in qla82xx_abort_isp()
3517 qla82xx_idc_lock(ha); in qla82xx_abort_isp()
3518 qla82xx_clear_rst_ready(ha); in qla82xx_abort_isp()
3519 qla82xx_idc_unlock(ha); in qla82xx_abort_isp()
3522 ha->flags.isp82xx_fw_hung = 0; in qla82xx_abort_isp()
3523 ha->flags.nic_core_reset_hdlr_active = 0; in qla82xx_abort_isp()
3530 if (ha->isp_abort_cnt == 0) { in qla82xx_abort_isp()
3538 ha->isp_ops->reset_adapter(vha); in qla82xx_abort_isp()
3544 ha->isp_abort_cnt--; in qla82xx_abort_isp()
3547 ha->isp_abort_cnt); in qla82xx_abort_isp()
3551 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; in qla82xx_abort_isp()
3554 ha->isp_abort_cnt); in qla82xx_abort_isp()
3637 struct qla_hw_data *ha = vha->hw; in qla82xx_chip_reset_cleanup() local
3643 if (!ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3646 if (IS_QLA82XX(ha)) in qla82xx_chip_reset_cleanup()
3648 else if (IS_QLA8044(ha)) in qla82xx_chip_reset_cleanup()
3651 ha->flags.isp82xx_fw_hung = 1; in qla82xx_chip_reset_cleanup()
3659 __func__, ha->flags.isp82xx_fw_hung); in qla82xx_chip_reset_cleanup()
3662 if (!ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3667 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3668 for (que = 0; que < ha->max_req_queues; que++) { in qla82xx_chip_reset_cleanup()
3669 req = ha->req_q_map[que]; in qla82xx_chip_reset_cleanup()
3678 !ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3680 &ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3681 if (ha->isp_ops->abort_command(sp)) { in qla82xx_chip_reset_cleanup()
3690 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3695 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3712 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_control() local
3721 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_minidump_process_control()
3728 qla82xx_md_rw_32(ha, crb_addr, in qla82xx_minidump_process_control()
3734 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3735 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); in qla82xx_minidump_process_control()
3740 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3747 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); in qla82xx_minidump_process_control()
3751 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3753 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); in qla82xx_minidump_process_control()
3760 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3771 read_value = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_control()
3784 read_value = qla82xx_md_rw_32(ha, addr, 0, 0); in qla82xx_minidump_process_control()
3804 qla82xx_md_rw_32(ha, addr, read_value, 1); in qla82xx_minidump_process_control()
3829 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdocm() local
3840 r_value = RD_REG_DWORD(r_addr + ha->nx_pcibase); in qla82xx_minidump_process_rdocm()
3851 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdmux() local
3864 qla82xx_md_rw_32(ha, s_addr, s_value, 1); in qla82xx_minidump_process_rdmux()
3865 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); in qla82xx_minidump_process_rdmux()
3877 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdcrb() local
3888 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); in qla82xx_minidump_process_rdcrb()
3900 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_l2tag() local
3922 qla82xx_md_rw_32(ha, t_r_addr, t_value, 1); in qla82xx_minidump_process_l2tag()
3924 qla82xx_md_rw_32(ha, c_addr, c_value_w, 1); in qla82xx_minidump_process_l2tag()
3929 c_value_r = qla82xx_md_rw_32(ha, c_addr, 0, 0); in qla82xx_minidump_process_l2tag()
3945 r_value = qla82xx_md_rw_32(ha, addr, 0, 0); in qla82xx_minidump_process_l2tag()
3959 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_l1cache() local
3977 qla82xx_md_rw_32(ha, t_r_addr, t_value, 1); in qla82xx_minidump_process_l1cache()
3978 qla82xx_md_rw_32(ha, c_addr, c_value_w, 1); in qla82xx_minidump_process_l1cache()
3981 r_value = qla82xx_md_rw_32(ha, addr, 0, 0); in qla82xx_minidump_process_l1cache()
3994 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_queue() local
4008 qla82xx_md_rw_32(ha, s_addr, qid, 1); in qla82xx_minidump_process_queue()
4011 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); in qla82xx_minidump_process_queue()
4024 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdrom() local
4035 qla82xx_md_rw_32(ha, MD_DIRECT_ROM_WINDOW, in qla82xx_minidump_process_rdrom()
4037 r_value = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_rdrom()
4050 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdmem() local
4079 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4081 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_ADDR_LO, r_addr, 1); in qla82xx_minidump_process_rdmem()
4083 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_ADDR_HI, r_value, 1); in qla82xx_minidump_process_rdmem()
4085 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_CTRL, r_value, 1); in qla82xx_minidump_process_rdmem()
4087 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_CTRL, r_value, 1); in qla82xx_minidump_process_rdmem()
4090 r_value = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_rdmem()
4099 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4104 r_data = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_rdmem()
4110 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4118 struct qla_hw_data *ha = vha->hw; in qla82xx_validate_template_chksum() local
4120 uint32_t *d_ptr = (uint32_t *)ha->md_tmplt_hdr; in qla82xx_validate_template_chksum()
4121 int count = ha->md_template_size/sizeof(uint32_t); in qla82xx_validate_template_chksum()
4145 struct qla_hw_data *ha = vha->hw; in qla82xx_md_collect() local
4153 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_collect()
4154 data_ptr = (uint32_t *)ha->md_dump; in qla82xx_md_collect()
4156 if (ha->fw_dumped) { in qla82xx_md_collect()
4159 "-- ignoring request.\n", ha->fw_dump); in qla82xx_md_collect()
4163 ha->fw_dumped = 0; in qla82xx_md_collect()
4165 if (!ha->md_tmplt_hdr || !ha->md_dump) { in qla82xx_md_collect()
4171 if (ha->flags.isp82xx_no_md_cap) { in qla82xx_md_collect()
4175 ha->flags.isp82xx_no_md_cap = 0; in qla82xx_md_collect()
4208 total_data_size = ha->md_dump_size; in qla82xx_md_collect()
4222 (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset); in qla82xx_md_collect()
4255 data_collected, (ha->md_dump_size - data_collected)); in qla82xx_md_collect()
4326 (uint8_t *)ha->md_dump; in qla82xx_md_collect()
4342 vha->host_no, ha->md_tmplt_hdr, vha->host_no, ha->md_dump); in qla82xx_md_collect()
4343 ha->fw_dumped = 1; in qla82xx_md_collect()
4353 struct qla_hw_data *ha = vha->hw; in qla82xx_md_alloc() local
4357 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_alloc()
4368 ha->md_dump_size += tmplt_hdr->capture_size_array[k]; in qla82xx_md_alloc()
4371 if (ha->md_dump) { in qla82xx_md_alloc()
4377 ha->md_dump = vmalloc(ha->md_dump_size); in qla82xx_md_alloc()
4378 if (ha->md_dump == NULL) { in qla82xx_md_alloc()
4381 "(0x%x).\n", ha->md_dump_size); in qla82xx_md_alloc()
4390 struct qla_hw_data *ha = vha->hw; in qla82xx_md_free() local
4393 if (ha->md_tmplt_hdr) { in qla82xx_md_free()
4396 ha->md_tmplt_hdr, ha->md_template_size / 1024); in qla82xx_md_free()
4397 dma_free_coherent(&ha->pdev->dev, ha->md_template_size, in qla82xx_md_free()
4398 ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); in qla82xx_md_free()
4399 ha->md_tmplt_hdr = NULL; in qla82xx_md_free()
4403 if (ha->md_dump) { in qla82xx_md_free()
4406 ha->md_dump, ha->md_dump_size / 1024); in qla82xx_md_free()
4407 vfree(ha->md_dump); in qla82xx_md_free()
4408 ha->md_dump_size = 0; in qla82xx_md_free()
4409 ha->md_dump = NULL; in qla82xx_md_free()
4416 struct qla_hw_data *ha = vha->hw; in qla82xx_md_prep() local
4424 ha->md_template_size / 1024); in qla82xx_md_prep()
4427 if (IS_QLA8044(ha)) in qla82xx_md_prep()
4441 ha->md_dump_size / 1024); in qla82xx_md_prep()
4445 ha->md_tmplt_hdr, in qla82xx_md_prep()
4446 ha->md_template_size / 1024); in qla82xx_md_prep()
4447 dma_free_coherent(&ha->pdev->dev, in qla82xx_md_prep()
4448 ha->md_template_size, in qla82xx_md_prep()
4449 ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); in qla82xx_md_prep()
4450 ha->md_tmplt_hdr = NULL; in qla82xx_md_prep()
4462 struct qla_hw_data *ha = vha->hw; in qla82xx_beacon_on() local
4463 qla82xx_idc_lock(ha); in qla82xx_beacon_on()
4471 ha->beacon_blink_led = 1; in qla82xx_beacon_on()
4473 qla82xx_idc_unlock(ha); in qla82xx_beacon_on()
4482 struct qla_hw_data *ha = vha->hw; in qla82xx_beacon_off() local
4483 qla82xx_idc_lock(ha); in qla82xx_beacon_off()
4491 ha->beacon_blink_led = 0; in qla82xx_beacon_off()
4493 qla82xx_idc_unlock(ha); in qla82xx_beacon_off()
4500 struct qla_hw_data *ha = vha->hw; in qla82xx_fw_dump() local
4502 if (!ha->allow_cna_fw_dump) in qla82xx_fw_dump()
4506 ha->flags.isp82xx_no_md_cap = 1; in qla82xx_fw_dump()
4507 qla82xx_idc_lock(ha); in qla82xx_fw_dump()
4509 qla82xx_idc_unlock(ha); in qla82xx_fw_dump()