Lines Matching defs:qla_hw_data
2925 struct qla_hw_data { struct
2926 struct pci_dev *pdev;
2929 mempool_t *srb_mempool;
2931 volatile struct {
2970 } flags;
2979 spinlock_t hardware_lock ____cacheline_aligned;
2980 int bars;
2981 int mem_only;
2982 device_reg_t *iobase; /* Base I/O address */
2983 resource_size_t pio_address;
2986 dma_addr_t bar0_hdl;
2988 void __iomem *cregbase;
2989 dma_addr_t bar2_hdl;
2993 uint32_t rqstq_intr_code;
2994 uint32_t mbx_intr_code;
2995 uint32_t req_que_len;
2996 uint32_t rsp_que_len;
2997 uint32_t req_que_off;
2998 uint32_t rsp_que_off;
3001 device_reg_t *mqiobase;
3002 device_reg_t *msixbase;
3003 uint16_t msix_count;
3004 uint8_t mqenable;
3005 struct req_que **req_q_map;
3006 struct rsp_que **rsp_q_map;
3007 unsigned long req_qid_map[(QLA_MAX_QUEUES / 8) / sizeof(unsigned long)];
3008 unsigned long rsp_qid_map[(QLA_MAX_QUEUES / 8) / sizeof(unsigned long)];
3009 uint8_t max_req_queues;
3010 uint8_t max_rsp_queues;
3011 struct qla_npiv_entry *npiv_info;
3012 uint16_t nvram_npiv_size;
3014 uint16_t switch_cap;
3020 uint8_t port_no; /* Physical port of adapter */
3023 uint8_t loop_down_abort_time; /* port down timer */
3024 atomic_t loop_down_timer; /* loop down timer */
3025 uint8_t link_down_timeout; /* link down timeout */
3026 uint16_t max_loop_id;
3027 uint16_t max_fibre_devices; /* Maximum number of targets */
3029 uint16_t fb_rev;
3030 uint16_t min_external_loopid; /* First external loop Id */
3040 uint16_t link_data_rate; /* F/W operating speed */
3042 uint8_t current_topology;
3043 uint8_t prev_topology;
3049 uint8_t operating_mode; /* F/W operating mode */
3054 uint8_t interrupts_on;
3055 uint32_t isp_abort_cnt;
3066 uint32_t device_type;
3175 uint8_t serial0;
3176 uint8_t serial1;
3177 uint8_t serial2;
3182 uint16_t nvram_size;
3183 uint16_t nvram_base;
3184 void *nvram;
3185 uint16_t vpd_size;
3186 uint16_t vpd_base;
3187 void *vpd;
3189 uint16_t loop_reset_delay;
3190 uint8_t retry_count;
3191 uint8_t login_timeout;
3192 uint16_t r_a_tov;
3193 int port_down_retry_count;
3194 uint8_t mbx_count;
3195 uint8_t aen_mbx_count;
3197 uint32_t login_retry_count;
3199 ms_iocb_entry_t *ms_iocb;
3200 dma_addr_t ms_iocb_dma;
3201 struct ct_sns_pkt *ct_sns;
3202 dma_addr_t ct_sns_dma;
3204 struct sns_cmd_pkt *sns_cmd;
3205 dma_addr_t sns_cmd_dma;
3209 void *sfp_data;
3210 dma_addr_t sfp_data_dma;
3213 void *xgmac_data;
3214 dma_addr_t xgmac_data_dma;
3217 void *dcbx_tlv;
3218 dma_addr_t dcbx_tlv_dma;
3220 struct task_struct *dpc_thread;
3221 uint8_t dpc_active; /* DPC routine is active */
3223 dma_addr_t gid_list_dma;
3224 struct gid_list_info *gid_list;
3225 int gid_list_info_size;
3229 struct dma_pool *s_dma_pool;
3231 dma_addr_t init_cb_dma;
3232 init_cb_t *init_cb;
3233 int init_cb_size;
3234 dma_addr_t ex_init_cb_dma;
3235 struct ex_init_cb_81xx *ex_init_cb;
3237 void *async_pd;
3238 dma_addr_t async_pd_dma;
3240 void *swl;
3243 uint16_t mailbox_out[MAILBOX_REGISTER_COUNT];
3244 uint32_t mailbox_out32[MAILBOX_REGISTER_COUNT];
3245 uint32_t aenmb[AEN_MAILBOX_REGISTER_COUNT_FX00];
3247 mbx_cmd_t *mcp;
3248 struct mbx_cmd_32 *mcp32;
3250 unsigned long mbx_cmd_flags;
3255 struct mutex vport_lock; /* Virtual port synchronization */
3256 spinlock_t vport_slock; /* order is hardware_lock, then vport_slock */
3257 struct completion mbx_cmd_comp; /* Serialize mbx access */
3258 struct completion mbx_intr_comp; /* Used for completion notification */
3259 struct completion dcbx_comp; /* For set port config notification */
3260 struct completion lb_portup_comp; /* Used to wait for link up during
3265 int notify_dcbx_comp;
3266 int notify_lb_portup_comp;
3267 struct mutex selflogin_lock;
3270 uint16_t fw_major_version;
3271 uint16_t fw_minor_version;
3272 uint16_t fw_subminor_version;
3273 uint16_t fw_attributes;
3274 uint16_t fw_attributes_h;
3275 uint16_t fw_attributes_ext[2];
3276 uint32_t fw_memory_size;
3277 uint32_t fw_transfer_size;
3278 uint32_t fw_srisc_address;
3282 uint16_t fw_xcb_count;
3283 uint16_t fw_iocb_count;
3285 uint32_t fw_shared_ram_start;
3286 uint32_t fw_shared_ram_end;
3288 uint16_t fw_options[16]; /* slots: 1,2,3,10,11 */
3289 uint8_t fw_seriallink_options[4];
3290 uint16_t fw_seriallink_options24[4];
3292 uint8_t mpi_version[3];
3293 uint32_t mpi_capabilities;
3294 uint8_t phy_version[3];
3295 uint8_t pep_version[3];
3298 void *fw_dump_template;
3299 uint32_t fw_dump_template_len;
3301 struct qla2xxx_fw_dump *fw_dump;
3302 uint32_t fw_dump_len;
3303 int fw_dumped;
3304 unsigned long fw_dump_cap_flags;
3313 int fw_dump_reading;
3314 int prev_minidump_failed;
3315 dma_addr_t eft_dma;
3316 void *eft;
3319 dma_addr_t mctp_dump_dma;
3320 void *mctp_dump;
3321 int mctp_dumped;
3322 int mctp_dump_reading;
3323 uint32_t chain_offset;
3324 struct dentry *dfs_dir;
3325 struct dentry *dfs_fce;
3326 dma_addr_t fce_dma;
3327 void *fce;
3328 uint32_t fce_bufs;
3329 uint16_t fce_mb[8];
3330 uint64_t fce_wr, fce_rd;
3331 struct mutex fce_mutex;
3333 uint32_t pci_attr;
3334 uint16_t chip_revision;
3336 uint16_t product_id[4];
3338 uint8_t model_number[16+1];
3340 char model_desc[80];
3341 uint8_t adapter_id[16+1];
3344 char *optrom_buffer;
3345 uint32_t optrom_size;
3346 int optrom_state;
3350 uint32_t optrom_region_start;
3351 uint32_t optrom_region_size;
3352 struct mutex optrom_mutex;
3358 uint8_t bios_revision[2];
3359 uint8_t efi_revision[2];
3360 uint8_t fcode_revision[16];
3361 uint32_t fw_revision[4];
3363 uint32_t gold_fw_version[4];
3366 uint32_t flash_conf_off;
3367 uint32_t flash_data_off;
3368 uint32_t nvram_conf_off;
3369 uint32_t nvram_data_off;
3371 uint32_t fdt_wrt_disable;
3372 uint32_t fdt_wrt_enable;
3373 uint32_t fdt_erase_cmd;
3374 uint32_t fdt_block_size;
3375 uint32_t fdt_unprotect_sec_cmd;
3376 uint32_t fdt_protect_sec_cmd;
3377 uint32_t fdt_wrt_sts_reg_cmd;
3379 uint32_t flt_region_flt;
3380 uint32_t flt_region_fdt;
3381 uint32_t flt_region_boot;
3382 uint32_t flt_region_fw;
3383 uint32_t flt_region_vpd_nvram;
3384 uint32_t flt_region_vpd;
3385 uint32_t flt_region_nvram;
3386 uint32_t flt_region_npiv_conf;
3387 uint32_t flt_region_gold_fw;
3388 uint32_t flt_region_fcp_prio;
3389 uint32_t flt_region_bootload;
3392 uint16_t beacon_blink_led;
3393 uint8_t beacon_color_state;
3399 uint16_t zio_mode;
3400 uint16_t zio_timer;
3402 struct qla_msix_entry *msix_entries;
3404 struct list_head vp_list; /* list of VP */
3405 unsigned long vp_idx_map[(MAX_MULTI_ID_FABRIC / 8) /
3407 uint16_t num_vhosts; /* number of vports created */
3408 uint16_t num_vsans; /* number of vsan created */
3409 uint16_t max_npiv_vports; /* 63 or 125 per topoloty */
3410 int cur_vport_count;
3412 struct qla_chip_state_84xx *cs84xx;
3413 struct qla_statistics qla_stats;
3414 struct isp_operations *isp_ops;
3415 struct workqueue_struct *wq;
3416 struct qlfc_fw fw_buf;
3419 struct qla_fcp_prio_cfg *fcp_prio_cfg;
3421 struct dma_pool *dl_dma_pool;
3424 struct dma_pool *fcp_cmnd_dma_pool;
3425 mempool_t *ctx_mempool;
3428 void __iomem *nx_pcibase; /* Base I/O address */
3429 void __iomem *nxdb_rd_ptr; /* Doorbell read pointer */
3430 void __iomem *nxdb_wr_ptr; /* Door bell write pointer */
3432 uint32_t crb_win;
3433 uint32_t curr_window;
3434 uint32_t ddr_mn_window;
3435 unsigned long mn_win_crb;
3436 unsigned long ms_win_crb;
3437 int qdr_sn_window;
3438 uint32_t fcoe_dev_init_timeout;
3439 uint32_t fcoe_reset_timeout;
3440 rwlock_t hw_lock;
3441 uint16_t portnum; /* port number */
3442 int link_width;
3443 struct fw_blob *hablob;
3444 struct qla82xx_legacy_intr_set nx_legacy_intr;
3446 uint16_t gbl_dsd_inuse;
3447 uint16_t gbl_dsd_avail;
3448 struct list_head gbl_dsd_list;
3451 uint8_t fw_type;
3452 __le32 file_prd_off; /* File firmware product offset */
3454 uint32_t md_template_size;
3455 void *md_tmplt_hdr;
3456 dma_addr_t md_tmplt_hdr_dma;
3457 void *md_dump;
3458 uint32_t md_dump_size;
3460 void *loop_id_map;
3463 uint32_t idc_audit_ts;
3464 uint32_t idc_extend_tmo;
3467 struct workqueue_struct *dpc_lp_wq;
3468 struct work_struct idc_aen;
3470 struct workqueue_struct *dpc_hp_wq;
3471 struct work_struct nic_core_reset;
3472 struct work_struct idc_state_handler;
3473 struct work_struct nic_core_unrecoverable;
3474 struct work_struct board_disable;
3476 struct mr_data_fx00 mr;
3477 uint32_t chip_reset;
3479 struct qlt_hw_data tgt;
3480 int allow_cna_fw_dump;