Lines Matching defs:qla83xx_fw_dump

168 struct qla83xx_fw_dump {  struct
169 	uint32_t host_status;
170 	uint32_t host_risc_reg[48];
171 	uint32_t pcie_regs[4];
172 	uint32_t host_reg[32];
173 	uint32_t shadow_reg[11];
174 	uint32_t risc_io_reg;
175 	uint16_t mailbox_reg[32];
176 	uint32_t xseq_gp_reg[256];
177 	uint32_t xseq_0_reg[48];
178 	uint32_t xseq_1_reg[16];
179 	uint32_t xseq_2_reg[16];
180 	uint32_t rseq_gp_reg[256];
181 	uint32_t rseq_0_reg[32];
182 	uint32_t rseq_1_reg[16];
183 	uint32_t rseq_2_reg[16];
184 	uint32_t rseq_3_reg[16];
185 	uint32_t aseq_gp_reg[256];
186 	uint32_t aseq_0_reg[32];
187 	uint32_t aseq_1_reg[16];
188 	uint32_t aseq_2_reg[16];
189 	uint32_t aseq_3_reg[16];
190 	uint32_t cmd_dma_reg[64];
191 	uint32_t req0_dma_reg[15];
192 	uint32_t resp0_dma_reg[15];
193 	uint32_t req1_dma_reg[15];
194 	uint32_t xmt0_dma_reg[32];
195 	uint32_t xmt1_dma_reg[32];
196 	uint32_t xmt2_dma_reg[32];
197 	uint32_t xmt3_dma_reg[32];
198 	uint32_t xmt4_dma_reg[32];
199 	uint32_t xmt_data_dma_reg[16];
200 	uint32_t rcvt0_data_dma_reg[32];
201 	uint32_t rcvt1_data_dma_reg[32];
202 	uint32_t risc_gp_reg[128];
203 	uint32_t lmc_reg[128];
204 	uint32_t fpm_hdw_reg[256];
205 	uint32_t rq0_array_reg[256];
206 	uint32_t rq1_array_reg[256];
207 	uint32_t rp0_array_reg[256];
208 	uint32_t rp1_array_reg[256];
209 	uint32_t queue_control_reg[16];
210 	uint32_t fb_hdw_reg[432];
211 	uint32_t at0_array_reg[128];
212 	uint32_t code_ram[0x2400];
213 	uint32_t ext_mem[1];