Lines Matching refs:ha
84 qla2xxx_prep_dump(struct qla_hw_data *ha, struct qla2xxx_fw_dump *fw_dump) in qla2xxx_prep_dump() argument
86 fw_dump->fw_major_version = htonl(ha->fw_major_version); in qla2xxx_prep_dump()
87 fw_dump->fw_minor_version = htonl(ha->fw_minor_version); in qla2xxx_prep_dump()
88 fw_dump->fw_subminor_version = htonl(ha->fw_subminor_version); in qla2xxx_prep_dump()
89 fw_dump->fw_attributes = htonl(ha->fw_attributes); in qla2xxx_prep_dump()
91 fw_dump->vendor = htonl(ha->pdev->vendor); in qla2xxx_prep_dump()
92 fw_dump->device = htonl(ha->pdev->device); in qla2xxx_prep_dump()
93 fw_dump->subsystem_vendor = htonl(ha->pdev->subsystem_vendor); in qla2xxx_prep_dump()
94 fw_dump->subsystem_device = htonl(ha->pdev->subsystem_device); in qla2xxx_prep_dump()
98 qla2xxx_copy_queues(struct qla_hw_data *ha, void *ptr) in qla2xxx_copy_queues() argument
100 struct req_que *req = ha->req_q_map[0]; in qla2xxx_copy_queues()
101 struct rsp_que *rsp = ha->rsp_q_map[0]; in qla2xxx_copy_queues()
115 qla27xx_dump_mpi_ram(struct qla_hw_data *ha, uint32_t addr, uint32_t *ram, in qla27xx_dump_mpi_ram() argument
121 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla27xx_dump_mpi_ram()
122 dma_addr_t dump_dma = ha->gid_list_dma; in qla27xx_dump_mpi_ram()
123 uint32_t *dump = (uint32_t *)ha->gid_list; in qla27xx_dump_mpi_ram()
129 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla27xx_dump_mpi_ram()
131 dwords = qla2x00_gid_list_size(ha) / 4; in qla27xx_dump_mpi_ram()
151 ha->flags.mbox_int = 0; in qla27xx_dump_mpi_ram()
161 &ha->mbx_cmd_flags); in qla27xx_dump_mpi_ram()
178 ha->flags.mbox_int = 1; in qla27xx_dump_mpi_ram()
180 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { in qla27xx_dump_mpi_ram()
183 ram[cnt + idx] = IS_QLA27XX(ha) ? in qla27xx_dump_mpi_ram()
195 qla24xx_dump_ram(struct qla_hw_data *ha, uint32_t addr, uint32_t *ram, in qla24xx_dump_ram() argument
201 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_dump_ram()
202 dma_addr_t dump_dma = ha->gid_list_dma; in qla24xx_dump_ram()
203 uint32_t *dump = (uint32_t *)ha->gid_list; in qla24xx_dump_ram()
209 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla24xx_dump_ram()
211 dwords = qla2x00_gid_list_size(ha) / 4; in qla24xx_dump_ram()
229 ha->flags.mbox_int = 0; in qla24xx_dump_ram()
239 &ha->mbx_cmd_flags); in qla24xx_dump_ram()
255 ha->flags.mbox_int = 1; in qla24xx_dump_ram()
257 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { in qla24xx_dump_ram()
260 ram[cnt + idx] = IS_QLA27XX(ha) ? in qla24xx_dump_ram()
272 qla24xx_dump_memory(struct qla_hw_data *ha, uint32_t *code_ram, in qla24xx_dump_memory() argument
278 rval = qla24xx_dump_ram(ha, 0x20000, code_ram, cram_size / 4, nxt); in qla24xx_dump_memory()
282 set_bit(RISC_SRAM_DUMP_CMPL, &ha->fw_dump_cap_flags); in qla24xx_dump_memory()
285 rval = qla24xx_dump_ram(ha, 0x100000, *nxt, in qla24xx_dump_memory()
286 ha->fw_memory_size - 0x100000 + 1, nxt); in qla24xx_dump_memory()
288 set_bit(RISC_EXT_MEM_DUMP_CMPL, &ha->fw_dump_cap_flags); in qla24xx_dump_memory()
308 qla24xx_pause_risc(struct device_reg_24xx __iomem *reg, struct qla_hw_data *ha) in qla24xx_pause_risc() argument
315 set_bit(RISC_PAUSE_CMPL, &ha->fw_dump_cap_flags); in qla24xx_pause_risc()
319 qla24xx_soft_reset(struct qla_hw_data *ha) in qla24xx_soft_reset() argument
324 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_soft_reset()
339 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); in qla24xx_soft_reset()
343 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); in qla24xx_soft_reset()
356 set_bit(ISP_RESET_CMPL, &ha->fw_dump_cap_flags); in qla24xx_soft_reset()
369 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); in qla24xx_soft_reset()
375 qla2xxx_dump_ram(struct qla_hw_data *ha, uint32_t addr, uint16_t *ram, in qla2xxx_dump_ram() argument
381 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2xxx_dump_ram()
382 dma_addr_t dump_dma = ha->gid_list_dma; in qla2xxx_dump_ram()
383 uint16_t *dump = (uint16_t *)ha->gid_list; in qla2xxx_dump_ram()
388 WRT_MAILBOX_REG(ha, reg, 0, MBC_DUMP_RISC_RAM_EXTENDED); in qla2xxx_dump_ram()
389 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla2xxx_dump_ram()
391 words = qla2x00_gid_list_size(ha) / 2; in qla2xxx_dump_ram()
397 WRT_MAILBOX_REG(ha, reg, 1, LSW(addr)); in qla2xxx_dump_ram()
398 WRT_MAILBOX_REG(ha, reg, 8, MSW(addr)); in qla2xxx_dump_ram()
400 WRT_MAILBOX_REG(ha, reg, 2, MSW(dump_dma)); in qla2xxx_dump_ram()
401 WRT_MAILBOX_REG(ha, reg, 3, LSW(dump_dma)); in qla2xxx_dump_ram()
402 WRT_MAILBOX_REG(ha, reg, 6, MSW(MSD(dump_dma))); in qla2xxx_dump_ram()
403 WRT_MAILBOX_REG(ha, reg, 7, LSW(MSD(dump_dma))); in qla2xxx_dump_ram()
405 WRT_MAILBOX_REG(ha, reg, 4, words); in qla2xxx_dump_ram()
416 &ha->mbx_cmd_flags); in qla2xxx_dump_ram()
418 mb0 = RD_MAILBOX_REG(ha, reg, 0); in qla2xxx_dump_ram()
428 &ha->mbx_cmd_flags); in qla2xxx_dump_ram()
430 mb0 = RD_MAILBOX_REG(ha, reg, 0); in qla2xxx_dump_ram()
445 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { in qla2xxx_dump_ram()
469 qla24xx_copy_eft(struct qla_hw_data *ha, void *ptr) in qla24xx_copy_eft() argument
471 if (!ha->eft) in qla24xx_copy_eft()
474 memcpy(ptr, ha->eft, ntohl(ha->fw_dump->eft_size)); in qla24xx_copy_eft()
475 return ptr + ntohl(ha->fw_dump->eft_size); in qla24xx_copy_eft()
479 qla25xx_copy_fce(struct qla_hw_data *ha, void *ptr, uint32_t **last_chain) in qla25xx_copy_fce() argument
485 if (!ha->fce) in qla25xx_copy_fce()
491 fce_calc_size(ha->fce_bufs)); in qla25xx_copy_fce()
492 fcec->size = htonl(fce_calc_size(ha->fce_bufs)); in qla25xx_copy_fce()
493 fcec->addr_l = htonl(LSD(ha->fce_dma)); in qla25xx_copy_fce()
494 fcec->addr_h = htonl(MSD(ha->fce_dma)); in qla25xx_copy_fce()
498 *iter_reg++ = htonl(ha->fce_mb[cnt]); in qla25xx_copy_fce()
500 memcpy(iter_reg, ha->fce, ntohl(fcec->size)); in qla25xx_copy_fce()
506 qla2xxx_copy_atioqueues(struct qla_hw_data *ha, void *ptr, in qla2xxx_copy_atioqueues() argument
518 if (!ha->tgt.atio_ring) in qla2xxx_copy_atioqueues()
523 aqp->length = ha->tgt.atio_q_length; in qla2xxx_copy_atioqueues()
524 aqp->ring = ha->tgt.atio_ring; in qla2xxx_copy_atioqueues()
554 qla25xx_copy_mqueues(struct qla_hw_data *ha, void *ptr, uint32_t **last_chain) in qla25xx_copy_mqueues() argument
562 if (!ha->mqenable) in qla25xx_copy_mqueues()
566 for (que = 1; que < ha->max_req_queues; que++) { in qla25xx_copy_mqueues()
567 req = ha->req_q_map[que]; in qla25xx_copy_mqueues()
594 for (que = 1; que < ha->max_rsp_queues; que++) { in qla25xx_copy_mqueues()
595 rsp = ha->rsp_q_map[que]; in qla25xx_copy_mqueues()
625 qla25xx_copy_mq(struct qla_hw_data *ha, void *ptr, uint32_t **last_chain) in qla25xx_copy_mq() argument
632 if (!ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) in qla25xx_copy_mq()
640 que_cnt = ha->max_req_queues > ha->max_rsp_queues ? in qla25xx_copy_mq()
641 ha->max_req_queues : ha->max_rsp_queues; in qla25xx_copy_mq()
644 reg = ISP_QUE_REG(ha, cnt); in qla25xx_copy_mq()
662 struct qla_hw_data *ha = vha->hw; in qla2xxx_dump_post_process() local
667 rval, ha->fw_dump_cap_flags); in qla2xxx_dump_post_process()
668 ha->fw_dumped = 0; in qla2xxx_dump_post_process()
672 vha->host_no, ha->fw_dump, ha->fw_dump_cap_flags); in qla2xxx_dump_post_process()
673 ha->fw_dumped = 1; in qla2xxx_dump_post_process()
688 struct qla_hw_data *ha = vha->hw; in qla2300_fw_dump() local
689 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2300_fw_dump()
694 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla2300_fw_dump()
700 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2300_fw_dump()
703 if (!ha->fw_dump) { in qla2300_fw_dump()
709 if (ha->fw_dumped) { in qla2300_fw_dump()
713 ha->fw_dump); in qla2300_fw_dump()
716 fw = &ha->fw_dump->isp.isp23; in qla2300_fw_dump()
717 qla2xxx_prep_dump(ha, ha->fw_dump); in qla2300_fw_dump()
724 if (IS_QLA2300(ha)) { in qla2300_fw_dump()
806 if (!IS_QLA2300(ha)) { in qla2300_fw_dump()
807 for (cnt = 30000; RD_MAILBOX_REG(ha, reg, 0) != 0 && in qla2300_fw_dump()
818 rval = qla2xxx_dump_ram(ha, 0x800, fw->risc_ram, in qla2300_fw_dump()
823 rval = qla2xxx_dump_ram(ha, 0x10000, fw->stack_ram, in qla2300_fw_dump()
828 rval = qla2xxx_dump_ram(ha, 0x11000, fw->data_ram, in qla2300_fw_dump()
829 ha->fw_memory_size - 0x11000 + 1, &nxt); in qla2300_fw_dump()
832 qla2xxx_copy_queues(ha, nxt); in qla2300_fw_dump()
839 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2300_fw_dump()
857 struct qla_hw_data *ha = vha->hw; in qla2100_fw_dump() local
858 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2100_fw_dump()
862 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla2100_fw_dump()
870 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2100_fw_dump()
873 if (!ha->fw_dump) { in qla2100_fw_dump()
879 if (ha->fw_dumped) { in qla2100_fw_dump()
883 ha->fw_dump); in qla2100_fw_dump()
886 fw = &ha->fw_dump->isp.isp21; in qla2100_fw_dump()
887 qla2xxx_prep_dump(ha, ha->fw_dump); in qla2100_fw_dump()
907 for (cnt = 0; cnt < ha->mbx_count; cnt++) { in qla2100_fw_dump()
960 for (cnt = 30000; RD_MAILBOX_REG(ha, reg, 0) != 0 && in qla2100_fw_dump()
969 if (rval == QLA_SUCCESS && (IS_QLA2200(ha) || (IS_QLA2100(ha) && in qla2100_fw_dump()
983 if (IS_QLA2100(ha)) in qla2100_fw_dump()
997 WRT_MAILBOX_REG(ha, reg, 0, MBC_READ_RAM_WORD); in qla2100_fw_dump()
998 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla2100_fw_dump()
1002 WRT_MAILBOX_REG(ha, reg, 1, risc_address); in qla2100_fw_dump()
1010 &ha->mbx_cmd_flags); in qla2100_fw_dump()
1012 mb0 = RD_MAILBOX_REG(ha, reg, 0); in qla2100_fw_dump()
1013 mb2 = RD_MAILBOX_REG(ha, reg, 2); in qla2100_fw_dump()
1027 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { in qla2100_fw_dump()
1036 qla2xxx_copy_queues(ha, &fw->risc_ram[cnt]); in qla2100_fw_dump()
1043 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2100_fw_dump()
1054 struct qla_hw_data *ha = vha->hw; in qla24xx_fw_dump() local
1055 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_fw_dump()
1064 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla24xx_fw_dump()
1066 if (IS_P3P_TYPE(ha)) in qla24xx_fw_dump()
1070 ha->fw_dump_cap_flags = 0; in qla24xx_fw_dump()
1074 spin_lock_irqsave(&ha->hardware_lock, flags); in qla24xx_fw_dump()
1077 if (!ha->fw_dump) { in qla24xx_fw_dump()
1083 if (ha->fw_dumped) { in qla24xx_fw_dump()
1087 ha->fw_dump); in qla24xx_fw_dump()
1090 fw = &ha->fw_dump->isp.isp24; in qla24xx_fw_dump()
1091 qla2xxx_prep_dump(ha, ha->fw_dump); in qla24xx_fw_dump()
1099 qla24xx_pause_risc(reg, ha); in qla24xx_fw_dump()
1272 rval = qla24xx_soft_reset(ha); in qla24xx_fw_dump()
1276 rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), in qla24xx_fw_dump()
1281 nxt = qla2xxx_copy_queues(ha, nxt); in qla24xx_fw_dump()
1283 qla24xx_copy_eft(ha, nxt); in qla24xx_fw_dump()
1285 nxt_chain = (void *)ha->fw_dump + ha->chain_offset; in qla24xx_fw_dump()
1286 nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &last_chain); in qla24xx_fw_dump()
1288 ha->fw_dump->version |= htonl(DUMP_CHAIN_VARIANT); in qla24xx_fw_dump()
1293 ha->fw_dump_len = (nxt_chain - (void *)ha->fw_dump); in qla24xx_fw_dump()
1301 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla24xx_fw_dump()
1312 struct qla_hw_data *ha = vha->hw; in qla25xx_fw_dump() local
1313 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla25xx_fw_dump()
1321 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla25xx_fw_dump()
1324 ha->fw_dump_cap_flags = 0; in qla25xx_fw_dump()
1328 spin_lock_irqsave(&ha->hardware_lock, flags); in qla25xx_fw_dump()
1331 if (!ha->fw_dump) { in qla25xx_fw_dump()
1337 if (ha->fw_dumped) { in qla25xx_fw_dump()
1341 ha->fw_dump); in qla25xx_fw_dump()
1344 fw = &ha->fw_dump->isp.isp25; in qla25xx_fw_dump()
1345 qla2xxx_prep_dump(ha, ha->fw_dump); in qla25xx_fw_dump()
1346 ha->fw_dump->version = htonl(2); in qla25xx_fw_dump()
1354 qla24xx_pause_risc(reg, ha); in qla25xx_fw_dump()
1589 nxt_chain = qla25xx_copy_mq(ha, (void *)ha->fw_dump + ha->chain_offset, in qla25xx_fw_dump()
1592 rval = qla24xx_soft_reset(ha); in qla25xx_fw_dump()
1596 rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), in qla25xx_fw_dump()
1601 nxt = qla2xxx_copy_queues(ha, nxt); in qla25xx_fw_dump()
1603 qla24xx_copy_eft(ha, nxt); in qla25xx_fw_dump()
1606 nxt_chain = qla25xx_copy_fce(ha, nxt_chain, &last_chain); in qla25xx_fw_dump()
1607 nxt_chain = qla25xx_copy_mqueues(ha, nxt_chain, &last_chain); in qla25xx_fw_dump()
1608 nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &last_chain); in qla25xx_fw_dump()
1610 ha->fw_dump->version |= htonl(DUMP_CHAIN_VARIANT); in qla25xx_fw_dump()
1615 ha->fw_dump_len = (nxt_chain - (void *)ha->fw_dump); in qla25xx_fw_dump()
1623 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla25xx_fw_dump()
1634 struct qla_hw_data *ha = vha->hw; in qla81xx_fw_dump() local
1635 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla81xx_fw_dump()
1643 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla81xx_fw_dump()
1646 ha->fw_dump_cap_flags = 0; in qla81xx_fw_dump()
1650 spin_lock_irqsave(&ha->hardware_lock, flags); in qla81xx_fw_dump()
1653 if (!ha->fw_dump) { in qla81xx_fw_dump()
1659 if (ha->fw_dumped) { in qla81xx_fw_dump()
1663 ha->fw_dump); in qla81xx_fw_dump()
1666 fw = &ha->fw_dump->isp.isp81; in qla81xx_fw_dump()
1667 qla2xxx_prep_dump(ha, ha->fw_dump); in qla81xx_fw_dump()
1675 qla24xx_pause_risc(reg, ha); in qla81xx_fw_dump()
1913 nxt_chain = qla25xx_copy_mq(ha, (void *)ha->fw_dump + ha->chain_offset, in qla81xx_fw_dump()
1916 rval = qla24xx_soft_reset(ha); in qla81xx_fw_dump()
1920 rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), in qla81xx_fw_dump()
1925 nxt = qla2xxx_copy_queues(ha, nxt); in qla81xx_fw_dump()
1927 qla24xx_copy_eft(ha, nxt); in qla81xx_fw_dump()
1930 nxt_chain = qla25xx_copy_fce(ha, nxt_chain, &last_chain); in qla81xx_fw_dump()
1931 nxt_chain = qla25xx_copy_mqueues(ha, nxt_chain, &last_chain); in qla81xx_fw_dump()
1932 nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &last_chain); in qla81xx_fw_dump()
1934 ha->fw_dump->version |= htonl(DUMP_CHAIN_VARIANT); in qla81xx_fw_dump()
1939 ha->fw_dump_len = (nxt_chain - (void *)ha->fw_dump); in qla81xx_fw_dump()
1947 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla81xx_fw_dump()
1958 struct qla_hw_data *ha = vha->hw; in qla83xx_fw_dump() local
1959 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla83xx_fw_dump()
1967 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla83xx_fw_dump()
1970 ha->fw_dump_cap_flags = 0; in qla83xx_fw_dump()
1974 spin_lock_irqsave(&ha->hardware_lock, flags); in qla83xx_fw_dump()
1977 if (!ha->fw_dump) { in qla83xx_fw_dump()
1983 if (ha->fw_dumped) { in qla83xx_fw_dump()
1986 "request...\n", ha->fw_dump); in qla83xx_fw_dump()
1989 fw = &ha->fw_dump->isp.isp83; in qla83xx_fw_dump()
1990 qla2xxx_prep_dump(ha, ha->fw_dump); in qla83xx_fw_dump()
1998 qla24xx_pause_risc(reg, ha); in qla83xx_fw_dump()
2393 nxt_chain = qla25xx_copy_mq(ha, (void *)ha->fw_dump + ha->chain_offset, in qla83xx_fw_dump()
2396 rval = qla24xx_soft_reset(ha); in qla83xx_fw_dump()
2419 nxt += (ha->fw_memory_size - 0x100000 + 1); in qla83xx_fw_dump()
2422 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); in qla83xx_fw_dump()
2428 rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), in qla83xx_fw_dump()
2434 nxt = qla2xxx_copy_queues(ha, nxt); in qla83xx_fw_dump()
2436 qla24xx_copy_eft(ha, nxt); in qla83xx_fw_dump()
2439 nxt_chain = qla25xx_copy_fce(ha, nxt_chain, &last_chain); in qla83xx_fw_dump()
2440 nxt_chain = qla25xx_copy_mqueues(ha, nxt_chain, &last_chain); in qla83xx_fw_dump()
2441 nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &last_chain); in qla83xx_fw_dump()
2443 ha->fw_dump->version |= htonl(DUMP_CHAIN_VARIANT); in qla83xx_fw_dump()
2448 ha->fw_dump_len = (nxt_chain - (void *)ha->fw_dump); in qla83xx_fw_dump()
2456 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla83xx_fw_dump()
2670 struct qla_hw_data *ha = vha->hw; in ql_dump_regs() local
2671 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in ql_dump_regs()
2672 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; in ql_dump_regs()
2673 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82; in ql_dump_regs()
2679 if (IS_P3P_TYPE(ha)) in ql_dump_regs()
2681 else if (IS_FWI2_CAPABLE(ha)) in ql_dump_regs()
2684 mbx_reg = MAILBOX_REG(ha, reg, 0); in ql_dump_regs()