Lines Matching refs:u32

113 	irqreturn_t (*isr)(struct mvs_info *mvi, int irq, u32 stat);
114 	u32 (*isr_status)(struct mvs_info *mvi, int irq);
118 	u32 (*read_phy_ctl)(struct mvs_info *mvi, u32 port);
119 	void (*write_phy_ctl)(struct mvs_info *mvi, u32 port, u32 val);
121 	u32 (*read_port_cfg_data)(struct mvs_info *mvi, u32 port);
122 	void (*write_port_cfg_data)(struct mvs_info *mvi, u32 port, u32 val);
123 	void (*write_port_cfg_addr)(struct mvs_info *mvi, u32 port, u32 addr);
125 	u32 (*read_port_vsr_data)(struct mvs_info *mvi, u32 port);
126 	void (*write_port_vsr_data)(struct mvs_info *mvi, u32 port, u32 val);
127 	void (*write_port_vsr_addr)(struct mvs_info *mvi, u32 port, u32 addr);
129 	u32 (*read_port_irq_stat)(struct mvs_info *mvi, u32 port);
130 	void (*write_port_irq_stat)(struct mvs_info *mvi, u32 port, u32 val);
132 	u32 (*read_port_irq_mask)(struct mvs_info *mvi, u32 port);
133 	void (*write_port_irq_mask)(struct mvs_info *mvi, u32 port, u32 val);
135 	void (*command_active)(struct mvs_info *mvi, u32 slot_idx);
138 				u32 tfs);
139 	void (*start_delivery)(struct mvs_info *mvi, u32 tx);
140 	u32 (*rx_update)(struct mvs_info *mvi);
144 	u32 (*prd_size)(void);
145 	u32 (*prd_count)(void);
152 	void (*phy_set_link_rate)(struct mvs_info *mvi, u32 phy_id,
154 	u32 (*phy_max_link_rate)(void);
155 	void (*phy_disable)(struct mvs_info *mvi, u32 phy_id);
156 	void (*phy_enable)(struct mvs_info *mvi, u32 phy_id);
157 	void (*phy_reset)(struct mvs_info *mvi, u32 phy_id, int hard);
158 	void (*stp_reset)(struct mvs_info *mvi, u32 phy_id);
160 	u32 (*spi_read_data)(struct mvs_info *mvi);
161 	void (*spi_write_data)(struct mvs_info *mvi, u32 data);
163 						u32      *dwCmd,
167 						u32      addr
169 	int (*spi_issuecmd)(struct mvs_info *mvi, u32 cmd);
170 	int (*spi_waitdataready)(struct mvs_info *mvi, u32 timeout);
171 	void (*dma_fix)(struct mvs_info *mvi, u32 phy_mask,
173 	void (*tune_interrupt)(struct mvs_info *mvi, u32 time);
179 	u32 		n_host;
180 	u32 		n_phy;
181 	u32 		fis_offs;
182 	u32 		fis_count;
183 	u32 		srs_sz;
184 	u32		sg_width;
185 	u32 		slot_width;
227 	u32		att_dev_info;
228 	u32		dev_info;
229 	u32		phy_type;
230 	u32		phy_status;
231 	u32		irq_status;
232 	u32		frame_rcvd_size;
237 	u32		phy_event;
248 	u32 attached_phy;
249 	u32 device_id;
250 	u32 running_req;
294 	u32 reserved1[13];
309 	u32 reserved2[12];
320 	u32 reserved3[10];
329 	u32 n_elem;
330 	u32 tx;
331 	u32 slot_tag;
370 	u32 tx_prod;
377 	u32 rx_cons;
387 	u32 chip_id;
395 	u32 id;
402 	u32 flashsize;
403 	u32 flashsectSize;
438 	u32 tag;
443 void mvs_get_sas_addr(void *buf, u32 buflen);
444 void mvs_tag_clear(struct mvs_info *mvi, u32 tag);
445 void mvs_tag_free(struct mvs_info *mvi, u32 tag);
447 int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out);
451 void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard);
454 void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo,
455 		      u32 off_hi, u64 sas_addr);
468 int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags);
475 void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events);