29 	void (*submit_command)(struct ctlr_info *h,
31 	void (*set_intr_mask)(struct ctlr_info *h, unsigned long val);
32 	bool (*intr_pending)(struct ctlr_info *h);
33 	unsigned long (*command_completed)(struct ctlr_info *h, u8 q);
408 static void SA5_submit_command(struct ctlr_info *h,  in SA5_submit_command()  argument
411 	writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);  in SA5_submit_command()
412 	(void) readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);  in SA5_submit_command()
415 static void SA5_submit_command_no_read(struct ctlr_info *h,  in SA5_submit_command_no_read()  argument
418 	writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);  in SA5_submit_command_no_read()
421 static void SA5_submit_command_ioaccel2(struct ctlr_info *h,  in SA5_submit_command_ioaccel2()  argument
424 	writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);  in SA5_submit_command_ioaccel2()
432 static void SA5_intr_mask(struct ctlr_info *h, unsigned long val)  in SA5_intr_mask()  argument
435 		h->interrupts_enabled = 1;  in SA5_intr_mask()
436 		writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);  in SA5_intr_mask()
437 		(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);  in SA5_intr_mask()
439 		h->interrupts_enabled = 0;  in SA5_intr_mask()
441 			h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);  in SA5_intr_mask()
442 		(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);  in SA5_intr_mask()
446 static void SA5_performant_intr_mask(struct ctlr_info *h, unsigned long val)  in SA5_performant_intr_mask()  argument
449 		h->interrupts_enabled = 1;  in SA5_performant_intr_mask()
450 		writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);  in SA5_performant_intr_mask()
451 		(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);  in SA5_performant_intr_mask()
453 		h->interrupts_enabled = 0;  in SA5_performant_intr_mask()
455 			h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);  in SA5_performant_intr_mask()
456 		(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);  in SA5_performant_intr_mask()
460 static unsigned long SA5_performant_completed(struct ctlr_info *h, u8 q)  in SA5_performant_completed()  argument
462 	struct reply_queue_buffer *rq = &h->reply_queue[q];  in SA5_performant_completed()
466 	if (unlikely(!(h->msi_vector || h->msix_vector))) {  in SA5_performant_completed()
470 		(void) readl(h->vaddr + SA5_OUTDB_STATUS);  in SA5_performant_completed()
471 		writel(SA5_OUTDB_CLEAR_PERF_BIT, h->vaddr + SA5_OUTDB_CLEAR);  in SA5_performant_completed()
475 		(void) readl(h->vaddr + SA5_OUTDB_STATUS);  in SA5_performant_completed()
481 		atomic_dec(&h->commands_outstanding);  in SA5_performant_completed()
486 	if (rq->current_entry == h->max_commands) {  in SA5_performant_completed()
497 static unsigned long SA5_completed(struct ctlr_info *h,  in SA5_completed()  argument
501 		= readl(h->vaddr + SA5_REPLY_PORT_OFFSET);  in SA5_completed()
504 		atomic_dec(&h->commands_outstanding);  in SA5_completed()
508 		dev_dbg(&h->pdev->dev, "Read %lx back from board\n",  in SA5_completed()
511 		dev_dbg(&h->pdev->dev, "FIFO Empty read\n");  in SA5_completed()
519 static bool SA5_intr_pending(struct ctlr_info *h)  in SA5_intr_pending()  argument
522 		readl(h->vaddr + SA5_INTR_STATUS);  in SA5_intr_pending()
526 static bool SA5_performant_intr_pending(struct ctlr_info *h)  in SA5_performant_intr_pending()  argument
528 	unsigned long register_value = readl(h->vaddr + SA5_INTR_STATUS);  in SA5_performant_intr_pending()
534 	register_value = readl(h->vaddr + SA5_OUTDB_STATUS);  in SA5_performant_intr_pending()
540 static bool SA5_ioaccel_mode1_intr_pending(struct ctlr_info *h)  in SA5_ioaccel_mode1_intr_pending()  argument
542 	unsigned long register_value = readl(h->vaddr + SA5_INTR_STATUS);  in SA5_ioaccel_mode1_intr_pending()
553 static unsigned long SA5_ioaccel_mode1_completed(struct ctlr_info *h, u8 q)  in SA5_ioaccel_mode1_completed()  argument
556 	struct reply_queue_buffer *rq = &h->reply_queue[q];  in SA5_ioaccel_mode1_completed()
558 	BUG_ON(q >= h->nreply_queues);  in SA5_ioaccel_mode1_completed()
572 		writel((q << 24) | rq->current_entry, h->vaddr +  in SA5_ioaccel_mode1_completed()
574 		atomic_dec(&h->commands_outstanding);  in SA5_ioaccel_mode1_completed()