138 		val = csio_rd_reg32(hw, reg);  in csio_hw_wait_op_done_val()
167 	val |= csio_rd_reg32(hw, TP_PIO_DATA_A) & ~mask;  in csio_hw_tp_wr_bits_indirect()
175 	uint32_t val = csio_rd_reg32(hw, reg) & ~mask;  in csio_set_reg_field()
179 	csio_rd_reg32(hw, reg);  in csio_set_reg_field()
399 	if (csio_rd_reg32(hw, SF_OP_A) & SF_BUSY_F)  in csio_hw_sf1_read()
407 		*valp = csio_rd_reg32(hw, SF_DATA_A);  in csio_hw_sf1_read()
429 	if (csio_rd_reg32(hw, SF_OP_A) & SF_BUSY_F)  in csio_hw_sf1_write()
798 	while (((reg = csio_rd_reg32(hw, PL_WHOAMI_A)) == 0xFFFFFFFF) &&  in csio_hw_dev_ready()
896 			pcie_fw = csio_rd_reg32(hw, PCIE_FW_A);  in csio_do_hello()
1195 			if (!(csio_rd_reg32(hw, PCIE_FW_A) & PCIE_FW_HALT_F))  in csio_hw_fw_restart()
2058 	hw->chip_ver = (char)csio_rd_reg32(hw, PL_REV_A);  in csio_hw_configure()
2241 	uint32_t pf = SOURCEPF_G(csio_rd_reg32(hw, PL_WHOAMI_A));  in csio_hw_intr_enable()
2242 	uint32_t pl = csio_rd_reg32(hw, PL_INT_ENABLE_A);  in csio_hw_intr_enable()
2293 	uint32_t pf = SOURCEPF_G(csio_rd_reg32(hw, PL_WHOAMI_A));  in csio_hw_intr_disable()
2667 	unsigned int status = csio_rd_reg32(hw, reg);  in csio_handle_intr_status()
2735 	v = (uint64_t)csio_rd_reg32(hw, SGE_INT_CAUSE1_A) |  in csio_sge_intr_handler()
2736 	    ((uint64_t)csio_rd_reg32(hw, SGE_INT_CAUSE2_A) << 32);  in csio_sge_intr_handler()
2996 	csio_rd_reg32(hw, MPS_INT_CAUSE_A);                    /* flush */  in csio_mps_intr_handler()
3021 	v = csio_rd_reg32(hw, addr) & MEM_INT_MASK;  in csio_mem_intr_handler()
3025 		uint32_t cnt = ECC_CECNT_G(csio_rd_reg32(hw, cnt_addr));  in csio_mem_intr_handler()
3044 	uint32_t v, status = csio_rd_reg32(hw, MA_INT_CAUSE_A);  in csio_ma_intr_handler()
3048 			    csio_rd_reg32(hw, MA_PARITY_ERROR_STATUS_A));  in csio_ma_intr_handler()
3050 		v = csio_rd_reg32(hw, MA_INT_WRAP_STATUS_A);  in csio_ma_intr_handler()
3097 	uint32_t v = csio_rd_reg32(hw, T5_PORT_REG(port, MAC_PORT_INT_CAUSE_A));  in csio_xgmac_intr_handler()
3137 	uint32_t cause = csio_rd_reg32(hw, PL_INT_CAUSE_A);  in csio_hw_slow_intr_handler()
3216 	csio_rd_reg32(hw, PL_INT_CAUSE_A); /* flush */  in csio_hw_slow_intr_handler()