Lines Matching refs:NCR5380_read
517 data = NCR5380_read(CURRENT_SCSI_DATA_REG); in NCR5380_print()
518 status = NCR5380_read(STATUS_REG); in NCR5380_print()
519 mr = NCR5380_read(MODE_REG); in NCR5380_print()
520 icr = NCR5380_read(INITIATOR_COMMAND_REG); in NCR5380_print()
521 basr = NCR5380_read(BUS_AND_STATUS_REG); in NCR5380_print()
565 status = NCR5380_read(STATUS_REG); in NCR5380_print_phase()
1124 if ((NCR5380_read(BUS_AND_STATUS_REG) & in NCR5380_dma_complete()
1127 saved_data = NCR5380_read(INPUT_DATA_REG); in NCR5380_dma_complete()
1135 HOSTNO, NCR5380_read(BUS_AND_STATUS_REG), in NCR5380_dma_complete()
1136 NCR5380_read(STATUS_REG)); in NCR5380_dma_complete()
1146 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == in NCR5380_dma_complete()
1149 NCR5380_read(BUS_AND_STATUS_REG)); in NCR5380_dma_complete()
1156 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); in NCR5380_dma_complete()
1171 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) { in NCR5380_dma_complete()
1208 basr = NCR5380_read(BUS_AND_STATUS_REG); in NCR5380_intr()
1213 if ((NCR5380_read(STATUS_REG) & (SR_SEL|SR_IO)) == (SR_SEL|SR_IO)) { in NCR5380_intr()
1217 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); in NCR5380_intr()
1220 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); in NCR5380_intr()
1221 } else if ((NCR5380_read(STATUS_REG) & SR_RST) == SR_RST) { in NCR5380_intr()
1223 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); in NCR5380_intr()
1237 if ((NCR5380_read(MODE_REG) & MR_DMA_MODE) && in NCR5380_intr()
1251 HOSTNO, basr, NCR5380_read(MODE_REG), in NCR5380_intr()
1252 NCR5380_read(STATUS_REG)); in NCR5380_intr()
1253 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); in NCR5380_intr()
1263 NCR5380_read(MODE_REG), NCR5380_read(STATUS_REG)); in NCR5380_intr()
1264 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); in NCR5380_intr()
1347 while (!(NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_PROGRESS) && in NCR5380_select()
1358 while (!(NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_PROGRESS) && in NCR5380_select()
1379 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || in NCR5380_select()
1380 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) || in NCR5380_select()
1381 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || in NCR5380_select()
1395 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || in NCR5380_select()
1506 !(NCR5380_read(STATUS_REG) & (SR_BSY | SR_IO))) in NCR5380_select()
1509 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) { in NCR5380_select()
1518 while (time_before(jiffies, timeout) && !(NCR5380_read(STATUS_REG) & SR_BSY)) in NCR5380_select()
1532 if (!(NCR5380_read(STATUS_REG) & SR_BSY)) { in NCR5380_select()
1571 while (!(NCR5380_read(STATUS_REG) & SR_REQ)) in NCR5380_select()
1655 while (!((tmp = NCR5380_read(STATUS_REG)) & SR_REQ)) in NCR5380_transfer_pio()
1671 *d = NCR5380_read(CURRENT_SCSI_DATA_REG); in NCR5380_transfer_pio()
1700 while (NCR5380_read(STATUS_REG) & SR_REQ) in NCR5380_transfer_pio()
1728 tmp = NCR5380_read(STATUS_REG); in NCR5380_transfer_pio()
1771 while (!((tmp = NCR5380_read(STATUS_REG)) & SR_REQ)) in do_abort()
1779 while (NCR5380_read(STATUS_REG) & SR_REQ) in do_abort()
1849 NCR5380_read(RESET_PARITY_INTERRUPT_REG); in NCR5380_transfer_dma()
1852 (NCR5380_read(MODE_REG) | MR_DMA_MODE | MR_ENABLE_EOP_INTR)); in NCR5380_transfer_dma()
1856 NCR5380_read(RESET_PARITY_INTERRUPT_REG); in NCR5380_transfer_dma()
1859 (NCR5380_read(MODE_REG) | MR_DMA_MODE | MR_ENABLE_EOP_INTR)); in NCR5380_transfer_dma()
1875 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) { in NCR5380_transfer_dma()
1963 tmp = NCR5380_read(STATUS_REG); in NCR5380_information_transfer()
2004 while (NCR5380_read(STATUS_REG) & SR_REQ) in NCR5380_information_transfer()
2247 while ((NCR5380_read(STATUS_REG) & SR_BSY) && !hostdata->connected) in NCR5380_information_transfer()
2307 while ((NCR5380_read(STATUS_REG) & SR_BSY) && !hostdata->connected) in NCR5380_information_transfer()
2493 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask); in NCR5380_reselect()
2508 while (NCR5380_read(STATUS_REG) & SR_SEL) in NCR5380_reselect()
2516 while (!(NCR5380_read(STATUS_REG) & SR_REQ)) in NCR5380_reselect()
2524 msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG); in NCR5380_reselect()
2685 NCR5380_read(BUS_AND_STATUS_REG), in NCR5380_abort()
2686 NCR5380_read(STATUS_REG)); in NCR5380_abort()
2884 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG))); in NCR5380_bus_reset()
2895 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); in NCR5380_bus_reset()