1623 		u_int	scsirate;  in ahc_handle_scsiint()  local
1664 		scsirate = ahc_inb(ahc, SCSIRATE);  in ahc_handle_scsiint()
1670 			       scsirate);  in ahc_handle_scsiint()
1682 					       (scsirate & SINGLE_EDGE)  in ahc_handle_scsiint()
2347 ahc_find_period(struct ahc_softc *ahc, u_int scsirate, u_int maxsync)  in ahc_find_period()  argument
2352 		scsirate &= SXFR_ULTRA2;  in ahc_find_period()
2354 		scsirate &= SXFR;  in ahc_find_period()
2373 			else if (scsirate == (syncrate->sxfr_u2 & SXFR_ULTRA2))  in ahc_find_period()
2375 		} else if (scsirate == (syncrate->sxfr & SXFR)) {  in ahc_find_period()
2536 		u_int	scsirate;  in ahc_set_syncrate()  local
2539 		scsirate = tinfo->scsirate;  in ahc_set_syncrate()
2542 			scsirate &= ~(SXFR_ULTRA2|SINGLE_EDGE|ENABLE_CRC);  in ahc_set_syncrate()
2544 				scsirate |= syncrate->sxfr_u2;  in ahc_set_syncrate()
2546 					scsirate |= ENABLE_CRC;  in ahc_set_syncrate()
2548 					scsirate |= SINGLE_EDGE;  in ahc_set_syncrate()
2552 			scsirate &= ~(SXFR|SOFS);  in ahc_set_syncrate()
2563 				scsirate |= syncrate->sxfr & SXFR;  in ahc_set_syncrate()
2564 				scsirate |= offset & SOFS;  in ahc_set_syncrate()
2577 			ahc_outb(ahc, SCSIRATE, scsirate);  in ahc_set_syncrate()
2582 		tinfo->scsirate = scsirate;  in ahc_set_syncrate()
2642 		u_int	scsirate;  in ahc_set_width()  local
2645 		scsirate =  tinfo->scsirate;  in ahc_set_width()
2646 		scsirate &= ~WIDEXFER;  in ahc_set_width()
2648 			scsirate |= WIDEXFER;  in ahc_set_width()
2650 		tinfo->scsirate = scsirate;  in ahc_set_width()
2653 			ahc_outb(ahc, SCSIRATE, scsirate);  in ahc_set_width()
2719 		pending_hscb->scsirate = tinfo->scsirate;  in ahc_update_pending_scbs()
2759 		ahc_outb(ahc, SCB_SCSIRATE, pending_hscb->scsirate);  in ahc_update_pending_scbs()
3598 	targ_scsirate = tinfo->scsirate;  in ahc_parse_msg()
5514 			u_int scsirate;  in ahc_init()  local
5518 			scsirate = ahc_inb(ahc, TARG_SCSIRATE + i);  in ahc_init()
5524 				if ((scsirate & SOFS) == 0x0F) {  in ahc_init()
5529 					scsirate = (scsirate & SXFR) >> 4  in ahc_init()
5532 						 | (scsirate & WIDEXFER);  in ahc_init()
5536 				if ((scsirate & ~WIDEXFER) == 0 && offset != 0)  in ahc_init()
5538 					scsirate |= 0x1c;  in ahc_init()
5543 				    ahc_find_period(ahc, scsirate, maxsync);  in ahc_init()
5548 				if ((scsirate & SXFR_ULTRA2) <= 8/*10MHz*/  in ahc_init()
5552 			} else if ((scsirate & SOFS) != 0) {  in ahc_init()
5553 				if ((scsirate & SXFR) == 0x40  in ahc_init()
5556 					scsirate &= ~SXFR;  in ahc_init()
5560 				    ahc_find_period(ahc, scsirate,  in ahc_init()
5569 			if ((scsirate & WIDEXFER) != 0  in ahc_init()