Lines Matching refs:phase

187 		 * setup the phase for receiving messages
455 * Assert BSY and setup the phase for
648 * should go into the message out phase since we have ATN
658 * the bus phase.
839 * If we re-enter the data phase after going through another
840 * phase, our transfer location has almost certainly been
848 /* We have seen a data phase for the first time */
890 * us to another phase, and then notify the host.
915 * completes or the target changes phase.
935 * The transfer has terminated either due to a phase
941 * complete) that usually follow a data phase.
949 * data phase.
965 * pickup on the next segment on the next data phase.
1119 * zero, or the target changes the phase (in light of this,
1123 * or a phase change, so just wait for FIFO empty status.
1256 * If the target has left us in data phase, loop through
1329 * Since we've been through a data phase, the SCB_RESID* fields
1335 /* Clear the channel in case we return to data phase later */
1345 * initiator before changing phase. We only need to
1365 * Command phase. Set up the DMA registers and let 'er rip.
1454 * Don't allow a data phase if the command
1464 * Status phase. Wait for the data byte to appear, then read it
1475 * Message out phase. If MSG_OUT is MSG_IDENTIFYFLAG, build a full
1479 * it to handle the message phase completely on its own. If the bit
1495 * in case the target decides to put us in this phase for some strange
1528 * phase and any required retries.
1539 * If the next bus phase after ATN drops is message out, it means
1552 * Message in phase. Bytes are read using Automatic PIO mode.
1618 * Either way, the target should take us to message out phase
1703 * should take us to message out phase and then attempt to
1723 * only if we've actually been into a data phase to change them. This
1775 * SCB anytime we enter a data phase for the first time, so all
1776 * we need to do is clear the DPHASE flag and let the data phase
1778 * sure we have a clean start for the next data or command phase.
1998 * Change to a new phase. If we are changing the state of the I/O signal,
2005 /* Change the phase */