325 		r = NCR5380_read(reg);  in NCR5380_poll_politely()
334 		r = NCR5380_read(reg);  in NCR5380_poll_politely()
413 	data = NCR5380_read(CURRENT_SCSI_DATA_REG);  in NCR5380_print()
414 	status = NCR5380_read(STATUS_REG);  in NCR5380_print()
415 	mr = NCR5380_read(MODE_REG);  in NCR5380_print()
416 	icr = NCR5380_read(INITIATOR_COMMAND_REG);  in NCR5380_print()
417 	basr = NCR5380_read(BUS_AND_STATUS_REG);  in NCR5380_print()
455 	status = NCR5380_read(STATUS_REG);  in NCR5380_print_phase()
864 	for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {  in NCR5380_init()
1118 		basr = NCR5380_read(BUS_AND_STATUS_REG);  in NCR5380_intr()
1122 			if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {  in NCR5380_intr()
1126 				(void) NCR5380_read(RESET_PARITY_INTERRUPT_REG);  in NCR5380_intr()
1129 				(void) NCR5380_read(RESET_PARITY_INTERRUPT_REG);  in NCR5380_intr()
1130 			} else if ((NCR5380_read(STATUS_REG) & SR_RST) == SR_RST) {  in NCR5380_intr()
1132 				(void) NCR5380_read(RESET_PARITY_INTERRUPT_REG);  in NCR5380_intr()
1141 …if ((NCR5380_read(MODE_REG) & MR_DMA) && ((basr & BASR_END_DMA_TRANSFER) || !(basr & BASR_PHASE_MA…  in NCR5380_intr()
1152 					(void) NCR5380_read(RESET_PARITY_INTERRUPT_REG);  in NCR5380_intr()
1161 … unknown interrupt, BASR 0x%X, MR 0x%X, SR 0x%x\n", basr, NCR5380_read(MODE_REG), NCR5380_read(STA…  in NCR5380_intr()
1162 				(void) NCR5380_read(RESET_PARITY_INTERRUPT_REG);  in NCR5380_intr()
1265 …f ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || (NCR5380_read(CURRENT_SCSI_DATA…  in NCR5380_select()
1277 	    (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {  in NCR5380_select()
1364 	value = NCR5380_read(STATUS_REG) & (SR_BSY | SR_IO);  in NCR5380_select()
1376 	if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {  in NCR5380_select()
1393 	if (!(NCR5380_read(STATUS_REG) & SR_BSY)) {  in NCR5380_select()
1532 		while (!((tmp = NCR5380_read(STATUS_REG)) & SR_REQ) && !break_allowed);  in NCR5380_transfer_pio()
1551 			*d = NCR5380_read(CURRENT_SCSI_DATA_REG);  in NCR5380_transfer_pio()
1604 	tmp = NCR5380_read(STATUS_REG);  in NCR5380_transfer_pio()
1630 	NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));  in do_reset()
1737 	if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {  in NCR5380_transfer_dma()
1776 	dprintk(NDEBUG_DMA, "scsi%d : mode reg = 0x%X\n", instance->host_no, NCR5380_read(MODE_REG));  in NCR5380_transfer_dma()
1796 		tmp = NCR5380_read(BUS_AND_STATUS_REG);  in NCR5380_transfer_dma()
1838 …if (((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == (BASR_PHASE_MATCH | BAS…  in NCR5380_transfer_dma()
1839 			saved_data = NCR5380_read(INPUT_DATA_REGISTER);  in NCR5380_transfer_dma()
1845 …while (((tmp = NCR5380_read(BUS_AND_STATUS_REG)) & BASR_ACK) || (NCR5380_read(STATUS_REG) & SR_REQ…  in NCR5380_transfer_dma()
1853 …ed DMA transfer complete, basr 0x%X, sr 0x%X\n", instance->host_no, tmp, NCR5380_read(STATUS_REG));  in NCR5380_transfer_dma()
1862 	*phase = NCR5380_read(STATUS_REG) & PHASE_MASK;  in NCR5380_transfer_dma()
1920 				while (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_DRQ));  in NCR5380_transfer_dma()
1922 				while (NCR5380_read(STATUS_REG) & SR_REQ);  in NCR5380_transfer_dma()
1923 				d[c - 1] = NCR5380_read(INPUT_DATA_REG);  in NCR5380_transfer_dma()
1940 …while (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_DRQ) && (NCR5380_read(BUS_AND_STATUS_REG) & BASR_…  in NCR5380_transfer_dma()
1947 					if (NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT) {  in NCR5380_transfer_dma()
1954 				while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT));  in NCR5380_transfer_dma()
1965 		if (NCR5380_read(BUS_AND_STATUS_REG) & BASR_IRQ) {  in NCR5380_transfer_dma()
1967 			NCR5380_read(RESET_PARITY_INTERRUPT_REG);  in NCR5380_transfer_dma()
1974 	*phase = NCR5380_read(STATUS_REG) & PHASE_MASK;  in NCR5380_transfer_dma()
2020 		tmp = NCR5380_read(STATUS_REG);
2032 				while (NCR5380_read(STATUS_REG) & SR_REQ);
2216 					while ((NCR5380_read(STATUS_REG) & SR_BSY) && !hostdata->connected)
2252 						while ((NCR5380_read(STATUS_REG) & SR_BSY) && !hostdata->connected)
2429 	target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
2596 …printk(NDEBUG_ABORT, "        basr 0x%X, sr 0x%X\n", NCR5380_read(BUS_AND_STATUS_REG), NCR5380_rea…