125 	u32 dsr;  member
195 static void di_report_tamper_info(struct imxdi_dev *imxdi,  u32 dsr)  in di_report_tamper_info()  argument
203 	if (dsr & DSR_VTD)  in di_report_tamper_info()
207 	if (dsr & DSR_CTD)  in di_report_tamper_info()
211 	if (dsr & DSR_TTD)  in di_report_tamper_info()
215 	if (dsr & DSR_SAD)  in di_report_tamper_info()
220 	if (dsr & DSR_EBD)  in di_report_tamper_info()
224 	if (dsr & DSR_ETAD)  in di_report_tamper_info()
228 	if (dsr & DSR_ETBD)  in di_report_tamper_info()
232 	if (dsr & DSR_WTD)  in di_report_tamper_info()
236 	if (dsr & DSR_MCO)  in di_report_tamper_info()
241 	if (dsr & DSR_TCO)  in di_report_tamper_info()
253 static int di_handle_failure_state(struct imxdi_dev *imxdi, u32 dsr)  in di_handle_failure_state()  argument
257 	dev_dbg(&imxdi->pdev->dev, "DSR register reports: %08X\n", dsr);  in di_handle_failure_state()
260 	di_report_tamper_info(imxdi, dsr);  in di_handle_failure_state()
278 static int di_handle_valid_state(struct imxdi_dev *imxdi, u32 dsr)  in di_handle_valid_state()  argument
285 	if (dsr & DSR_CAF)  in di_handle_valid_state()
291 static int di_handle_invalid_state(struct imxdi_dev *imxdi, u32 dsr)  in di_handle_invalid_state()  argument
348 static int di_handle_invalid_and_failure_state(struct imxdi_dev *imxdi, u32 dsr)  in di_handle_invalid_and_failure_state()  argument
357 	if (dsr & (DSR_WTD | DSR_ETBD | DSR_ETAD | DSR_EBD | DSR_SAD |  in di_handle_invalid_and_failure_state()
386 	di_write_busy_wait(imxdi, dsr & (DSR_WTD | DSR_ETBD | DSR_ETAD |  in di_handle_invalid_and_failure_state()
390 	dsr = readl(imxdi->ioaddr + DSR);  in di_handle_invalid_and_failure_state()
391 	if ((dsr & ~(DSR_NVF | DSR_SVF | DSR_WBF | DSR_WNF |  in di_handle_invalid_and_failure_state()
395 			 dsr & ~(DSR_NVF | DSR_SVF | DSR_WBF | DSR_WNF |  in di_handle_invalid_and_failure_state()
405 	dsr = readl(imxdi->ioaddr + DSR);  in di_handle_invalid_and_failure_state()
406 	if (dsr & DSR_SVF) {  in di_handle_invalid_and_failure_state()
418 	return di_handle_invalid_state(imxdi, dsr);  in di_handle_invalid_and_failure_state()
424 	u32 dsr;  in di_handle_state()  local
426 	dsr = readl(imxdi->ioaddr + DSR);  in di_handle_state()
428 	switch (dsr & (DSR_NVF | DSR_SVF)) {  in di_handle_state()
431 		rc = di_handle_invalid_state(imxdi, dsr);  in di_handle_state()
435 		rc = di_handle_failure_state(imxdi, dsr);  in di_handle_state()
440 		rc = di_handle_invalid_and_failure_state(imxdi, dsr);  in di_handle_state()
444 		rc = di_handle_valid_state(imxdi, dsr);  in di_handle_state()
519 	imxdi->dsr = 0;  in di_write_wait()
526 			imxdi->dsr & (DSR_WCF | DSR_WEF), msecs_to_jiffies(1));  in di_write_wait()
537 	if (imxdi->dsr & DSR_WEF) {  in di_write_wait()
569 	u32 dcr, dsr;  in dryice_rtc_set_mmss()  local
573 	dsr = readl(imxdi->ioaddr + DSR);  in dryice_rtc_set_mmss()
575 	if (!(dcr & DCR_TCE) || (dsr & DSR_SVF)) {  in dryice_rtc_set_mmss()
581 		if ((dcr & DCR_TCSL) || (dsr & DSR_SVF)) {  in dryice_rtc_set_mmss()
685 	u32 dsr, dier;  in dryice_norm_irq()  local
689 	dsr = readl(imxdi->ioaddr + DSR);  in dryice_norm_irq()
693 		if (dsr & DSR_SVF) {  in dryice_norm_irq()
704 			di_report_tamper_info(imxdi, dsr);  in dryice_norm_irq()
718 		if (dsr & (DSR_WCF | DSR_WEF)) {  in dryice_norm_irq()
723 			imxdi->dsr |= dsr;  in dryice_norm_irq()
733 		if (dsr & DSR_CAF) {  in dryice_norm_irq()