Lines Matching refs:regval
124 u32 regval; in tsi57x_set_domain() local
132 TSI578_SP_MODE_GLBL, ®val); in tsi57x_set_domain()
134 regval & ~TSI578_SP_MODE_LUT_512); in tsi57x_set_domain()
146 u32 regval; in tsi57x_get_domain() local
152 TSI578_GLBL_ROUTE_BASE, ®val); in tsi57x_get_domain()
154 *sw_domain = (u8)(regval >> 24); in tsi57x_get_domain()
162 u32 regval; in tsi57x_em_init() local
171 TSI578_SP_MODE(portnum), ®val); in tsi57x_em_init()
174 regval & ~TSI578_SP_MODE_PW_DIS); in tsi57x_em_init()
180 ®val); in tsi57x_em_init()
184 regval & 0x07120214); in tsi57x_em_init()
187 TSI578_SP_INT_STATUS(portnum), ®val); in tsi57x_em_init()
190 regval & 0x000700bd); in tsi57x_em_init()
194 TSI578_SP_CTL_INDEP(portnum), ®val); in tsi57x_em_init()
197 regval | 0x000b0000); in tsi57x_em_init()
202 ®val); in tsi57x_em_init()
203 if ((regval & RIO_PORT_N_CTL_PWIDTH) == RIO_PORT_N_CTL_PWIDTH_4) in tsi57x_em_init()
221 u32 regval; in tsi57x_em_handler() local
233 ®val); in tsi57x_em_handler()
234 if (!(regval & RIO_PORT_N_CTL_LOCKOUT)) { in tsi57x_em_handler()
237 regval | RIO_PORT_N_CTL_LOCKOUT); in tsi57x_em_handler()
241 regval); in tsi57x_em_handler()
249 ®val); in tsi57x_em_handler()
264 ®val); in tsi57x_em_handler()
265 if (regval & RIO_PORT_N_MNT_RSP_RVAL) in tsi57x_em_handler()
281 TSI578_SP_LUT_PEINF(portnum), ®val); in tsi57x_em_handler()
282 regval = (mport->sys_size) ? (regval >> 16) : (regval >> 24); in tsi57x_em_handler()
283 route_port = rdev->rswitch->route_table[regval]; in tsi57x_em_handler()
285 rio_name(rdev), portnum, regval); in tsi57x_em_handler()
287 RIO_GLOBAL_TABLE, regval, route_port); in tsi57x_em_handler()