Lines Matching refs:rio_write_config_32
230 rio_write_config_32(rdev, IDT_PW_INFO_CSR, 0x0000e000); in idtg2_em_init()
237 rio_write_config_32(rdev, IDT_LT_ERR_REPORT_EN, in idtg2_em_init()
245 rio_write_config_32(rdev, IDT_DEV_CTRL_1, in idtg2_em_init()
253 rio_write_config_32(rdev, IDT_PORT_ERR_REPORT_EN_BC, 0x807e8037); in idtg2_em_init()
256 rio_write_config_32(rdev, IDT_PORT_ISERR_REPORT_EN_BC, in idtg2_em_init()
263 rio_write_config_32(rdev, in idtg2_em_init()
270 rio_write_config_32(rdev, IDT_ERR_CAP, IDT_ERR_CAP_LOG_OVERWR); in idtg2_em_init()
277 rio_write_config_32(rdev, IDT_LANE_ERR_REPORT_EN_BC, 0); in idtg2_em_init()
285 rio_write_config_32(rdev, IDT_LANE_CTRL(i), in idtg2_em_init()
294 rio_write_config_32(rdev, IDT_AUX_PORT_ERR_CAP_EN, 0); in idtg2_em_init()
297 rio_write_config_32(rdev, IDT_AUX_ERR_REPORT_EN, 0); in idtg2_em_init()
300 rio_write_config_32(rdev, IDT_JTAG_CTRL, 0); in idtg2_em_init()
304 rio_write_config_32(rdev, IDT_I2C_MCTRL, regval & ~IDT_I2C_MCTRL_GENPW); in idtg2_em_init()
311 rio_write_config_32(rdev, IDT_CFGBLK_ERR_CAPTURE_EN, 0); in idtg2_em_init()
315 rio_write_config_32(rdev, IDT_CFGBLK_ERR_REPORT, in idtg2_em_init()
319 rio_write_config_32(rdev, in idtg2_em_init()
344 rio_write_config_32(rdev, IDT_ISLTL_ADDRESS_CAP, 0); in idtg2_em_handler()
364 rio_write_config_32(rdev, in idtg2_em_handler()
435 rio_write_config_32(rdev, in idtg2_probe()