Lines Matching refs:BIT

38 #define TBCTL_RUN_MASK		(BIT(15) | BIT(14))
40 #define TBCTL_STOP_ON_CYCLE	BIT(14)
41 #define TBCTL_FREE_RUN		(BIT(15) | BIT(14))
42 #define TBCTL_PRDLD_MASK	BIT(3)
44 #define TBCTL_PRDLD_IMDT	BIT(3)
45 #define TBCTL_CLKDIV_MASK	(BIT(12) | BIT(11) | BIT(10) | BIT(9) | \
46 				BIT(8) | BIT(7))
47 #define TBCTL_CTRMODE_MASK	(BIT(1) | BIT(0))
49 #define TBCTL_CTRMODE_DOWN	BIT(0)
50 #define TBCTL_CTRMODE_UPDOWN	BIT(1)
51 #define TBCTL_CTRMODE_FREEZE	(BIT(1) | BIT(0))
70 #define AQCTL_CBU_MASK		(BIT(9) | BIT(8))
71 #define AQCTL_CBU_FRCLOW	BIT(8)
72 #define AQCTL_CBU_FRCHIGH	BIT(9)
73 #define AQCTL_CBU_FRCTOGGLE	(BIT(9) | BIT(8))
74 #define AQCTL_CAU_MASK		(BIT(5) | BIT(4))
75 #define AQCTL_CAU_FRCLOW	BIT(4)
76 #define AQCTL_CAU_FRCHIGH	BIT(5)
77 #define AQCTL_CAU_FRCTOGGLE	(BIT(5) | BIT(4))
78 #define AQCTL_PRD_MASK		(BIT(3) | BIT(2))
79 #define AQCTL_PRD_FRCLOW	BIT(2)
80 #define AQCTL_PRD_FRCHIGH	BIT(3)
81 #define AQCTL_PRD_FRCTOGGLE	(BIT(3) | BIT(2))
82 #define AQCTL_ZRO_MASK		(BIT(1) | BIT(0))
83 #define AQCTL_ZRO_FRCLOW	BIT(0)
84 #define AQCTL_ZRO_FRCHIGH	BIT(1)
85 #define AQCTL_ZRO_FRCTOGGLE	(BIT(1) | BIT(0))
96 #define AQSFRC_RLDCSF_MASK	(BIT(7) | BIT(6))
98 #define AQSFRC_RLDCSF_PRD	BIT(6)
99 #define AQSFRC_RLDCSF_ZROPRD	BIT(7)
100 #define AQSFRC_RLDCSF_IMDT	(BIT(7) | BIT(6))
102 #define AQCSFRC_CSFB_MASK	(BIT(3) | BIT(2))
104 #define AQCSFRC_CSFB_FRCLOW	BIT(2)
105 #define AQCSFRC_CSFB_FRCHIGH	BIT(3)
106 #define AQCSFRC_CSFB_DISSWFRC	(BIT(3) | BIT(2))
107 #define AQCSFRC_CSFA_MASK	(BIT(1) | BIT(0))
109 #define AQCSFRC_CSFA_FRCLOW	BIT(0)
110 #define AQCSFRC_CSFA_FRCHIGH	BIT(1)
111 #define AQCSFRC_CSFA_DISSWFRC	(BIT(1) | BIT(0))