Lines Matching refs:pc

68 	struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip);  in ecap_pwm_config()  local
76 c = pc->clk_rate; in ecap_pwm_config()
85 c = pc->clk_rate; in ecap_pwm_config()
91 pm_runtime_get_sync(pc->chip.dev); in ecap_pwm_config()
93 reg_val = readw(pc->mmio_base + ECCTL2); in ecap_pwm_config()
98 writew(reg_val, pc->mmio_base + ECCTL2); in ecap_pwm_config()
102 writel(duty_cycles, pc->mmio_base + CAP2); in ecap_pwm_config()
103 writel(period_cycles, pc->mmio_base + CAP1); in ecap_pwm_config()
110 writel(duty_cycles, pc->mmio_base + CAP4); in ecap_pwm_config()
111 writel(period_cycles, pc->mmio_base + CAP3); in ecap_pwm_config()
115 reg_val = readw(pc->mmio_base + ECCTL2); in ecap_pwm_config()
118 writew(reg_val, pc->mmio_base + ECCTL2); in ecap_pwm_config()
121 pm_runtime_put_sync(pc->chip.dev); in ecap_pwm_config()
128 struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip); in ecap_pwm_set_polarity() local
131 pm_runtime_get_sync(pc->chip.dev); in ecap_pwm_set_polarity()
132 reg_val = readw(pc->mmio_base + ECCTL2); in ecap_pwm_set_polarity()
140 writew(reg_val, pc->mmio_base + ECCTL2); in ecap_pwm_set_polarity()
141 pm_runtime_put_sync(pc->chip.dev); in ecap_pwm_set_polarity()
147 struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip); in ecap_pwm_enable() local
151 pm_runtime_get_sync(pc->chip.dev); in ecap_pwm_enable()
157 reg_val = readw(pc->mmio_base + ECCTL2); in ecap_pwm_enable()
159 writew(reg_val, pc->mmio_base + ECCTL2); in ecap_pwm_enable()
165 struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip); in ecap_pwm_disable() local
172 reg_val = readw(pc->mmio_base + ECCTL2); in ecap_pwm_disable()
174 writew(reg_val, pc->mmio_base + ECCTL2); in ecap_pwm_disable()
177 pm_runtime_put_sync(pc->chip.dev); in ecap_pwm_disable()
208 struct ecap_pwm_chip *pc; in ecap_pwm_probe() local
211 pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL); in ecap_pwm_probe()
212 if (!pc) in ecap_pwm_probe()
221 pc->clk_rate = clk_get_rate(clk); in ecap_pwm_probe()
222 if (!pc->clk_rate) { in ecap_pwm_probe()
227 pc->chip.dev = &pdev->dev; in ecap_pwm_probe()
228 pc->chip.ops = &ecap_pwm_ops; in ecap_pwm_probe()
229 pc->chip.of_xlate = of_pwm_xlate_with_flags; in ecap_pwm_probe()
230 pc->chip.of_pwm_n_cells = 3; in ecap_pwm_probe()
231 pc->chip.base = -1; in ecap_pwm_probe()
232 pc->chip.npwm = 1; in ecap_pwm_probe()
235 pc->mmio_base = devm_ioremap_resource(&pdev->dev, r); in ecap_pwm_probe()
236 if (IS_ERR(pc->mmio_base)) in ecap_pwm_probe()
237 return PTR_ERR(pc->mmio_base); in ecap_pwm_probe()
239 ret = pwmchip_add(&pc->chip); in ecap_pwm_probe()
258 platform_set_drvdata(pdev, pc); in ecap_pwm_probe()
264 pwmchip_remove(&pc->chip); in ecap_pwm_probe()
270 struct ecap_pwm_chip *pc = platform_get_drvdata(pdev); in ecap_pwm_remove() local
281 return pwmchip_remove(&pc->chip); in ecap_pwm_remove()
285 static void ecap_pwm_save_context(struct ecap_pwm_chip *pc) in ecap_pwm_save_context() argument
287 pm_runtime_get_sync(pc->chip.dev); in ecap_pwm_save_context()
288 pc->ctx.ecctl2 = readw(pc->mmio_base + ECCTL2); in ecap_pwm_save_context()
289 pc->ctx.cap4 = readl(pc->mmio_base + CAP4); in ecap_pwm_save_context()
290 pc->ctx.cap3 = readl(pc->mmio_base + CAP3); in ecap_pwm_save_context()
291 pm_runtime_put_sync(pc->chip.dev); in ecap_pwm_save_context()
294 static void ecap_pwm_restore_context(struct ecap_pwm_chip *pc) in ecap_pwm_restore_context() argument
296 writel(pc->ctx.cap3, pc->mmio_base + CAP3); in ecap_pwm_restore_context()
297 writel(pc->ctx.cap4, pc->mmio_base + CAP4); in ecap_pwm_restore_context()
298 writew(pc->ctx.ecctl2, pc->mmio_base + ECCTL2); in ecap_pwm_restore_context()
303 struct ecap_pwm_chip *pc = dev_get_drvdata(dev); in ecap_pwm_suspend() local
304 struct pwm_device *pwm = pc->chip.pwms; in ecap_pwm_suspend()
306 ecap_pwm_save_context(pc); in ecap_pwm_suspend()
317 struct ecap_pwm_chip *pc = dev_get_drvdata(dev); in ecap_pwm_resume() local
318 struct pwm_device *pwm = pc->chip.pwms; in ecap_pwm_resume()
324 ecap_pwm_restore_context(pc); in ecap_pwm_resume()