87 	struct regmap *regmap;  member
226 	regmap_read(fpc->regmap, FTM_MOD, &val);  in fsl_pwm_calculate_duty()
262 		regmap_update_bits(fpc->regmap, FTM_SC, FTM_SC_PS_MASK,  in fsl_pwm_config()
264 		regmap_write(fpc->regmap, FTM_MOD, period - 1);  in fsl_pwm_config()
273 	regmap_write(fpc->regmap, FTM_CSC(pwm->hwpwm),  in fsl_pwm_config()
275 	regmap_write(fpc->regmap, FTM_CV(pwm->hwpwm), duty);  in fsl_pwm_config()
287 	regmap_read(fpc->regmap, FTM_POL, &val);  in fsl_pwm_set_polarity()
294 	regmap_write(fpc->regmap, FTM_POL, val);  in fsl_pwm_set_polarity()
307 	regmap_update_bits(fpc->regmap, FTM_SC, FTM_SC_CLK_MASK,  in fsl_counter_clock_enable()
329 	regmap_update_bits(fpc->regmap, FTM_OUTMASK, BIT(pwm->hwpwm), 0);  in fsl_pwm_enable()
350 	regmap_update_bits(fpc->regmap, FTM_SC, FTM_SC_CLK_MASK, 0);  in fsl_counter_clock_disable()
362 	regmap_update_bits(fpc->regmap, FTM_OUTMASK, BIT(pwm->hwpwm),  in fsl_pwm_disable()
367 	regmap_read(fpc->regmap, FTM_OUTMASK, &val);  in fsl_pwm_disable()
392 	regmap_write(fpc->regmap, FTM_CNTIN, 0x00);  in fsl_pwm_init()
393 	regmap_write(fpc->regmap, FTM_OUTINIT, 0x00);  in fsl_pwm_init()
394 	regmap_write(fpc->regmap, FTM_OUTMASK, 0xFF);  in fsl_pwm_init()
440 	fpc->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "ftm_sys", base,  in fsl_pwm_probe()
442 	if (IS_ERR(fpc->regmap)) {  in fsl_pwm_probe()
444 		return PTR_ERR(fpc->regmap);  in fsl_pwm_probe()
497 	regcache_cache_only(fpc->regmap, true);  in fsl_pwm_suspend()
498 	regcache_mark_dirty(fpc->regmap);  in fsl_pwm_suspend()
501 	regmap_read(fpc->regmap, FTM_OUTMASK, &val);  in fsl_pwm_suspend()
517 	regmap_read(fpc->regmap, FTM_OUTMASK, &val);  in fsl_pwm_resume()
525 	regcache_cache_only(fpc->regmap, false);  in fsl_pwm_resume()
526 	regcache_sync(fpc->regmap);  in fsl_pwm_resume()