Lines Matching refs:msrs
155 int msrs[RAPL_DOMAIN_MSR_MAX]; member
608 rd->msrs[0] = MSR_PKG_POWER_LIMIT; in rapl_init_domains()
609 rd->msrs[1] = MSR_PKG_ENERGY_STATUS; in rapl_init_domains()
610 rd->msrs[2] = MSR_PKG_PERF_STATUS; in rapl_init_domains()
611 rd->msrs[3] = 0; in rapl_init_domains()
612 rd->msrs[4] = MSR_PKG_POWER_INFO; in rapl_init_domains()
621 rd->msrs[0] = MSR_PP0_POWER_LIMIT; in rapl_init_domains()
622 rd->msrs[1] = MSR_PP0_ENERGY_STATUS; in rapl_init_domains()
623 rd->msrs[2] = 0; in rapl_init_domains()
624 rd->msrs[3] = MSR_PP0_POLICY; in rapl_init_domains()
625 rd->msrs[4] = 0; in rapl_init_domains()
632 rd->msrs[0] = MSR_PP1_POWER_LIMIT; in rapl_init_domains()
633 rd->msrs[1] = MSR_PP1_ENERGY_STATUS; in rapl_init_domains()
634 rd->msrs[2] = 0; in rapl_init_domains()
635 rd->msrs[3] = MSR_PP1_POLICY; in rapl_init_domains()
636 rd->msrs[4] = 0; in rapl_init_domains()
643 rd->msrs[0] = MSR_DRAM_POWER_LIMIT; in rapl_init_domains()
644 rd->msrs[1] = MSR_DRAM_ENERGY_STATUS; in rapl_init_domains()
645 rd->msrs[2] = MSR_DRAM_PERF_STATUS; in rapl_init_domains()
646 rd->msrs[3] = 0; in rapl_init_domains()
647 rd->msrs[4] = MSR_DRAM_POWER_INFO; in rapl_init_domains()
769 msr = rd->msrs[rp->id]; in rapl_read_data_raw()
816 msr = rd->msrs[rp->id]; in rapl_write_data_raw()