Lines Matching refs:pctl

39 sunxi_pinctrl_find_group_by_name(struct sunxi_pinctrl *pctl, const char *group)  in sunxi_pinctrl_find_group_by_name()  argument
43 for (i = 0; i < pctl->ngroups; i++) { in sunxi_pinctrl_find_group_by_name()
44 struct sunxi_pinctrl_group *grp = pctl->groups + i; in sunxi_pinctrl_find_group_by_name()
54 sunxi_pinctrl_find_function_by_name(struct sunxi_pinctrl *pctl, in sunxi_pinctrl_find_function_by_name() argument
57 struct sunxi_pinctrl_function *func = pctl->functions; in sunxi_pinctrl_find_function_by_name()
60 for (i = 0; i < pctl->nfunctions; i++) { in sunxi_pinctrl_find_function_by_name()
72 sunxi_pinctrl_desc_find_function_by_name(struct sunxi_pinctrl *pctl, in sunxi_pinctrl_desc_find_function_by_name() argument
78 for (i = 0; i < pctl->desc->npins; i++) { in sunxi_pinctrl_desc_find_function_by_name()
79 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; in sunxi_pinctrl_desc_find_function_by_name()
97 sunxi_pinctrl_desc_find_function_by_pin(struct sunxi_pinctrl *pctl, in sunxi_pinctrl_desc_find_function_by_pin() argument
103 for (i = 0; i < pctl->desc->npins; i++) { in sunxi_pinctrl_desc_find_function_by_pin()
104 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; in sunxi_pinctrl_desc_find_function_by_pin()
123 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pctrl_get_groups_count() local
125 return pctl->ngroups; in sunxi_pctrl_get_groups_count()
131 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pctrl_get_group_name() local
133 return pctl->groups[group].name; in sunxi_pctrl_get_group_name()
141 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pctrl_get_group_pins() local
143 *pins = (unsigned *)&pctl->groups[group].pin; in sunxi_pctrl_get_group_pins()
154 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pctrl_dt_node_to_map() local
167 dev_err(pctl->dev, in sunxi_pctrl_dt_node_to_map()
175 dev_err(pctl->dev, in sunxi_pctrl_dt_node_to_map()
187 sunxi_pinctrl_find_group_by_name(pctl, group); in sunxi_pctrl_dt_node_to_map()
191 dev_err(pctl->dev, "unknown pin %s", group); in sunxi_pctrl_dt_node_to_map()
195 if (!sunxi_pinctrl_desc_find_function_by_name(pctl, in sunxi_pctrl_dt_node_to_map()
198 dev_err(pctl->dev, "unsupported function %s on pin %s", in sunxi_pctrl_dt_node_to_map()
276 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pconf_group_get() local
278 *config = pctl->groups[group].config; in sunxi_pconf_group_get()
288 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pconf_group_set() local
289 struct sunxi_pinctrl_group *g = &pctl->groups[group]; in sunxi_pconf_group_set()
291 unsigned pin = g->pin - pctl->desc->pin_base; in sunxi_pconf_group_set()
297 spin_lock_irqsave(&pctl->lock, flags); in sunxi_pconf_group_set()
304 spin_unlock_irqrestore(&pctl->lock, flags); in sunxi_pconf_group_set()
315 val = readl(pctl->membase + sunxi_dlevel_reg(pin)); in sunxi_pconf_group_set()
319 pctl->membase + sunxi_dlevel_reg(pin)); in sunxi_pconf_group_set()
322 val = readl(pctl->membase + sunxi_pull_reg(pin)); in sunxi_pconf_group_set()
325 pctl->membase + sunxi_pull_reg(pin)); in sunxi_pconf_group_set()
328 val = readl(pctl->membase + sunxi_pull_reg(pin)); in sunxi_pconf_group_set()
331 pctl->membase + sunxi_pull_reg(pin)); in sunxi_pconf_group_set()
340 spin_unlock_irqrestore(&pctl->lock, flags); in sunxi_pconf_group_set()
352 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pmx_get_funcs_cnt() local
354 return pctl->nfunctions; in sunxi_pmx_get_funcs_cnt()
360 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pmx_get_func_name() local
362 return pctl->functions[function].name; in sunxi_pmx_get_func_name()
370 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pmx_get_func_groups() local
372 *groups = pctl->functions[function].groups; in sunxi_pmx_get_func_groups()
373 *num_groups = pctl->functions[function].ngroups; in sunxi_pmx_get_func_groups()
382 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pmx_set() local
386 spin_lock_irqsave(&pctl->lock, flags); in sunxi_pmx_set()
388 pin -= pctl->desc->pin_base; in sunxi_pmx_set()
389 val = readl(pctl->membase + sunxi_mux_reg(pin)); in sunxi_pmx_set()
392 pctl->membase + sunxi_mux_reg(pin)); in sunxi_pmx_set()
394 spin_unlock_irqrestore(&pctl->lock, flags); in sunxi_pmx_set()
401 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pmx_set_mux() local
402 struct sunxi_pinctrl_group *g = pctl->groups + group; in sunxi_pmx_set_mux()
403 struct sunxi_pinctrl_function *func = pctl->functions + function; in sunxi_pmx_set_mux()
405 sunxi_pinctrl_desc_find_function_by_name(pctl, in sunxi_pmx_set_mux()
423 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pmx_gpio_set_direction() local
432 desc = sunxi_pinctrl_desc_find_function_by_pin(pctl, offset, func); in sunxi_pmx_gpio_set_direction()
457 struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev); in sunxi_pinctrl_gpio_get() local
460 u32 set_mux = pctl->desc->irq_read_needs_mux && in sunxi_pinctrl_gpio_get()
465 sunxi_pmx_set(pctl->pctl_dev, offset, SUN4I_FUNC_INPUT); in sunxi_pinctrl_gpio_get()
467 val = (readl(pctl->membase + reg) >> index) & DATA_PINS_MASK; in sunxi_pinctrl_gpio_get()
470 sunxi_pmx_set(pctl->pctl_dev, offset, SUN4I_FUNC_IRQ); in sunxi_pinctrl_gpio_get()
478 struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev); in sunxi_pinctrl_gpio_set() local
484 spin_lock_irqsave(&pctl->lock, flags); in sunxi_pinctrl_gpio_set()
486 regval = readl(pctl->membase + reg); in sunxi_pinctrl_gpio_set()
493 writel(regval, pctl->membase + reg); in sunxi_pinctrl_gpio_set()
495 spin_unlock_irqrestore(&pctl->lock, flags); in sunxi_pinctrl_gpio_set()
525 struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev); in sunxi_pinctrl_gpio_to_irq() local
527 unsigned pinnum = pctl->desc->pin_base + offset; in sunxi_pinctrl_gpio_to_irq()
533 desc = sunxi_pinctrl_desc_find_function_by_pin(pctl, pinnum, "irq"); in sunxi_pinctrl_gpio_to_irq()
542 return irq_find_mapping(pctl->domain, irqnum); in sunxi_pinctrl_gpio_to_irq()
547 struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d); in sunxi_pinctrl_irq_request_resources() local
551 func = sunxi_pinctrl_desc_find_function_by_pin(pctl, in sunxi_pinctrl_irq_request_resources()
552 pctl->irq_array[d->hwirq], "irq"); in sunxi_pinctrl_irq_request_resources()
556 ret = gpiochip_lock_as_irq(pctl->chip, in sunxi_pinctrl_irq_request_resources()
557 pctl->irq_array[d->hwirq] - pctl->desc->pin_base); in sunxi_pinctrl_irq_request_resources()
559 dev_err(pctl->dev, "unable to lock HW IRQ %lu for IRQ\n", in sunxi_pinctrl_irq_request_resources()
565 sunxi_pmx_set(pctl->pctl_dev, pctl->irq_array[d->hwirq], func->muxval); in sunxi_pinctrl_irq_request_resources()
572 struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d); in sunxi_pinctrl_irq_release_resources() local
574 gpiochip_unlock_as_irq(pctl->chip, in sunxi_pinctrl_irq_release_resources()
575 pctl->irq_array[d->hwirq] - pctl->desc->pin_base); in sunxi_pinctrl_irq_release_resources()
580 struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d); in sunxi_pinctrl_irq_set_type() local
581 u32 reg = sunxi_irq_cfg_reg(d->hwirq, pctl->desc->irq_bank_base); in sunxi_pinctrl_irq_set_type()
607 spin_lock_irqsave(&pctl->lock, flags); in sunxi_pinctrl_irq_set_type()
616 regval = readl(pctl->membase + reg); in sunxi_pinctrl_irq_set_type()
618 writel(regval | (mode << index), pctl->membase + reg); in sunxi_pinctrl_irq_set_type()
620 spin_unlock_irqrestore(&pctl->lock, flags); in sunxi_pinctrl_irq_set_type()
627 struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d); in sunxi_pinctrl_irq_ack() local
629 pctl->desc->irq_bank_base); in sunxi_pinctrl_irq_ack()
633 writel(1 << status_idx, pctl->membase + status_reg); in sunxi_pinctrl_irq_ack()
638 struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d); in sunxi_pinctrl_irq_mask() local
639 u32 reg = sunxi_irq_ctrl_reg(d->hwirq, pctl->desc->irq_bank_base); in sunxi_pinctrl_irq_mask()
644 spin_lock_irqsave(&pctl->lock, flags); in sunxi_pinctrl_irq_mask()
647 val = readl(pctl->membase + reg); in sunxi_pinctrl_irq_mask()
648 writel(val & ~(1 << idx), pctl->membase + reg); in sunxi_pinctrl_irq_mask()
650 spin_unlock_irqrestore(&pctl->lock, flags); in sunxi_pinctrl_irq_mask()
655 struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d); in sunxi_pinctrl_irq_unmask() local
656 u32 reg = sunxi_irq_ctrl_reg(d->hwirq, pctl->desc->irq_bank_base); in sunxi_pinctrl_irq_unmask()
661 spin_lock_irqsave(&pctl->lock, flags); in sunxi_pinctrl_irq_unmask()
664 val = readl(pctl->membase + reg); in sunxi_pinctrl_irq_unmask()
665 writel(val | (1 << idx), pctl->membase + reg); in sunxi_pinctrl_irq_unmask()
667 spin_unlock_irqrestore(&pctl->lock, flags); in sunxi_pinctrl_irq_unmask()
710 struct sunxi_pinctrl *pctl = d->host_data; in sunxi_pinctrl_irq_of_xlate() local
718 pin = pctl->desc->pin_base + base + intspec[1]; in sunxi_pinctrl_irq_of_xlate()
720 desc = sunxi_pinctrl_desc_find_function_by_pin(pctl, pin, "irq"); in sunxi_pinctrl_irq_of_xlate()
738 struct sunxi_pinctrl *pctl = irq_desc_get_handler_data(desc); in sunxi_pinctrl_irq_handler() local
741 for (bank = 0; bank < pctl->desc->irq_banks; bank++) in sunxi_pinctrl_irq_handler()
742 if (irq == pctl->irq[bank]) in sunxi_pinctrl_irq_handler()
745 if (bank == pctl->desc->irq_banks) in sunxi_pinctrl_irq_handler()
748 reg = sunxi_irq_status_reg_from_bank(bank, pctl->desc->irq_bank_base); in sunxi_pinctrl_irq_handler()
749 val = readl(pctl->membase + reg); in sunxi_pinctrl_irq_handler()
756 int pin_irq = irq_find_mapping(pctl->domain, in sunxi_pinctrl_irq_handler()
764 static int sunxi_pinctrl_add_function(struct sunxi_pinctrl *pctl, in sunxi_pinctrl_add_function() argument
767 struct sunxi_pinctrl_function *func = pctl->functions; in sunxi_pinctrl_add_function()
781 pctl->nfunctions++; in sunxi_pinctrl_add_function()
788 struct sunxi_pinctrl *pctl = platform_get_drvdata(pdev); in sunxi_pinctrl_build_state() local
791 pctl->ngroups = pctl->desc->npins; in sunxi_pinctrl_build_state()
794 pctl->groups = devm_kzalloc(&pdev->dev, in sunxi_pinctrl_build_state()
795 pctl->ngroups * sizeof(*pctl->groups), in sunxi_pinctrl_build_state()
797 if (!pctl->groups) in sunxi_pinctrl_build_state()
800 for (i = 0; i < pctl->desc->npins; i++) { in sunxi_pinctrl_build_state()
801 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; in sunxi_pinctrl_build_state()
802 struct sunxi_pinctrl_group *group = pctl->groups + i; in sunxi_pinctrl_build_state()
812 pctl->functions = devm_kzalloc(&pdev->dev, in sunxi_pinctrl_build_state()
813 pctl->desc->npins * sizeof(*pctl->functions), in sunxi_pinctrl_build_state()
815 if (!pctl->functions) in sunxi_pinctrl_build_state()
819 for (i = 0; i < pctl->desc->npins; i++) { in sunxi_pinctrl_build_state()
820 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; in sunxi_pinctrl_build_state()
827 pctl->irq_array[irqnum] = pin->pin.number; in sunxi_pinctrl_build_state()
830 sunxi_pinctrl_add_function(pctl, func->name); in sunxi_pinctrl_build_state()
835 pctl->functions = krealloc(pctl->functions, in sunxi_pinctrl_build_state()
836 pctl->nfunctions * sizeof(*pctl->functions), in sunxi_pinctrl_build_state()
839 for (i = 0; i < pctl->desc->npins; i++) { in sunxi_pinctrl_build_state()
840 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; in sunxi_pinctrl_build_state()
847 func_item = sunxi_pinctrl_find_function_by_name(pctl, in sunxi_pinctrl_build_state()
879 struct sunxi_pinctrl *pctl; in sunxi_pinctrl_init() local
884 pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); in sunxi_pinctrl_init()
885 if (!pctl) in sunxi_pinctrl_init()
887 platform_set_drvdata(pdev, pctl); in sunxi_pinctrl_init()
889 spin_lock_init(&pctl->lock); in sunxi_pinctrl_init()
892 pctl->membase = devm_ioremap_resource(&pdev->dev, res); in sunxi_pinctrl_init()
893 if (IS_ERR(pctl->membase)) in sunxi_pinctrl_init()
894 return PTR_ERR(pctl->membase); in sunxi_pinctrl_init()
896 pctl->dev = &pdev->dev; in sunxi_pinctrl_init()
897 pctl->desc = desc; in sunxi_pinctrl_init()
899 pctl->irq_array = devm_kcalloc(&pdev->dev, in sunxi_pinctrl_init()
900 IRQ_PER_BANK * pctl->desc->irq_banks, in sunxi_pinctrl_init()
901 sizeof(*pctl->irq_array), in sunxi_pinctrl_init()
903 if (!pctl->irq_array) in sunxi_pinctrl_init()
913 pctl->desc->npins * sizeof(*pins), in sunxi_pinctrl_init()
918 for (i = 0; i < pctl->desc->npins; i++) in sunxi_pinctrl_init()
919 pins[i] = pctl->desc->pins[i].pin; in sunxi_pinctrl_init()
930 pctrl_desc->npins = pctl->desc->npins; in sunxi_pinctrl_init()
935 pctl->pctl_dev = pinctrl_register(pctrl_desc, in sunxi_pinctrl_init()
936 &pdev->dev, pctl); in sunxi_pinctrl_init()
937 if (IS_ERR(pctl->pctl_dev)) { in sunxi_pinctrl_init()
939 return PTR_ERR(pctl->pctl_dev); in sunxi_pinctrl_init()
942 pctl->chip = devm_kzalloc(&pdev->dev, sizeof(*pctl->chip), GFP_KERNEL); in sunxi_pinctrl_init()
943 if (!pctl->chip) { in sunxi_pinctrl_init()
948 last_pin = pctl->desc->pins[pctl->desc->npins - 1].pin.number; in sunxi_pinctrl_init()
949 pctl->chip->owner = THIS_MODULE; in sunxi_pinctrl_init()
950 pctl->chip->request = gpiochip_generic_request, in sunxi_pinctrl_init()
951 pctl->chip->free = gpiochip_generic_free, in sunxi_pinctrl_init()
952 pctl->chip->direction_input = sunxi_pinctrl_gpio_direction_input, in sunxi_pinctrl_init()
953 pctl->chip->direction_output = sunxi_pinctrl_gpio_direction_output, in sunxi_pinctrl_init()
954 pctl->chip->get = sunxi_pinctrl_gpio_get, in sunxi_pinctrl_init()
955 pctl->chip->set = sunxi_pinctrl_gpio_set, in sunxi_pinctrl_init()
956 pctl->chip->of_xlate = sunxi_pinctrl_gpio_of_xlate, in sunxi_pinctrl_init()
957 pctl->chip->to_irq = sunxi_pinctrl_gpio_to_irq, in sunxi_pinctrl_init()
958 pctl->chip->of_gpio_n_cells = 3, in sunxi_pinctrl_init()
959 pctl->chip->can_sleep = false, in sunxi_pinctrl_init()
960 pctl->chip->ngpio = round_up(last_pin, PINS_PER_BANK) - in sunxi_pinctrl_init()
961 pctl->desc->pin_base; in sunxi_pinctrl_init()
962 pctl->chip->label = dev_name(&pdev->dev); in sunxi_pinctrl_init()
963 pctl->chip->dev = &pdev->dev; in sunxi_pinctrl_init()
964 pctl->chip->base = pctl->desc->pin_base; in sunxi_pinctrl_init()
966 ret = gpiochip_add(pctl->chip); in sunxi_pinctrl_init()
970 for (i = 0; i < pctl->desc->npins; i++) { in sunxi_pinctrl_init()
971 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; in sunxi_pinctrl_init()
973 ret = gpiochip_add_pin_range(pctl->chip, dev_name(&pdev->dev), in sunxi_pinctrl_init()
974 pin->pin.number - pctl->desc->pin_base, in sunxi_pinctrl_init()
990 pctl->irq = devm_kcalloc(&pdev->dev, in sunxi_pinctrl_init()
991 pctl->desc->irq_banks, in sunxi_pinctrl_init()
992 sizeof(*pctl->irq), in sunxi_pinctrl_init()
994 if (!pctl->irq) { in sunxi_pinctrl_init()
999 for (i = 0; i < pctl->desc->irq_banks; i++) { in sunxi_pinctrl_init()
1000 pctl->irq[i] = platform_get_irq(pdev, i); in sunxi_pinctrl_init()
1001 if (pctl->irq[i] < 0) { in sunxi_pinctrl_init()
1002 ret = pctl->irq[i]; in sunxi_pinctrl_init()
1007 pctl->domain = irq_domain_add_linear(node, in sunxi_pinctrl_init()
1008 pctl->desc->irq_banks * IRQ_PER_BANK, in sunxi_pinctrl_init()
1010 pctl); in sunxi_pinctrl_init()
1011 if (!pctl->domain) { in sunxi_pinctrl_init()
1017 for (i = 0; i < (pctl->desc->irq_banks * IRQ_PER_BANK); i++) { in sunxi_pinctrl_init()
1018 int irqno = irq_create_mapping(pctl->domain, i); in sunxi_pinctrl_init()
1022 irq_set_chip_data(irqno, pctl); in sunxi_pinctrl_init()
1025 for (i = 0; i < pctl->desc->irq_banks; i++) { in sunxi_pinctrl_init()
1027 writel(0, pctl->membase + sunxi_irq_ctrl_reg_from_bank(i, in sunxi_pinctrl_init()
1028 pctl->desc->irq_bank_base)); in sunxi_pinctrl_init()
1030 pctl->membase + sunxi_irq_status_reg_from_bank(i, in sunxi_pinctrl_init()
1031 pctl->desc->irq_bank_base)); in sunxi_pinctrl_init()
1033 irq_set_chained_handler_and_data(pctl->irq[i], in sunxi_pinctrl_init()
1035 pctl); in sunxi_pinctrl_init()
1045 gpiochip_remove(pctl->chip); in sunxi_pinctrl_init()
1047 pinctrl_unregister(pctl->pctl_dev); in sunxi_pinctrl_init()