134 	struct pinctrl_dev *pctrl;  member
171 static int pm8xxx_mpp_update(struct pm8xxx_mpp *pctrl,  in pm8xxx_mpp_update()  argument
240 	ret = regmap_write(pctrl->regmap, pin->reg, val);  in pm8xxx_mpp_update()
242 		dev_err(pctrl->dev, "failed to write register\n");  in pm8xxx_mpp_update()
249 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_get_groups_count()  local
251 	return pctrl->npins;  in pm8xxx_get_groups_count()
266 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_get_group_pins()  local
268 	*pins = &pctrl->desc.pins[group].number;  in pm8xxx_get_group_pins()
298 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_get_function_groups()  local
301 	*num_groups = pctrl->npins;  in pm8xxx_get_function_groups()
309 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_pinmux_set_mux()  local
310 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data;  in pm8xxx_pinmux_set_mux()
313 	pm8xxx_mpp_update(pctrl, pin);  in pm8xxx_pinmux_set_mux()
329 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_pin_config_get()  local
330 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_pin_config_get()
379 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_pin_config_set()  local
380 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_pin_config_set()
422 			dev_err(pctrl->dev,  in pm8xxx_pin_config_set()
429 	pm8xxx_mpp_update(pctrl, pin);  in pm8xxx_pin_config_set()
451 	struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip);  in pm8xxx_mpp_direction_input()  local
452 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_mpp_direction_input()
466 	pm8xxx_mpp_update(pctrl, pin);  in pm8xxx_mpp_direction_input()
475 	struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip);  in pm8xxx_mpp_direction_output()  local
476 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_mpp_direction_output()
492 	pm8xxx_mpp_update(pctrl, pin);  in pm8xxx_mpp_direction_output()
499 	struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip);  in pm8xxx_mpp_get()  local
500 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_mpp_get()
516 	struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip);  in pm8xxx_mpp_set()  local
517 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_mpp_set()
521 	pm8xxx_mpp_update(pctrl, pin);  in pm8xxx_mpp_set()
540 	struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip);  in pm8xxx_mpp_to_irq()  local
541 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_mpp_to_irq()
555 	struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip);  in pm8xxx_mpp_dbg_show_one()  local
556 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_mpp_dbg_show_one()
656 static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl,  in pm8xxx_pin_populate()  argument
665 	ret = regmap_read(pctrl->regmap, pin->reg, &val);  in pm8xxx_pin_populate()
667 		dev_err(pctrl->dev, "failed to read register\n");  in pm8xxx_pin_populate()
757 	struct pm8xxx_mpp *pctrl;  in pm8xxx_mpp_probe()  local
761 	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);  in pm8xxx_mpp_probe()
762 	if (!pctrl)  in pm8xxx_mpp_probe()
765 	pctrl->dev = &pdev->dev;  in pm8xxx_mpp_probe()
766 	pctrl->npins = (unsigned long)of_device_get_match_data(&pdev->dev);  in pm8xxx_mpp_probe()
768 	pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL);  in pm8xxx_mpp_probe()
769 	if (!pctrl->regmap) {  in pm8xxx_mpp_probe()
774 	pctrl->desc = pm8xxx_pinctrl_desc;  in pm8xxx_mpp_probe()
775 	pctrl->desc.npins = pctrl->npins;  in pm8xxx_mpp_probe()
778 			    pctrl->desc.npins,  in pm8xxx_mpp_probe()
785 				pctrl->desc.npins,  in pm8xxx_mpp_probe()
791 	for (i = 0; i < pctrl->desc.npins; i++) {  in pm8xxx_mpp_probe()
800 		ret = pm8xxx_pin_populate(pctrl, &pin_data[i]);  in pm8xxx_mpp_probe()
808 	pctrl->desc.pins = pins;  in pm8xxx_mpp_probe()
810 	pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_mpp_bindings);  in pm8xxx_mpp_probe()
811 	pctrl->desc.custom_params = pm8xxx_mpp_bindings;  in pm8xxx_mpp_probe()
813 	pctrl->desc.custom_conf_items = pm8xxx_conf_items;  in pm8xxx_mpp_probe()
816 	pctrl->pctrl = pinctrl_register(&pctrl->desc, &pdev->dev, pctrl);  in pm8xxx_mpp_probe()
817 	if (IS_ERR(pctrl->pctrl)) {  in pm8xxx_mpp_probe()
819 		return PTR_ERR(pctrl->pctrl);  in pm8xxx_mpp_probe()
822 	pctrl->chip = pm8xxx_mpp_template;  in pm8xxx_mpp_probe()
823 	pctrl->chip.base = -1;  in pm8xxx_mpp_probe()
824 	pctrl->chip.dev = &pdev->dev;  in pm8xxx_mpp_probe()
825 	pctrl->chip.of_node = pdev->dev.of_node;  in pm8xxx_mpp_probe()
826 	pctrl->chip.of_gpio_n_cells = 2;  in pm8xxx_mpp_probe()
827 	pctrl->chip.label = dev_name(pctrl->dev);  in pm8xxx_mpp_probe()
828 	pctrl->chip.ngpio = pctrl->npins;  in pm8xxx_mpp_probe()
829 	ret = gpiochip_add(&pctrl->chip);  in pm8xxx_mpp_probe()
835 	ret = gpiochip_add_pin_range(&pctrl->chip,  in pm8xxx_mpp_probe()
836 				     dev_name(pctrl->dev),  in pm8xxx_mpp_probe()
837 				     0, 0, pctrl->chip.ngpio);  in pm8xxx_mpp_probe()
839 		dev_err(pctrl->dev, "failed to add pin range\n");  in pm8xxx_mpp_probe()
843 	platform_set_drvdata(pdev, pctrl);  in pm8xxx_mpp_probe()
850 	gpiochip_remove(&pctrl->chip);  in pm8xxx_mpp_probe()
853 	pinctrl_unregister(pctrl->pctrl);  in pm8xxx_mpp_probe()
860 	struct pm8xxx_mpp *pctrl = platform_get_drvdata(pdev);  in pm8xxx_mpp_remove()  local
862 	gpiochip_remove(&pctrl->chip);  in pm8xxx_mpp_remove()
864 	pinctrl_unregister(pctrl->pctrl);  in pm8xxx_mpp_remove()