186 static int pmic_mpp_read(struct pmic_mpp_state *state,  in pmic_mpp_read()  argument
192 	ret = regmap_read(state->map, pad->base + addr, &val);  in pmic_mpp_read()
194 		dev_err(state->dev, "read 0x%x failed\n", addr);  in pmic_mpp_read()
201 static int pmic_mpp_write(struct pmic_mpp_state *state,  in pmic_mpp_write()  argument
207 	ret = regmap_write(state->map, pad->base + addr, val);  in pmic_mpp_write()
209 		dev_err(state->dev, "write 0x%x failed\n", addr);  in pmic_mpp_write()
264 static int pmic_mpp_write_mode_ctl(struct pmic_mpp_state *state,  in pmic_mpp_write_mode_ctl()  argument
308 	return pmic_mpp_write(state, pad, PMIC_MPP_REG_MODE_CTL, val);  in pmic_mpp_write_mode_ctl()
314 	struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);  in pmic_mpp_set_mux()  local
323 	ret = pmic_mpp_write_mode_ctl(state, pad);  in pmic_mpp_set_mux()
327 	return pmic_mpp_write(state, pad, PMIC_MPP_REG_EN_CTL, val);  in pmic_mpp_set_mux()
407 	struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);  in pmic_mpp_config_set()  local
480 	ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_DIG_VIN_CTL, val);  in pmic_mpp_config_set()
486 	ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_DIG_PULL_CTL, val);  in pmic_mpp_config_set()
492 	ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_AIN_CTL, val);  in pmic_mpp_config_set()
496 	ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_AOUT_CTL, pad->aout_level);  in pmic_mpp_config_set()
500 	ret = pmic_mpp_write_mode_ctl(state, pad);  in pmic_mpp_config_set()
506 	return pmic_mpp_write(state, pad, PMIC_MPP_REG_EN_CTL, val);  in pmic_mpp_config_set()
512 	struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);  in pmic_mpp_config_dbg_show()  local
529 			ret = pmic_mpp_read(state, pad, PMIC_MPP_REG_RT_STS);  in pmic_mpp_config_dbg_show()
559 	struct pmic_mpp_state *state = to_mpp_state(chip);  in pmic_mpp_direction_input()  local
564 	return pmic_mpp_config_set(state->ctrl, pin, &config, 1);  in pmic_mpp_direction_input()
570 	struct pmic_mpp_state *state = to_mpp_state(chip);  in pmic_mpp_direction_output()  local
575 	return pmic_mpp_config_set(state->ctrl, pin, &config, 1);  in pmic_mpp_direction_output()
580 	struct pmic_mpp_state *state = to_mpp_state(chip);  in pmic_mpp_get()  local
584 	pad = state->ctrl->desc->pins[pin].drv_data;  in pmic_mpp_get()
587 		ret = pmic_mpp_read(state, pad, PMIC_MPP_REG_RT_STS);  in pmic_mpp_get()
599 	struct pmic_mpp_state *state = to_mpp_state(chip);  in pmic_mpp_set()  local
604 	pmic_mpp_config_set(state->ctrl, pin, &config, 1);  in pmic_mpp_set()
622 	struct pmic_mpp_state *state = to_mpp_state(chip);  in pmic_mpp_to_irq()  local
625 	pad = state->ctrl->desc->pins[pin].drv_data;  in pmic_mpp_to_irq()
632 	struct pmic_mpp_state *state = to_mpp_state(chip);  in pmic_mpp_dbg_show()  local
636 		pmic_mpp_config_dbg_show(state->ctrl, s, i);  in pmic_mpp_dbg_show()
653 static int pmic_mpp_populate(struct pmic_mpp_state *state,  in pmic_mpp_populate()  argument
659 	type = pmic_mpp_read(state, pad, PMIC_MPP_REG_TYPE);  in pmic_mpp_populate()
664 		dev_err(state->dev, "incorrect block type 0x%x at 0x%x\n",  in pmic_mpp_populate()
669 	subtype = pmic_mpp_read(state, pad, PMIC_MPP_REG_SUBTYPE);  in pmic_mpp_populate()
685 		dev_err(state->dev, "unknown MPP type 0x%x at 0x%x\n",  in pmic_mpp_populate()
690 	val = pmic_mpp_read(state, pad, PMIC_MPP_REG_MODE_CTL);  in pmic_mpp_populate()
736 		dev_err(state->dev, "unknown MPP direction\n");  in pmic_mpp_populate()
748 	val = pmic_mpp_read(state, pad, PMIC_MPP_REG_DIG_VIN_CTL);  in pmic_mpp_populate()
755 	val = pmic_mpp_read(state, pad, PMIC_MPP_REG_DIG_PULL_CTL);  in pmic_mpp_populate()
762 	val = pmic_mpp_read(state, pad, PMIC_MPP_REG_AIN_CTL);  in pmic_mpp_populate()
769 	val = pmic_mpp_read(state, pad, PMIC_MPP_REG_SINK_CTL);  in pmic_mpp_populate()
775 	val = pmic_mpp_read(state, pad, PMIC_MPP_REG_AOUT_CTL);  in pmic_mpp_populate()
781 	val = pmic_mpp_read(state, pad, PMIC_MPP_REG_EN_CTL);  in pmic_mpp_populate()
796 	struct pmic_mpp_state *state;  in pmic_mpp_probe()  local
812 	state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL);  in pmic_mpp_probe()
813 	if (!state)  in pmic_mpp_probe()
816 	platform_set_drvdata(pdev, state);  in pmic_mpp_probe()
818 	state->dev = &pdev->dev;  in pmic_mpp_probe()
819 	state->map = dev_get_regmap(dev->parent, NULL);  in pmic_mpp_probe()
859 		ret = pmic_mpp_populate(state, pad);  in pmic_mpp_probe()
864 	state->chip = pmic_mpp_gpio_template;  in pmic_mpp_probe()
865 	state->chip.dev = dev;  in pmic_mpp_probe()
866 	state->chip.base = -1;  in pmic_mpp_probe()
867 	state->chip.ngpio = npins;  in pmic_mpp_probe()
868 	state->chip.label = dev_name(dev);  in pmic_mpp_probe()
869 	state->chip.of_gpio_n_cells = 2;  in pmic_mpp_probe()
870 	state->chip.can_sleep = false;  in pmic_mpp_probe()
872 	state->ctrl = pinctrl_register(pctrldesc, dev, state);  in pmic_mpp_probe()
873 	if (IS_ERR(state->ctrl))  in pmic_mpp_probe()
874 		return PTR_ERR(state->ctrl);  in pmic_mpp_probe()
876 	ret = gpiochip_add(&state->chip);  in pmic_mpp_probe()
878 		dev_err(state->dev, "can't add gpio chip\n");  in pmic_mpp_probe()
882 	ret = gpiochip_add_pin_range(&state->chip, dev_name(dev), 0, 0, npins);  in pmic_mpp_probe()
891 	gpiochip_remove(&state->chip);  in pmic_mpp_probe()
893 	pinctrl_unregister(state->ctrl);  in pmic_mpp_probe()
899 	struct pmic_mpp_state *state = platform_get_drvdata(pdev);  in pmic_mpp_remove()  local
901 	gpiochip_remove(&state->chip);  in pmic_mpp_remove()
902 	pinctrl_unregister(state->ctrl);  in pmic_mpp_remove()