58 	struct pinctrl_dev *pctrl;  member
79 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_get_groups_count()  local
81 	return pctrl->soc->ngroups;  in msm_get_groups_count()
87 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_get_group_name()  local
89 	return pctrl->soc->groups[group].name;  in msm_get_group_name()
97 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_get_group_pins()  local
99 	*pins = pctrl->soc->groups[group].pins;  in msm_get_group_pins()
100 	*num_pins = pctrl->soc->groups[group].npins;  in msm_get_group_pins()
114 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_get_functions_count()  local
116 	return pctrl->soc->nfunctions;  in msm_get_functions_count()
122 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_get_function_name()  local
124 	return pctrl->soc->functions[function].name;  in msm_get_function_name()
132 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_get_function_groups()  local
134 	*groups = pctrl->soc->functions[function].groups;  in msm_get_function_groups()
135 	*num_groups = pctrl->soc->functions[function].ngroups;  in msm_get_function_groups()
143 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_pinmux_set_mux()  local
149 	g = &pctrl->soc->groups[group];  in msm_pinmux_set_mux()
159 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_pinmux_set_mux()
161 	val = readl(pctrl->regs + g->ctl_reg);  in msm_pinmux_set_mux()
164 	writel(val, pctrl->regs + g->ctl_reg);  in msm_pinmux_set_mux()
166 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_pinmux_set_mux()
178 static int msm_config_reg(struct msm_pinctrl *pctrl,  in msm_config_reg()  argument
223 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_config_group_get()  local
231 	g = &pctrl->soc->groups[group];  in msm_config_group_get()
233 	ret = msm_config_reg(pctrl, g, param, &mask, &bit);  in msm_config_group_get()
237 	val = readl(pctrl->regs + g->ctl_reg);  in msm_config_group_get()
262 		val = readl(pctrl->regs + g->io_reg);  in msm_config_group_get()
286 	struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);  in msm_config_group_set()  local
296 	g = &pctrl->soc->groups[group];  in msm_config_group_set()
302 		ret = msm_config_reg(pctrl, g, param, &mask, &bit);  in msm_config_group_set()
329 			spin_lock_irqsave(&pctrl->lock, flags);  in msm_config_group_set()
330 			val = readl(pctrl->regs + g->io_reg);  in msm_config_group_set()
335 			writel(val, pctrl->regs + g->io_reg);  in msm_config_group_set()
336 			spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_config_group_set()
346 			dev_err(pctrl->dev, "Unsupported config parameter: %x\n",  in msm_config_group_set()
353 			dev_err(pctrl->dev, "config %x: %x is invalid\n", param, arg);  in msm_config_group_set()
357 		spin_lock_irqsave(&pctrl->lock, flags);  in msm_config_group_set()
358 		val = readl(pctrl->regs + g->ctl_reg);  in msm_config_group_set()
361 		writel(val, pctrl->regs + g->ctl_reg);  in msm_config_group_set()
362 		spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_config_group_set()
384 	struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip);  in msm_gpio_direction_input()  local
388 	g = &pctrl->soc->groups[offset];  in msm_gpio_direction_input()
390 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_direction_input()
392 	val = readl(pctrl->regs + g->ctl_reg);  in msm_gpio_direction_input()
394 	writel(val, pctrl->regs + g->ctl_reg);  in msm_gpio_direction_input()
396 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_direction_input()
404 	struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip);  in msm_gpio_direction_output()  local
408 	g = &pctrl->soc->groups[offset];  in msm_gpio_direction_output()
410 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_direction_output()
412 	val = readl(pctrl->regs + g->io_reg);  in msm_gpio_direction_output()
417 	writel(val, pctrl->regs + g->io_reg);  in msm_gpio_direction_output()
419 	val = readl(pctrl->regs + g->ctl_reg);  in msm_gpio_direction_output()
421 	writel(val, pctrl->regs + g->ctl_reg);  in msm_gpio_direction_output()
423 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_direction_output()
431 	struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip);  in msm_gpio_get()  local
434 	g = &pctrl->soc->groups[offset];  in msm_gpio_get()
436 	val = readl(pctrl->regs + g->io_reg);  in msm_gpio_get()
443 	struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip);  in msm_gpio_set()  local
447 	g = &pctrl->soc->groups[offset];  in msm_gpio_set()
449 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_set()
451 	val = readl(pctrl->regs + g->io_reg);  in msm_gpio_set()
456 	writel(val, pctrl->regs + g->io_reg);  in msm_gpio_set()
458 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_set()
471 	struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip);  in msm_gpio_dbg_show_one()  local
485 	g = &pctrl->soc->groups[offset];  in msm_gpio_dbg_show_one()
486 	ctl_reg = readl(pctrl->regs + g->ctl_reg);  in msm_gpio_dbg_show_one()
543 static void msm_gpio_update_dual_edge_pos(struct msm_pinctrl *pctrl,  in msm_gpio_update_dual_edge_pos()  argument
552 		val = readl(pctrl->regs + g->io_reg) & BIT(g->in_bit);  in msm_gpio_update_dual_edge_pos()
554 		pol = readl(pctrl->regs + g->intr_cfg_reg);  in msm_gpio_update_dual_edge_pos()
556 		writel(pol, pctrl->regs + g->intr_cfg_reg);  in msm_gpio_update_dual_edge_pos()
558 		val2 = readl(pctrl->regs + g->io_reg) & BIT(g->in_bit);  in msm_gpio_update_dual_edge_pos()
559 		intstat = readl(pctrl->regs + g->intr_status_reg);  in msm_gpio_update_dual_edge_pos()
563 	dev_err(pctrl->dev, "dual-edge irq failed to stabilize, %#08x != %#08x\n",  in msm_gpio_update_dual_edge_pos()
570 	struct msm_pinctrl *pctrl = to_msm_pinctrl(gc);  in msm_gpio_irq_mask()  local
575 	g = &pctrl->soc->groups[d->hwirq];  in msm_gpio_irq_mask()
577 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_irq_mask()
579 	val = readl(pctrl->regs + g->intr_cfg_reg);  in msm_gpio_irq_mask()
581 	writel(val, pctrl->regs + g->intr_cfg_reg);  in msm_gpio_irq_mask()
583 	clear_bit(d->hwirq, pctrl->enabled_irqs);  in msm_gpio_irq_mask()
585 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_irq_mask()
591 	struct msm_pinctrl *pctrl = to_msm_pinctrl(gc);  in msm_gpio_irq_unmask()  local
596 	g = &pctrl->soc->groups[d->hwirq];  in msm_gpio_irq_unmask()
598 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_irq_unmask()
600 	val = readl(pctrl->regs + g->intr_status_reg);  in msm_gpio_irq_unmask()
602 	writel(val, pctrl->regs + g->intr_status_reg);  in msm_gpio_irq_unmask()
604 	val = readl(pctrl->regs + g->intr_cfg_reg);  in msm_gpio_irq_unmask()
606 	writel(val, pctrl->regs + g->intr_cfg_reg);  in msm_gpio_irq_unmask()
608 	set_bit(d->hwirq, pctrl->enabled_irqs);  in msm_gpio_irq_unmask()
610 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_irq_unmask()
616 	struct msm_pinctrl *pctrl = to_msm_pinctrl(gc);  in msm_gpio_irq_ack()  local
621 	g = &pctrl->soc->groups[d->hwirq];  in msm_gpio_irq_ack()
623 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_irq_ack()
625 	val = readl(pctrl->regs + g->intr_status_reg);  in msm_gpio_irq_ack()
630 	writel(val, pctrl->regs + g->intr_status_reg);  in msm_gpio_irq_ack()
632 	if (test_bit(d->hwirq, pctrl->dual_edge_irqs))  in msm_gpio_irq_ack()
633 		msm_gpio_update_dual_edge_pos(pctrl, g, d);  in msm_gpio_irq_ack()
635 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_irq_ack()
641 	struct msm_pinctrl *pctrl = to_msm_pinctrl(gc);  in msm_gpio_irq_set_type()  local
646 	g = &pctrl->soc->groups[d->hwirq];  in msm_gpio_irq_set_type()
648 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_irq_set_type()
654 		set_bit(d->hwirq, pctrl->dual_edge_irqs);  in msm_gpio_irq_set_type()
656 		clear_bit(d->hwirq, pctrl->dual_edge_irqs);  in msm_gpio_irq_set_type()
659 	val = readl(pctrl->regs + g->intr_target_reg);  in msm_gpio_irq_set_type()
662 	writel(val, pctrl->regs + g->intr_target_reg);  in msm_gpio_irq_set_type()
669 	val = readl(pctrl->regs + g->intr_cfg_reg);  in msm_gpio_irq_set_type()
717 	writel(val, pctrl->regs + g->intr_cfg_reg);  in msm_gpio_irq_set_type()
719 	if (test_bit(d->hwirq, pctrl->dual_edge_irqs))  in msm_gpio_irq_set_type()
720 		msm_gpio_update_dual_edge_pos(pctrl, g, d);  in msm_gpio_irq_set_type()
722 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_irq_set_type()
735 	struct msm_pinctrl *pctrl = to_msm_pinctrl(gc);  in msm_gpio_irq_set_wake()  local
738 	spin_lock_irqsave(&pctrl->lock, flags);  in msm_gpio_irq_set_wake()
740 	irq_set_irq_wake(pctrl->irq, on);  in msm_gpio_irq_set_wake()
742 	spin_unlock_irqrestore(&pctrl->lock, flags);  in msm_gpio_irq_set_wake()
760 	struct msm_pinctrl *pctrl = to_msm_pinctrl(gc);  in msm_gpio_irq_handler()  local
773 	for_each_set_bit(i, pctrl->enabled_irqs, pctrl->chip.ngpio) {  in msm_gpio_irq_handler()
774 		g = &pctrl->soc->groups[i];  in msm_gpio_irq_handler()
775 		val = readl(pctrl->regs + g->intr_status_reg);  in msm_gpio_irq_handler()
790 static int msm_gpio_init(struct msm_pinctrl *pctrl)  in msm_gpio_init()  argument
794 	unsigned ngpio = pctrl->soc->ngpios;  in msm_gpio_init()
799 	chip = &pctrl->chip;  in msm_gpio_init()
802 	chip->label = dev_name(pctrl->dev);  in msm_gpio_init()
803 	chip->dev = pctrl->dev;  in msm_gpio_init()
805 	chip->of_node = pctrl->dev->of_node;  in msm_gpio_init()
807 	ret = gpiochip_add(&pctrl->chip);  in msm_gpio_init()
809 		dev_err(pctrl->dev, "Failed register gpiochip\n");  in msm_gpio_init()
813 	ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev), 0, 0, chip->ngpio);  in msm_gpio_init()
815 		dev_err(pctrl->dev, "Failed to add pin range\n");  in msm_gpio_init()
816 		gpiochip_remove(&pctrl->chip);  in msm_gpio_init()
826 		dev_err(pctrl->dev, "Failed to add irqchip to gpiochip\n");  in msm_gpio_init()
827 		gpiochip_remove(&pctrl->chip);  in msm_gpio_init()
831 	gpiochip_set_chained_irqchip(chip, &msm_gpio_irq_chip, pctrl->irq,  in msm_gpio_init()
840 	struct msm_pinctrl *pctrl = container_of(nb, struct msm_pinctrl, restart_nb);  in msm_ps_hold_restart()  local
842 	writel(0, pctrl->regs + PS_HOLD_OFFSET);  in msm_ps_hold_restart()
854 static void msm_pinctrl_setup_pm_reset(struct msm_pinctrl *pctrl)  in msm_pinctrl_setup_pm_reset()  argument
857 	const struct msm_function *func = pctrl->soc->functions;  in msm_pinctrl_setup_pm_reset()
859 	for (i = 0; i < pctrl->soc->nfunctions; i++)  in msm_pinctrl_setup_pm_reset()
861 			pctrl->restart_nb.notifier_call = msm_ps_hold_restart;  in msm_pinctrl_setup_pm_reset()
862 			pctrl->restart_nb.priority = 128;  in msm_pinctrl_setup_pm_reset()
863 			if (register_restart_handler(&pctrl->restart_nb))  in msm_pinctrl_setup_pm_reset()
864 				dev_err(pctrl->dev,  in msm_pinctrl_setup_pm_reset()
866 			poweroff_pctrl = pctrl;  in msm_pinctrl_setup_pm_reset()
875 	struct msm_pinctrl *pctrl;  in msm_pinctrl_probe()  local
879 	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);  in msm_pinctrl_probe()
880 	if (!pctrl) {  in msm_pinctrl_probe()
884 	pctrl->dev = &pdev->dev;  in msm_pinctrl_probe()
885 	pctrl->soc = soc_data;  in msm_pinctrl_probe()
886 	pctrl->chip = msm_gpio_template;  in msm_pinctrl_probe()
888 	spin_lock_init(&pctrl->lock);  in msm_pinctrl_probe()
891 	pctrl->regs = devm_ioremap_resource(&pdev->dev, res);  in msm_pinctrl_probe()
892 	if (IS_ERR(pctrl->regs))  in msm_pinctrl_probe()
893 		return PTR_ERR(pctrl->regs);  in msm_pinctrl_probe()
895 	msm_pinctrl_setup_pm_reset(pctrl);  in msm_pinctrl_probe()
897 	pctrl->irq = platform_get_irq(pdev, 0);  in msm_pinctrl_probe()
898 	if (pctrl->irq < 0) {  in msm_pinctrl_probe()
900 		return pctrl->irq;  in msm_pinctrl_probe()
904 	msm_pinctrl_desc.pins = pctrl->soc->pins;  in msm_pinctrl_probe()
905 	msm_pinctrl_desc.npins = pctrl->soc->npins;  in msm_pinctrl_probe()
906 	pctrl->pctrl = pinctrl_register(&msm_pinctrl_desc, &pdev->dev, pctrl);  in msm_pinctrl_probe()
907 	if (IS_ERR(pctrl->pctrl)) {  in msm_pinctrl_probe()
909 		return PTR_ERR(pctrl->pctrl);  in msm_pinctrl_probe()
912 	ret = msm_gpio_init(pctrl);  in msm_pinctrl_probe()
914 		pinctrl_unregister(pctrl->pctrl);  in msm_pinctrl_probe()
918 	platform_set_drvdata(pdev, pctrl);  in msm_pinctrl_probe()
928 	struct msm_pinctrl *pctrl = platform_get_drvdata(pdev);  in msm_pinctrl_remove()  local
930 	gpiochip_remove(&pctrl->chip);  in msm_pinctrl_remove()
931 	pinctrl_unregister(pctrl->pctrl);  in msm_pinctrl_remove()
933 	unregister_restart_handler(&pctrl->restart_nb);  in msm_pinctrl_remove()