98 	struct pistachio_pinctrl *pctl;  member
835 static inline u32 pctl_readl(struct pistachio_pinctrl *pctl, u32 reg)  in pctl_readl()  argument
837 	return readl(pctl->base + reg);  in pctl_readl()
840 static inline void pctl_writel(struct pistachio_pinctrl *pctl, u32 val, u32 reg)  in pctl_writel()  argument
842 	writel(val, pctl->base + reg);  in pctl_writel()
890 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinctrl_get_groups_count()  local
892 	return pctl->ngroups;  in pistachio_pinctrl_get_groups_count()
898 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinctrl_get_group_name()  local
900 	return pctl->groups[group].name;  in pistachio_pinctrl_get_group_name()
908 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinctrl_get_group_pins()  local
910 	*pins = &pctl->groups[group].pin;  in pistachio_pinctrl_get_group_pins()
926 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinmux_get_functions_count()  local
928 	return pctl->nfunctions;  in pistachio_pinmux_get_functions_count()
934 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinmux_get_function_name()  local
936 	return pctl->functions[func].name;  in pistachio_pinmux_get_function_name()
944 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinmux_get_function_groups()  local
946 	*groups = pctl->functions[func].groups;  in pistachio_pinmux_get_function_groups()
947 	*num_groups = pctl->functions[func].ngroups;  in pistachio_pinmux_get_function_groups()
955 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinmux_enable()  local
956 	const struct pistachio_pin_group *pg = &pctl->groups[group];  in pistachio_pinmux_enable()
957 	const struct pistachio_function *pf = &pctl->functions[func];  in pistachio_pinmux_enable()
968 			dev_err(pctl->dev, "Cannot mux pin %u to function %u\n",  in pistachio_pinmux_enable()
973 		val = pctl_readl(pctl, pg->mux_reg);  in pistachio_pinmux_enable()
976 		pctl_writel(pctl, val, pg->mux_reg);  in pistachio_pinmux_enable()
986 			val = pctl_readl(pctl, pf->scenario_reg);  in pistachio_pinmux_enable()
989 			pctl_writel(pctl, val, pf->scenario_reg);  in pistachio_pinmux_enable()
993 	range = pinctrl_find_gpio_range_from_pin(pctl->pctldev, pg->pin);  in pistachio_pinmux_enable()
1010 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinconf_get()  local
1016 		val = pctl_readl(pctl, PADS_SCHMITT_EN_REG(pin));  in pistachio_pinconf_get()
1020 		val = pctl_readl(pctl, PADS_PU_PD_REG(pin)) >>  in pistachio_pinconf_get()
1025 		val = pctl_readl(pctl, PADS_PU_PD_REG(pin)) >>  in pistachio_pinconf_get()
1030 		val = pctl_readl(pctl, PADS_PU_PD_REG(pin)) >>  in pistachio_pinconf_get()
1035 		val = pctl_readl(pctl, PADS_PU_PD_REG(pin)) >>  in pistachio_pinconf_get()
1040 		val = pctl_readl(pctl, PADS_SLEW_RATE_REG(pin));  in pistachio_pinconf_get()
1044 		val = pctl_readl(pctl, PADS_DRIVE_STRENGTH_REG(pin)) >>  in pistachio_pinconf_get()
1063 		dev_dbg(pctl->dev, "Property %u not supported\n", param);  in pistachio_pinconf_get()
1075 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinconf_set()  local
1086 			val = pctl_readl(pctl, PADS_SCHMITT_EN_REG(pin));  in pistachio_pinconf_set()
1091 			pctl_writel(pctl, val, PADS_SCHMITT_EN_REG(pin));  in pistachio_pinconf_set()
1094 			val = pctl_readl(pctl, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1097 			pctl_writel(pctl, val, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1100 			val = pctl_readl(pctl, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1103 			pctl_writel(pctl, val, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1106 			val = pctl_readl(pctl, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1109 			pctl_writel(pctl, val, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1112 			val = pctl_readl(pctl, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1115 			pctl_writel(pctl, val, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1118 			val = pctl_readl(pctl, PADS_SLEW_RATE_REG(pin));  in pistachio_pinconf_set()
1123 			pctl_writel(pctl, val, PADS_SLEW_RATE_REG(pin));  in pistachio_pinconf_set()
1126 			val = pctl_readl(pctl, PADS_DRIVE_STRENGTH_REG(pin));  in pistachio_pinconf_set()
1143 				dev_err(pctl->dev,  in pistachio_pinconf_set()
1149 			pctl_writel(pctl, val, PADS_DRIVE_STRENGTH_REG(pin));  in pistachio_pinconf_set()
1152 			dev_err(pctl->dev, "Property %u not supported\n",  in pistachio_pinconf_set()
1354 static int pistachio_gpio_register(struct pistachio_pinctrl *pctl)  in pistachio_gpio_register()  argument
1356 	struct device_node *node = pctl->dev->of_node;  in pistachio_gpio_register()
1361 	for (i = 0; i < pctl->nbanks; i++) {  in pistachio_gpio_register()
1368 			dev_err(pctl->dev, "No node for bank %u\n", i);  in pistachio_gpio_register()
1374 			dev_err(pctl->dev,  in pistachio_gpio_register()
1382 			dev_err(pctl->dev, "No IRQ for bank %u: %d\n", i, irq);  in pistachio_gpio_register()
1387 		bank = &pctl->gpio_banks[i];  in pistachio_gpio_register()
1388 		bank->pctl = pctl;  in pistachio_gpio_register()
1389 		bank->base = pctl->base + GPIO_BANK_BASE(i);  in pistachio_gpio_register()
1391 		bank->gpio_chip.dev = pctl->dev;  in pistachio_gpio_register()
1395 			dev_err(pctl->dev, "Failed to add GPIO chip %u: %d\n",  in pistachio_gpio_register()
1403 			dev_err(pctl->dev, "Failed to add IRQ chip %u: %d\n",  in pistachio_gpio_register()
1412 					     dev_name(pctl->dev), 0,  in pistachio_gpio_register()
1415 			dev_err(pctl->dev, "Failed to add GPIO range %u: %d\n",  in pistachio_gpio_register()
1425 		bank = &pctl->gpio_banks[i - 1];  in pistachio_gpio_register()
1438 	struct pistachio_pinctrl *pctl;  in pistachio_pinctrl_probe()  local
1442 	pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);  in pistachio_pinctrl_probe()
1443 	if (!pctl)  in pistachio_pinctrl_probe()
1445 	pctl->dev = &pdev->dev;  in pistachio_pinctrl_probe()
1446 	dev_set_drvdata(&pdev->dev, pctl);  in pistachio_pinctrl_probe()
1449 	pctl->base = devm_ioremap_resource(&pdev->dev, res);  in pistachio_pinctrl_probe()
1450 	if (IS_ERR(pctl->base))  in pistachio_pinctrl_probe()
1451 		return PTR_ERR(pctl->base);  in pistachio_pinctrl_probe()
1453 	pctl->pins = pistachio_pins;  in pistachio_pinctrl_probe()
1454 	pctl->npins = ARRAY_SIZE(pistachio_pins);  in pistachio_pinctrl_probe()
1455 	pctl->functions = pistachio_functions;  in pistachio_pinctrl_probe()
1456 	pctl->nfunctions = ARRAY_SIZE(pistachio_functions);  in pistachio_pinctrl_probe()
1457 	pctl->groups = pistachio_groups;  in pistachio_pinctrl_probe()
1458 	pctl->ngroups = ARRAY_SIZE(pistachio_groups);  in pistachio_pinctrl_probe()
1459 	pctl->gpio_banks = pistachio_gpio_banks;  in pistachio_pinctrl_probe()
1460 	pctl->nbanks = ARRAY_SIZE(pistachio_gpio_banks);  in pistachio_pinctrl_probe()
1462 	pistachio_pinctrl_desc.pins = pctl->pins;  in pistachio_pinctrl_probe()
1463 	pistachio_pinctrl_desc.npins = pctl->npins;  in pistachio_pinctrl_probe()
1465 	pctl->pctldev = pinctrl_register(&pistachio_pinctrl_desc, &pdev->dev,  in pistachio_pinctrl_probe()
1466 					 pctl);  in pistachio_pinctrl_probe()
1467 	if (IS_ERR(pctl->pctldev)) {  in pistachio_pinctrl_probe()
1469 		return PTR_ERR(pctl->pctldev);  in pistachio_pinctrl_probe()
1472 	ret = pistachio_gpio_register(pctl);  in pistachio_pinctrl_probe()
1474 		pinctrl_unregister(pctl->pctldev);  in pistachio_pinctrl_probe()