Lines Matching refs:pctl

58 static struct regmap *mtk_get_regmap(struct mtk_pinctrl *pctl,  in mtk_get_regmap()  argument
61 if (pin >= pctl->devdata->type1_start && pin < pctl->devdata->type1_end) in mtk_get_regmap()
62 return pctl->regmap2; in mtk_get_regmap()
63 return pctl->regmap1; in mtk_get_regmap()
66 static unsigned int mtk_get_port(struct mtk_pinctrl *pctl, unsigned long pin) in mtk_get_port() argument
69 return ((pin >> 4) & pctl->devdata->port_mask) in mtk_get_port()
70 << pctl->devdata->port_shf; in mtk_get_port()
79 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in mtk_pmx_gpio_set_direction() local
81 reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset; in mtk_pmx_gpio_set_direction()
86 reg_addr = CLR_ADDR(reg_addr, pctl); in mtk_pmx_gpio_set_direction()
88 reg_addr = SET_ADDR(reg_addr, pctl); in mtk_pmx_gpio_set_direction()
90 regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit); in mtk_pmx_gpio_set_direction()
98 struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev); in mtk_gpio_set() local
100 reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dout_offset; in mtk_gpio_set()
104 reg_addr = SET_ADDR(reg_addr, pctl); in mtk_gpio_set()
106 reg_addr = CLR_ADDR(reg_addr, pctl); in mtk_gpio_set()
108 regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit); in mtk_gpio_set()
111 static int mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin, in mtk_pconf_set_ies_smt() argument
121 if (!pctl->devdata->spec_ies_smt_set && in mtk_pconf_set_ies_smt()
122 pctl->devdata->ies_offset == MTK_PINCTRL_NOT_SUPPORT && in mtk_pconf_set_ies_smt()
126 if (!pctl->devdata->spec_ies_smt_set && in mtk_pconf_set_ies_smt()
127 pctl->devdata->smt_offset == MTK_PINCTRL_NOT_SUPPORT && in mtk_pconf_set_ies_smt()
135 if (pctl->devdata->spec_ies_smt_set) { in mtk_pconf_set_ies_smt()
136 return pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin), in mtk_pconf_set_ies_smt()
137 pin, pctl->devdata->port_align, value, arg); in mtk_pconf_set_ies_smt()
143 offset = pctl->devdata->ies_offset; in mtk_pconf_set_ies_smt()
145 offset = pctl->devdata->smt_offset; in mtk_pconf_set_ies_smt()
148 reg_addr = SET_ADDR(mtk_get_port(pctl, pin) + offset, pctl); in mtk_pconf_set_ies_smt()
150 reg_addr = CLR_ADDR(mtk_get_port(pctl, pin) + offset, pctl); in mtk_pconf_set_ies_smt()
152 regmap_write(mtk_get_regmap(pctl, pin), reg_addr, bit); in mtk_pconf_set_ies_smt()
183 struct mtk_pinctrl *pctl, unsigned long pin) { in mtk_find_pin_drv_grp_by_pin() argument
186 for (i = 0; i < pctl->devdata->n_pin_drv_grps; i++) { in mtk_find_pin_drv_grp_by_pin()
188 pctl->devdata->pin_drv_grp + i; in mtk_find_pin_drv_grp_by_pin()
196 static int mtk_pconf_set_driving(struct mtk_pinctrl *pctl, in mtk_pconf_set_driving() argument
204 if (pin >= pctl->devdata->npins) in mtk_pconf_set_driving()
207 pin_drv = mtk_find_pin_drv_grp_by_pin(pctl, pin); in mtk_pconf_set_driving()
208 if (!pin_drv || pin_drv->grp > pctl->devdata->n_grp_cls) in mtk_pconf_set_driving()
211 drv_grp = pctl->devdata->grp_desc + pin_drv->grp; in mtk_pconf_set_driving()
220 return regmap_update_bits(mtk_get_regmap(pctl, pin), in mtk_pconf_set_driving()
287 static int mtk_pconf_set_pull_select(struct mtk_pinctrl *pctl, in mtk_pconf_set_pull_select() argument
298 if (pctl->devdata->spec_pull_set) { in mtk_pconf_set_pull_select()
299 ret = pctl->devdata->spec_pull_set(mtk_get_regmap(pctl, pin), in mtk_pconf_set_pull_select()
300 pin, pctl->devdata->port_align, isup, arg); in mtk_pconf_set_pull_select()
307 dev_err(pctl->dev, "invalid pull-up argument %d on pin %d .\n", in mtk_pconf_set_pull_select()
314 reg_pullen = SET_ADDR(mtk_get_port(pctl, pin) + in mtk_pconf_set_pull_select()
315 pctl->devdata->pullen_offset, pctl); in mtk_pconf_set_pull_select()
317 reg_pullen = CLR_ADDR(mtk_get_port(pctl, pin) + in mtk_pconf_set_pull_select()
318 pctl->devdata->pullen_offset, pctl); in mtk_pconf_set_pull_select()
321 reg_pullsel = SET_ADDR(mtk_get_port(pctl, pin) + in mtk_pconf_set_pull_select()
322 pctl->devdata->pullsel_offset, pctl); in mtk_pconf_set_pull_select()
324 reg_pullsel = CLR_ADDR(mtk_get_port(pctl, pin) + in mtk_pconf_set_pull_select()
325 pctl->devdata->pullsel_offset, pctl); in mtk_pconf_set_pull_select()
327 regmap_write(mtk_get_regmap(pctl, pin), reg_pullen, bit); in mtk_pconf_set_pull_select()
328 regmap_write(mtk_get_regmap(pctl, pin), reg_pullsel, bit); in mtk_pconf_set_pull_select()
337 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in mtk_pconf_parse_conf() local
341 ret = mtk_pconf_set_pull_select(pctl, pin, false, false, arg); in mtk_pconf_parse_conf()
344 ret = mtk_pconf_set_pull_select(pctl, pin, true, true, arg); in mtk_pconf_parse_conf()
347 ret = mtk_pconf_set_pull_select(pctl, pin, true, false, arg); in mtk_pconf_parse_conf()
350 ret = mtk_pconf_set_ies_smt(pctl, pin, arg, param); in mtk_pconf_parse_conf()
353 mtk_gpio_set(pctl->chip, pin, arg); in mtk_pconf_parse_conf()
357 ret = mtk_pconf_set_ies_smt(pctl, pin, arg, param); in mtk_pconf_parse_conf()
360 ret = mtk_pconf_set_driving(pctl, pin, arg); in mtk_pconf_parse_conf()
373 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in mtk_pconf_group_get() local
375 *config = pctl->groups[group].config; in mtk_pconf_group_get()
383 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in mtk_pconf_group_set() local
384 struct mtk_pinctrl_group *g = &pctl->groups[group]; in mtk_pconf_group_set()
406 mtk_pctrl_find_group_by_pin(struct mtk_pinctrl *pctl, u32 pin) in mtk_pctrl_find_group_by_pin() argument
410 for (i = 0; i < pctl->ngroups; i++) { in mtk_pctrl_find_group_by_pin()
411 struct mtk_pinctrl_group *grp = pctl->groups + i; in mtk_pctrl_find_group_by_pin()
421 struct mtk_pinctrl *pctl, u32 pin_num, u32 fnum) in mtk_pctrl_find_function_by_pin() argument
423 const struct mtk_desc_pin *pin = pctl->devdata->pins + pin_num; in mtk_pctrl_find_function_by_pin()
435 static bool mtk_pctrl_is_function_valid(struct mtk_pinctrl *pctl, in mtk_pctrl_is_function_valid() argument
440 for (i = 0; i < pctl->devdata->npins; i++) { in mtk_pctrl_is_function_valid()
441 const struct mtk_desc_pin *pin = pctl->devdata->pins + i; in mtk_pctrl_is_function_valid()
460 static int mtk_pctrl_dt_node_to_map_func(struct mtk_pinctrl *pctl, in mtk_pctrl_dt_node_to_map_func() argument
473 ret = mtk_pctrl_is_function_valid(pctl, pin, fnum); in mtk_pctrl_dt_node_to_map_func()
475 dev_err(pctl->dev, "invalid function %d on pin %d .\n", in mtk_pctrl_dt_node_to_map_func()
501 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in mtk_pctrl_dt_subnode_to_map() local
505 dev_err(pctl->dev, "missing pins property in node %s .\n", in mtk_pctrl_dt_subnode_to_map()
542 if (pin >= pctl->devdata->npins || in mtk_pctrl_dt_subnode_to_map()
544 dev_err(pctl->dev, "invalid pins value.\n"); in mtk_pctrl_dt_subnode_to_map()
549 grp = mtk_pctrl_find_group_by_pin(pctl, pin); in mtk_pctrl_dt_subnode_to_map()
551 dev_err(pctl->dev, "unable to match pin %d to group\n", in mtk_pctrl_dt_subnode_to_map()
556 err = mtk_pctrl_dt_node_to_map_func(pctl, pin, func, grp, map, in mtk_pctrl_dt_subnode_to_map()
603 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in mtk_pctrl_get_groups_count() local
605 return pctl->ngroups; in mtk_pctrl_get_groups_count()
611 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in mtk_pctrl_get_group_name() local
613 return pctl->groups[group].name; in mtk_pctrl_get_group_name()
621 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in mtk_pctrl_get_group_pins() local
623 *pins = (unsigned *)&pctl->groups[group].pin; in mtk_pctrl_get_group_pins()
653 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in mtk_pmx_get_func_groups() local
655 *groups = pctl->grp_names; in mtk_pmx_get_func_groups()
656 *num_groups = pctl->ngroups; in mtk_pmx_get_func_groups()
668 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in mtk_pmx_set_mode() local
670 reg_addr = ((pin / MAX_GPIO_MODE_PER_REG) << pctl->devdata->port_shf) in mtk_pmx_set_mode()
671 + pctl->devdata->pinmux_offset; in mtk_pmx_set_mode()
676 return regmap_update_bits(mtk_get_regmap(pctl, pin), in mtk_pmx_set_mode()
681 mtk_find_pin_by_eint_num(struct mtk_pinctrl *pctl, unsigned int eint_num) in mtk_find_pin_by_eint_num() argument
686 for (i = 0; i < pctl->devdata->npins; i++) { in mtk_find_pin_by_eint_num()
687 pin = pctl->devdata->pins + i; in mtk_find_pin_by_eint_num()
701 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in mtk_pmx_set_mux() local
702 struct mtk_pinctrl_group *g = pctl->groups + group; in mtk_pmx_set_mux()
704 ret = mtk_pctrl_is_function_valid(pctl, g->pin, function); in mtk_pmx_set_mux()
706 dev_err(pctl->dev, "invalid function %d on group %d .\n", in mtk_pmx_set_mux()
711 desc = mtk_pctrl_find_function_by_pin(pctl, g->pin, function); in mtk_pmx_set_mux()
745 struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev); in mtk_gpio_get_direction() local
747 reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset; in mtk_gpio_get_direction()
749 regmap_read(pctl->regmap1, reg_addr, &read_val); in mtk_gpio_get_direction()
758 struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev); in mtk_gpio_get() local
760 reg_addr = mtk_get_port(pctl, offset) + in mtk_gpio_get()
761 pctl->devdata->din_offset; in mtk_gpio_get()
764 regmap_read(pctl->regmap1, reg_addr, &read_val); in mtk_gpio_get()
771 struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev); in mtk_gpio_to_irq() local
774 pin = pctl->devdata->pins + offset; in mtk_gpio_to_irq()
778 irq = irq_find_mapping(pctl->domain, pin->eint.eintnum); in mtk_gpio_to_irq()
787 struct mtk_pinctrl *pctl = irq_data_get_irq_chip_data(d); in mtk_pinctrl_irq_request_resources() local
791 pin = mtk_find_pin_by_eint_num(pctl, d->hwirq); in mtk_pinctrl_irq_request_resources()
794 dev_err(pctl->dev, "Can not find pin\n"); in mtk_pinctrl_irq_request_resources()
798 ret = gpiochip_lock_as_irq(pctl->chip, pin->pin.number); in mtk_pinctrl_irq_request_resources()
800 dev_err(pctl->dev, "unable to lock HW IRQ %lu for IRQ\n", in mtk_pinctrl_irq_request_resources()
806 mtk_pmx_set_mode(pctl->pctl_dev, pin->pin.number, pin->eint.eintmux); in mtk_pinctrl_irq_request_resources()
813 struct mtk_pinctrl *pctl = irq_data_get_irq_chip_data(d); in mtk_pinctrl_irq_release_resources() local
816 pin = mtk_find_pin_by_eint_num(pctl, d->hwirq); in mtk_pinctrl_irq_release_resources()
819 dev_err(pctl->dev, "Can not find pin\n"); in mtk_pinctrl_irq_release_resources()
823 gpiochip_unlock_as_irq(pctl->chip, pin->pin.number); in mtk_pinctrl_irq_release_resources()
826 static void __iomem *mtk_eint_get_offset(struct mtk_pinctrl *pctl, in mtk_eint_get_offset() argument
832 if (eint_num >= pctl->devdata->ap_num) in mtk_eint_get_offset()
833 eint_base = pctl->devdata->ap_num; in mtk_eint_get_offset()
835 reg = pctl->eint_reg_base + offset + ((eint_num - eint_base) / 32) * 4; in mtk_eint_get_offset()
844 static unsigned int mtk_eint_can_en_debounce(struct mtk_pinctrl *pctl, in mtk_eint_can_en_debounce() argument
850 &pctl->devdata->eint_offsets; in mtk_eint_can_en_debounce()
852 void __iomem *reg = mtk_eint_get_offset(pctl, eint_num, in mtk_eint_can_en_debounce()
860 if ((eint_num < pctl->devdata->db_cnt) && (sens != MT_EDGE_SENSITIVE)) in mtk_eint_can_en_debounce()
870 static unsigned int mtk_eint_get_mask(struct mtk_pinctrl *pctl, in mtk_eint_get_mask() argument
875 &pctl->devdata->eint_offsets; in mtk_eint_get_mask()
877 void __iomem *reg = mtk_eint_get_offset(pctl, eint_num, in mtk_eint_get_mask()
883 static int mtk_eint_flip_edge(struct mtk_pinctrl *pctl, int hwirq) in mtk_eint_flip_edge() argument
887 const struct mtk_eint_offsets *eint_offsets = &(pctl->devdata->eint_offsets); in mtk_eint_flip_edge()
890 void __iomem *reg = pctl->eint_reg_base + (port << 2); in mtk_eint_flip_edge()
893 pin = mtk_find_pin_by_eint_num(pctl, hwirq); in mtk_eint_flip_edge()
894 curr_level = mtk_gpio_get(pctl->chip, pin->pin.number); in mtk_eint_flip_edge()
903 curr_level = mtk_gpio_get(pctl->chip, pin->pin.number); in mtk_eint_flip_edge()
911 struct mtk_pinctrl *pctl = irq_data_get_irq_chip_data(d); in mtk_eint_mask() local
913 &pctl->devdata->eint_offsets; in mtk_eint_mask()
915 void __iomem *reg = mtk_eint_get_offset(pctl, d->hwirq, in mtk_eint_mask()
923 struct mtk_pinctrl *pctl = irq_data_get_irq_chip_data(d); in mtk_eint_unmask() local
925 &pctl->devdata->eint_offsets; in mtk_eint_unmask()
927 void __iomem *reg = mtk_eint_get_offset(pctl, d->hwirq, in mtk_eint_unmask()
932 if (pctl->eint_dual_edges[d->hwirq]) in mtk_eint_unmask()
933 mtk_eint_flip_edge(pctl, d->hwirq); in mtk_eint_unmask()
939 struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev); in mtk_gpio_set_debounce() local
947 pin = pctl->devdata->pins + offset; in mtk_gpio_set_debounce()
952 virq = irq_find_mapping(pctl->domain, eint_num); in mtk_gpio_set_debounce()
956 set_offset = (eint_num / 4) * 4 + pctl->devdata->eint_offsets.dbnc_set; in mtk_gpio_set_debounce()
957 clr_offset = (eint_num / 4) * 4 + pctl->devdata->eint_offsets.dbnc_clr; in mtk_gpio_set_debounce()
958 if (!mtk_eint_can_en_debounce(pctl, eint_num)) in mtk_gpio_set_debounce()
969 if (!mtk_eint_get_mask(pctl, eint_num)) { in mtk_gpio_set_debounce()
977 writel(clr_bit, pctl->eint_reg_base + clr_offset); in mtk_gpio_set_debounce()
982 writel(rst | bit, pctl->eint_reg_base + set_offset); in mtk_gpio_set_debounce()
1010 struct mtk_pinctrl *pctl = irq_data_get_irq_chip_data(d); in mtk_eint_set_type() local
1012 &pctl->devdata->eint_offsets; in mtk_eint_set_type()
1018 dev_err(pctl->dev, "Can't configure IRQ%d (EINT%lu) for type 0x%X\n", in mtk_eint_set_type()
1024 pctl->eint_dual_edges[d->hwirq] = 1; in mtk_eint_set_type()
1026 pctl->eint_dual_edges[d->hwirq] = 0; in mtk_eint_set_type()
1029 reg = mtk_eint_get_offset(pctl, d->hwirq, in mtk_eint_set_type()
1033 reg = mtk_eint_get_offset(pctl, d->hwirq, in mtk_eint_set_type()
1039 reg = mtk_eint_get_offset(pctl, d->hwirq, in mtk_eint_set_type()
1043 reg = mtk_eint_get_offset(pctl, d->hwirq, in mtk_eint_set_type()
1048 if (pctl->eint_dual_edges[d->hwirq]) in mtk_eint_set_type()
1049 mtk_eint_flip_edge(pctl, d->hwirq); in mtk_eint_set_type()
1056 struct mtk_pinctrl *pctl = irq_data_get_irq_chip_data(d); in mtk_eint_irq_set_wake() local
1061 pctl->wake_mask[reg] |= BIT(shift); in mtk_eint_irq_set_wake()
1063 pctl->wake_mask[reg] &= ~BIT(shift); in mtk_eint_irq_set_wake()
1097 struct mtk_pinctrl *pctl = dev_get_drvdata(device); in mtk_eint_suspend() local
1099 &pctl->devdata->eint_offsets; in mtk_eint_suspend()
1101 reg = pctl->eint_reg_base; in mtk_eint_suspend()
1102 mtk_eint_chip_read_mask(eint_offsets, reg, pctl->cur_mask); in mtk_eint_suspend()
1103 mtk_eint_chip_write_mask(eint_offsets, reg, pctl->wake_mask); in mtk_eint_suspend()
1110 struct mtk_pinctrl *pctl = dev_get_drvdata(device); in mtk_eint_resume() local
1112 &pctl->devdata->eint_offsets; in mtk_eint_resume()
1115 pctl->eint_reg_base, pctl->cur_mask); in mtk_eint_resume()
1127 struct mtk_pinctrl *pctl = irq_data_get_irq_chip_data(d); in mtk_eint_ack() local
1129 &pctl->devdata->eint_offsets; in mtk_eint_ack()
1131 void __iomem *reg = mtk_eint_get_offset(pctl, d->hwirq, in mtk_eint_ack()
1149 static unsigned int mtk_eint_init(struct mtk_pinctrl *pctl) in mtk_eint_init() argument
1152 &pctl->devdata->eint_offsets; in mtk_eint_init()
1153 void __iomem *reg = pctl->eint_reg_base + eint_offsets->dom_en; in mtk_eint_init()
1156 for (i = 0; i < pctl->devdata->ap_num; i += 32) { in mtk_eint_init()
1164 mtk_eint_debounce_process(struct mtk_pinctrl *pctl, int index) in mtk_eint_debounce_process() argument
1169 &pctl->devdata->eint_offsets; in mtk_eint_debounce_process()
1172 dbnc = readl(pctl->eint_reg_base + ctrl_offset); in mtk_eint_debounce_process()
1177 writel(rst, pctl->eint_reg_base + ctrl_offset); in mtk_eint_debounce_process()
1184 struct mtk_pinctrl *pctl = irq_desc_get_handler_data(desc); in mtk_eint_irq_handler() local
1188 &pctl->devdata->eint_offsets; in mtk_eint_irq_handler()
1189 void __iomem *reg = mtk_eint_get_offset(pctl, 0, eint_offsets->stat); in mtk_eint_irq_handler()
1195 eint_num < pctl->devdata->ap_num; in mtk_eint_irq_handler()
1201 virq = irq_find_mapping(pctl->domain, index); in mtk_eint_irq_handler()
1204 dual_edges = pctl->eint_dual_edges[index]; in mtk_eint_irq_handler()
1211 pin = mtk_find_pin_by_eint_num(pctl, index); in mtk_eint_irq_handler()
1212 start_level = mtk_gpio_get(pctl->chip, in mtk_eint_irq_handler()
1219 curr_level = mtk_eint_flip_edge(pctl, index); in mtk_eint_irq_handler()
1229 if (index < pctl->devdata->db_cnt) in mtk_eint_irq_handler()
1230 mtk_eint_debounce_process(pctl , index); in mtk_eint_irq_handler()
1238 struct mtk_pinctrl *pctl = platform_get_drvdata(pdev); in mtk_pctrl_build_state() local
1241 pctl->ngroups = pctl->devdata->npins; in mtk_pctrl_build_state()
1244 pctl->groups = devm_kcalloc(&pdev->dev, pctl->ngroups, in mtk_pctrl_build_state()
1245 sizeof(*pctl->groups), GFP_KERNEL); in mtk_pctrl_build_state()
1246 if (!pctl->groups) in mtk_pctrl_build_state()
1250 pctl->grp_names = devm_kcalloc(&pdev->dev, pctl->ngroups, in mtk_pctrl_build_state()
1251 sizeof(*pctl->grp_names), GFP_KERNEL); in mtk_pctrl_build_state()
1252 if (!pctl->grp_names) in mtk_pctrl_build_state()
1255 for (i = 0; i < pctl->devdata->npins; i++) { in mtk_pctrl_build_state()
1256 const struct mtk_desc_pin *pin = pctl->devdata->pins + i; in mtk_pctrl_build_state()
1257 struct mtk_pinctrl_group *group = pctl->groups + i; in mtk_pctrl_build_state()
1262 pctl->grp_names[i] = pin->pin.name; in mtk_pctrl_build_state()
1273 struct mtk_pinctrl *pctl; in mtk_pctrl_init() local
1279 pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); in mtk_pctrl_init()
1280 if (!pctl) in mtk_pctrl_init()
1283 platform_set_drvdata(pdev, pctl); in mtk_pctrl_init()
1293 pctl->regmap1 = syscon_node_to_regmap(node); in mtk_pctrl_init()
1294 if (IS_ERR(pctl->regmap1)) in mtk_pctrl_init()
1295 return PTR_ERR(pctl->regmap1); in mtk_pctrl_init()
1297 pctl->regmap1 = regmap; in mtk_pctrl_init()
1306 pctl->regmap2 = syscon_node_to_regmap(node); in mtk_pctrl_init()
1307 if (IS_ERR(pctl->regmap2)) in mtk_pctrl_init()
1308 return PTR_ERR(pctl->regmap2); in mtk_pctrl_init()
1311 pctl->devdata = data; in mtk_pctrl_init()
1318 pins = devm_kcalloc(&pdev->dev, pctl->devdata->npins, sizeof(*pins), in mtk_pctrl_init()
1323 for (i = 0; i < pctl->devdata->npins; i++) in mtk_pctrl_init()
1324 pins[i] = pctl->devdata->pins[i].pin; in mtk_pctrl_init()
1326 pctl->pctl_desc.name = dev_name(&pdev->dev); in mtk_pctrl_init()
1327 pctl->pctl_desc.owner = THIS_MODULE; in mtk_pctrl_init()
1328 pctl->pctl_desc.pins = pins; in mtk_pctrl_init()
1329 pctl->pctl_desc.npins = pctl->devdata->npins; in mtk_pctrl_init()
1330 pctl->pctl_desc.confops = &mtk_pconf_ops; in mtk_pctrl_init()
1331 pctl->pctl_desc.pctlops = &mtk_pctrl_ops; in mtk_pctrl_init()
1332 pctl->pctl_desc.pmxops = &mtk_pmx_ops; in mtk_pctrl_init()
1333 pctl->dev = &pdev->dev; in mtk_pctrl_init()
1335 pctl->pctl_dev = pinctrl_register(&pctl->pctl_desc, &pdev->dev, pctl); in mtk_pctrl_init()
1336 if (IS_ERR(pctl->pctl_dev)) { in mtk_pctrl_init()
1338 return PTR_ERR(pctl->pctl_dev); in mtk_pctrl_init()
1341 pctl->chip = devm_kzalloc(&pdev->dev, sizeof(*pctl->chip), GFP_KERNEL); in mtk_pctrl_init()
1342 if (!pctl->chip) { in mtk_pctrl_init()
1347 *pctl->chip = mtk_gpio_chip; in mtk_pctrl_init()
1348 pctl->chip->ngpio = pctl->devdata->npins; in mtk_pctrl_init()
1349 pctl->chip->label = dev_name(&pdev->dev); in mtk_pctrl_init()
1350 pctl->chip->dev = &pdev->dev; in mtk_pctrl_init()
1351 pctl->chip->base = -1; in mtk_pctrl_init()
1353 ret = gpiochip_add(pctl->chip); in mtk_pctrl_init()
1360 ret = gpiochip_add_pin_range(pctl->chip, dev_name(&pdev->dev), in mtk_pctrl_init()
1361 0, 0, pctl->devdata->npins); in mtk_pctrl_init()
1378 pctl->eint_reg_base = devm_ioremap_resource(&pdev->dev, res); in mtk_pctrl_init()
1379 if (IS_ERR(pctl->eint_reg_base)) { in mtk_pctrl_init()
1384 ports_buf = pctl->devdata->eint_offsets.ports; in mtk_pctrl_init()
1385 pctl->wake_mask = devm_kcalloc(&pdev->dev, ports_buf, in mtk_pctrl_init()
1386 sizeof(*pctl->wake_mask), GFP_KERNEL); in mtk_pctrl_init()
1387 if (!pctl->wake_mask) { in mtk_pctrl_init()
1392 pctl->cur_mask = devm_kcalloc(&pdev->dev, ports_buf, in mtk_pctrl_init()
1393 sizeof(*pctl->cur_mask), GFP_KERNEL); in mtk_pctrl_init()
1394 if (!pctl->cur_mask) { in mtk_pctrl_init()
1399 pctl->eint_dual_edges = devm_kcalloc(&pdev->dev, pctl->devdata->ap_num, in mtk_pctrl_init()
1401 if (!pctl->eint_dual_edges) { in mtk_pctrl_init()
1413 pctl->domain = irq_domain_add_linear(np, in mtk_pctrl_init()
1414 pctl->devdata->ap_num, &irq_domain_simple_ops, NULL); in mtk_pctrl_init()
1415 if (!pctl->domain) { in mtk_pctrl_init()
1421 mtk_eint_init(pctl); in mtk_pctrl_init()
1422 for (i = 0; i < pctl->devdata->ap_num; i++) { in mtk_pctrl_init()
1423 int virq = irq_create_mapping(pctl->domain, i); in mtk_pctrl_init()
1427 irq_set_chip_data(virq, pctl); in mtk_pctrl_init()
1430 irq_set_chained_handler_and_data(irq, mtk_eint_irq_handler, pctl); in mtk_pctrl_init()
1434 gpiochip_remove(pctl->chip); in mtk_pctrl_init()
1436 pinctrl_unregister(pctl->pctl_dev); in mtk_pctrl_init()