61 	if (pin >= pctl->devdata->type1_start && pin < pctl->devdata->type1_end)  in mtk_get_regmap()
69 	return ((pin >> 4) & pctl->devdata->port_mask)  in mtk_get_port()
70 			<< pctl->devdata->port_shf;  in mtk_get_port()
81 	reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset;  in mtk_pmx_gpio_set_direction()
100 	reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dout_offset;  in mtk_gpio_set()
121 	if (!pctl->devdata->spec_ies_smt_set &&  in mtk_pconf_set_ies_smt()
122 		pctl->devdata->ies_offset == MTK_PINCTRL_NOT_SUPPORT &&  in mtk_pconf_set_ies_smt()
126 	if (!pctl->devdata->spec_ies_smt_set &&  in mtk_pconf_set_ies_smt()
127 		pctl->devdata->smt_offset == MTK_PINCTRL_NOT_SUPPORT &&  in mtk_pconf_set_ies_smt()
135 	if (pctl->devdata->spec_ies_smt_set) {  in mtk_pconf_set_ies_smt()
136 		return pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin),  in mtk_pconf_set_ies_smt()
137 			pin, pctl->devdata->port_align, value, arg);  in mtk_pconf_set_ies_smt()
143 		offset = pctl->devdata->ies_offset;  in mtk_pconf_set_ies_smt()
145 		offset = pctl->devdata->smt_offset;  in mtk_pconf_set_ies_smt()
186 	for (i = 0; i < pctl->devdata->n_pin_drv_grps; i++) {  in mtk_find_pin_drv_grp_by_pin()
188 				pctl->devdata->pin_drv_grp + i;  in mtk_find_pin_drv_grp_by_pin()
204 	if (pin >= pctl->devdata->npins)  in mtk_pconf_set_driving()
208 	if (!pin_drv || pin_drv->grp > pctl->devdata->n_grp_cls)  in mtk_pconf_set_driving()
211 	drv_grp = pctl->devdata->grp_desc + pin_drv->grp;  in mtk_pconf_set_driving()
298 	if (pctl->devdata->spec_pull_set) {  in mtk_pconf_set_pull_select()
299 		ret = pctl->devdata->spec_pull_set(mtk_get_regmap(pctl, pin),  in mtk_pconf_set_pull_select()
300 			pin, pctl->devdata->port_align, isup, arg);  in mtk_pconf_set_pull_select()
315 			pctl->devdata->pullen_offset, pctl);  in mtk_pconf_set_pull_select()
318 			pctl->devdata->pullen_offset, pctl);  in mtk_pconf_set_pull_select()
322 			pctl->devdata->pullsel_offset, pctl);  in mtk_pconf_set_pull_select()
325 			pctl->devdata->pullsel_offset, pctl);  in mtk_pconf_set_pull_select()
423 	const struct mtk_desc_pin *pin = pctl->devdata->pins + pin_num;  in mtk_pctrl_find_function_by_pin()
440 	for (i = 0; i < pctl->devdata->npins; i++) {  in mtk_pctrl_is_function_valid()
441 		const struct mtk_desc_pin *pin = pctl->devdata->pins + i;  in mtk_pctrl_is_function_valid()
542 		if (pin >= pctl->devdata->npins ||  in mtk_pctrl_dt_subnode_to_map()
670 	reg_addr = ((pin / MAX_GPIO_MODE_PER_REG) << pctl->devdata->port_shf)  in mtk_pmx_set_mode()
671 			+ pctl->devdata->pinmux_offset;  in mtk_pmx_set_mode()
686 	for (i = 0; i < pctl->devdata->npins; i++) {  in mtk_find_pin_by_eint_num()
687 		pin = pctl->devdata->pins + i;  in mtk_find_pin_by_eint_num()
747 	reg_addr =  mtk_get_port(pctl, offset) + pctl->devdata->dir_offset;  in mtk_gpio_get_direction()
761 		pctl->devdata->din_offset;  in mtk_gpio_get()
774 	pin = pctl->devdata->pins + offset;  in mtk_gpio_to_irq()
832 	if (eint_num >= pctl->devdata->ap_num)  in mtk_eint_get_offset()
833 		eint_base = pctl->devdata->ap_num;  in mtk_eint_get_offset()
850 		&pctl->devdata->eint_offsets;  in mtk_eint_can_en_debounce()
860 	if ((eint_num < pctl->devdata->db_cnt) && (sens != MT_EDGE_SENSITIVE))  in mtk_eint_can_en_debounce()
875 		&pctl->devdata->eint_offsets;  in mtk_eint_get_mask()
887 	const struct mtk_eint_offsets *eint_offsets = &(pctl->devdata->eint_offsets);  in mtk_eint_flip_edge()
913 			&pctl->devdata->eint_offsets;  in mtk_eint_mask()
925 		&pctl->devdata->eint_offsets;  in mtk_eint_unmask()
947 	pin = pctl->devdata->pins + offset;  in mtk_gpio_set_debounce()
956 	set_offset = (eint_num / 4) * 4 + pctl->devdata->eint_offsets.dbnc_set;  in mtk_gpio_set_debounce()
957 	clr_offset = (eint_num / 4) * 4 + pctl->devdata->eint_offsets.dbnc_clr;  in mtk_gpio_set_debounce()
1012 		&pctl->devdata->eint_offsets;  in mtk_eint_set_type()
1099 			&pctl->devdata->eint_offsets;  in mtk_eint_suspend()
1112 			&pctl->devdata->eint_offsets;  in mtk_eint_resume()
1129 		&pctl->devdata->eint_offsets;  in mtk_eint_ack()
1152 		&pctl->devdata->eint_offsets;  in mtk_eint_init()
1156 	for (i = 0; i < pctl->devdata->ap_num; i += 32) {  in mtk_eint_init()
1169 		&pctl->devdata->eint_offsets;  in mtk_eint_debounce_process()
1188 		&pctl->devdata->eint_offsets;  in mtk_eint_irq_handler()
1195 	     eint_num < pctl->devdata->ap_num;  in mtk_eint_irq_handler()
1229 			if (index < pctl->devdata->db_cnt)  in mtk_eint_irq_handler()
1241 	pctl->ngroups = pctl->devdata->npins;  in mtk_pctrl_build_state()
1255 	for (i = 0; i < pctl->devdata->npins; i++) {  in mtk_pctrl_build_state()
1256 		const struct mtk_desc_pin *pin = pctl->devdata->pins + i;  in mtk_pctrl_build_state()
1311 	pctl->devdata = data;  in mtk_pctrl_init()
1318 	pins = devm_kcalloc(&pdev->dev, pctl->devdata->npins, sizeof(*pins),  in mtk_pctrl_init()
1323 	for (i = 0; i < pctl->devdata->npins; i++)  in mtk_pctrl_init()
1324 		pins[i] = pctl->devdata->pins[i].pin;  in mtk_pctrl_init()
1329 	pctl->pctl_desc.npins = pctl->devdata->npins;  in mtk_pctrl_init()
1348 	pctl->chip->ngpio = pctl->devdata->npins;  in mtk_pctrl_init()
1361 			0, 0, pctl->devdata->npins);  in mtk_pctrl_init()
1384 	ports_buf = pctl->devdata->eint_offsets.ports;  in mtk_pctrl_init()
1399 	pctl->eint_dual_edges = devm_kcalloc(&pdev->dev, pctl->devdata->ap_num,  in mtk_pctrl_init()
1414 		pctl->devdata->ap_num, &irq_domain_simple_ops, NULL);  in mtk_pctrl_init()
1422 	for (i = 0; i < pctl->devdata->ap_num; i++) {  in mtk_pctrl_init()