155 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_reg()  local
161 		reg_offset = vg->range->pins[offset] * 16;  in byt_gpio_reg()
163 	return vg->reg_base + reg_offset + reg;  in byt_gpio_reg()
166 static void byt_gpio_clear_triggering(struct byt_gpio *vg, unsigned offset)  in byt_gpio_clear_triggering()  argument
168 	void __iomem *reg = byt_gpio_reg(&vg->chip, offset, BYT_CONF0_REG);  in byt_gpio_clear_triggering()
172 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_gpio_clear_triggering()
176 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_gpio_clear_triggering()
179 static u32 byt_get_gpio_mux(struct byt_gpio *vg, unsigned offset)  in byt_get_gpio_mux()  argument
182 	if (!strcmp(vg->range->name, BYT_SCORE_ACPI_UID) &&  in byt_get_gpio_mux()
187 	if (!strcmp(vg->range->name, BYT_SUS_ACPI_UID) &&  in byt_get_gpio_mux()
196 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_request()  local
201 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_gpio_request()
213 	gpio_mux = byt_get_gpio_mux(vg, offset);  in byt_gpio_request()
219 		dev_warn(&vg->pdev->dev,  in byt_gpio_request()
223 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_gpio_request()
225 	pm_runtime_get(&vg->pdev->dev);  in byt_gpio_request()
232 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_free()  local
234 	byt_gpio_clear_triggering(vg, offset);  in byt_gpio_free()
235 	pm_runtime_put(&vg->pdev->dev);  in byt_gpio_free()
240 	struct byt_gpio *vg = to_byt_gpio(irq_data_get_irq_chip_data(d));  in byt_irq_type()  local
244 	void __iomem *reg = byt_gpio_reg(&vg->chip, offset, BYT_CONF0_REG);  in byt_irq_type()
246 	if (offset >= vg->chip.ngpio)  in byt_irq_type()
249 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_irq_type()
268 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_irq_type()
276 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_get()  local
280 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_gpio_get()
282 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_gpio_get()
289 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_set()  local
294 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_gpio_set()
303 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_gpio_set()
308 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_direction_input()  local
313 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_gpio_direction_input()
319 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_gpio_direction_input()
327 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_direction_output()  local
333 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_gpio_direction_output()
352 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_gpio_direction_output()
359 	struct byt_gpio *vg = to_byt_gpio(chip);  in byt_gpio_dbg_show()  local
363 	for (i = 0; i < vg->chip.ngpio; i++) {  in byt_gpio_dbg_show()
368 		offs = vg->range->pins[i] * 16;  in byt_gpio_dbg_show()
370 		raw_spin_lock_irqsave(&vg->lock, flags);  in byt_gpio_dbg_show()
371 		conf0 = readl(vg->reg_base + offs + BYT_CONF0_REG);  in byt_gpio_dbg_show()
372 		val = readl(vg->reg_base + offs + BYT_VAL_REG);  in byt_gpio_dbg_show()
373 		raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_gpio_dbg_show()
410 			   vg->range->pins[i], offs,  in byt_gpio_dbg_show()
431 	struct byt_gpio *vg = to_byt_gpio(irq_desc_get_handler_data(desc));  in byt_gpio_irq_handler()  local
439 	for (base = 0; base < vg->chip.ngpio; base += 32) {  in byt_gpio_irq_handler()
440 		reg = byt_gpio_reg(&vg->chip, base, BYT_INT_STAT_REG);  in byt_gpio_irq_handler()
443 			virq = irq_find_mapping(vg->chip.irqdomain, base + pin);  in byt_gpio_irq_handler()
453 	struct byt_gpio *vg = to_byt_gpio(gc);  in byt_irq_ack()  local
457 	raw_spin_lock(&vg->lock);  in byt_irq_ack()
458 	reg = byt_gpio_reg(&vg->chip, offset, BYT_INT_STAT_REG);  in byt_irq_ack()
460 	raw_spin_unlock(&vg->lock);  in byt_irq_ack()
466 	struct byt_gpio *vg = to_byt_gpio(gc);  in byt_irq_unmask()  local
472 	reg = byt_gpio_reg(&vg->chip, offset, BYT_CONF0_REG);  in byt_irq_unmask()
474 	raw_spin_lock_irqsave(&vg->lock, flags);  in byt_irq_unmask()
495 	raw_spin_unlock_irqrestore(&vg->lock, flags);  in byt_irq_unmask()
501 	struct byt_gpio *vg = to_byt_gpio(gc);  in byt_irq_mask()  local
503 	byt_gpio_clear_triggering(vg, irqd_to_hwirq(d));  in byt_irq_mask()
515 static void byt_gpio_irq_init_hw(struct byt_gpio *vg)  in byt_gpio_irq_init_hw()  argument
526 	for (i = 0; i < vg->chip.ngpio; i++) {  in byt_gpio_irq_init_hw()
527 		value = readl(byt_gpio_reg(&vg->chip, i, BYT_CONF0_REG));  in byt_gpio_irq_init_hw()
528 		if ((value & BYT_PIN_MUX) == byt_get_gpio_mux(vg, i) &&  in byt_gpio_irq_init_hw()
530 			byt_gpio_clear_triggering(vg, i);  in byt_gpio_irq_init_hw()
531 			dev_dbg(&vg->pdev->dev, "disabling GPIO %d\n", i);  in byt_gpio_irq_init_hw()
536 	for (base = 0; base < vg->chip.ngpio; base += 32) {  in byt_gpio_irq_init_hw()
537 		reg = byt_gpio_reg(&vg->chip, base, BYT_INT_STAT_REG);  in byt_gpio_irq_init_hw()
543 			dev_err(&vg->pdev->dev,  in byt_gpio_irq_init_hw()
550 	struct byt_gpio *vg;  in byt_gpio_probe()  local
562 	vg = devm_kzalloc(dev, sizeof(struct byt_gpio), GFP_KERNEL);  in byt_gpio_probe()
563 	if (!vg) {  in byt_gpio_probe()
570 			vg->chip.ngpio = range->npins;  in byt_gpio_probe()
571 			vg->range = range;  in byt_gpio_probe()
576 	if (!vg->chip.ngpio || !vg->range)  in byt_gpio_probe()
579 	vg->pdev = pdev;  in byt_gpio_probe()
580 	platform_set_drvdata(pdev, vg);  in byt_gpio_probe()
583 	vg->reg_base = devm_ioremap_resource(dev, mem_rc);  in byt_gpio_probe()
584 	if (IS_ERR(vg->reg_base))  in byt_gpio_probe()
585 		return PTR_ERR(vg->reg_base);  in byt_gpio_probe()
587 	raw_spin_lock_init(&vg->lock);  in byt_gpio_probe()
589 	gc = &vg->chip;  in byt_gpio_probe()
604 	vg->saved_context = devm_kcalloc(&pdev->dev, gc->ngpio,  in byt_gpio_probe()
605 				       sizeof(*vg->saved_context), GFP_KERNEL);  in byt_gpio_probe()
617 		byt_gpio_irq_init_hw(vg);  in byt_gpio_probe()
640 	struct byt_gpio *vg = platform_get_drvdata(pdev);  in byt_gpio_suspend()  local
643 	for (i = 0; i < vg->chip.ngpio; i++) {  in byt_gpio_suspend()
647 		reg = byt_gpio_reg(&vg->chip, i, BYT_CONF0_REG);  in byt_gpio_suspend()
649 		vg->saved_context[i].conf0 = value;  in byt_gpio_suspend()
651 		reg = byt_gpio_reg(&vg->chip, i, BYT_VAL_REG);  in byt_gpio_suspend()
653 		vg->saved_context[i].val = value;  in byt_gpio_suspend()
662 	struct byt_gpio *vg = platform_get_drvdata(pdev);  in byt_gpio_resume()  local
665 	for (i = 0; i < vg->chip.ngpio; i++) {  in byt_gpio_resume()
669 		reg = byt_gpio_reg(&vg->chip, i, BYT_CONF0_REG);  in byt_gpio_resume()
672 		     vg->saved_context[i].conf0) {  in byt_gpio_resume()
674 			value |= vg->saved_context[i].conf0;  in byt_gpio_resume()
679 		reg = byt_gpio_reg(&vg->chip, i, BYT_VAL_REG);  in byt_gpio_resume()
682 		     vg->saved_context[i].val) {  in byt_gpio_resume()
686 			v |= vg->saved_context[i].val;  in byt_gpio_resume()
726 	struct byt_gpio *vg = platform_get_drvdata(pdev);  in byt_gpio_remove()  local
729 	gpiochip_remove(&vg->chip);  in byt_gpio_remove()