Lines Matching refs:offset
333 static int bcm2835_gpio_direction_input(struct gpio_chip *chip, unsigned offset) in bcm2835_gpio_direction_input() argument
335 return pinctrl_gpio_direction_input(chip->base + offset); in bcm2835_gpio_direction_input()
338 static int bcm2835_gpio_get(struct gpio_chip *chip, unsigned offset) in bcm2835_gpio_get() argument
342 return bcm2835_gpio_get_bit(pc, GPLEV0, offset); in bcm2835_gpio_get()
345 static void bcm2835_gpio_set(struct gpio_chip *chip, unsigned offset, int value) in bcm2835_gpio_set() argument
349 bcm2835_gpio_set_bit(pc, value ? GPSET0 : GPCLR0, offset); in bcm2835_gpio_set()
353 unsigned offset, int value) in bcm2835_gpio_direction_output() argument
355 bcm2835_gpio_set(chip, offset, value); in bcm2835_gpio_direction_output()
356 return pinctrl_gpio_direction_output(chip->base + offset); in bcm2835_gpio_direction_output()
359 static int bcm2835_gpio_to_irq(struct gpio_chip *chip, unsigned offset) in bcm2835_gpio_to_irq() argument
363 return irq_linear_revmap(pc->irq_domain, offset); in bcm2835_gpio_to_irq()
387 unsigned offset; in bcm2835_gpio_irq_handler() local
393 for_each_set_bit(offset, &events, 32) { in bcm2835_gpio_irq_handler()
394 gpio = (32 * bank) + offset; in bcm2835_gpio_irq_handler()
403 unsigned reg, unsigned offset, bool enable) in __bcm2835_gpio_irq_config() argument
406 reg += GPIO_REG_OFFSET(offset) * 4; in __bcm2835_gpio_irq_config()
409 value |= BIT(GPIO_REG_SHIFT(offset)); in __bcm2835_gpio_irq_config()
411 value &= ~(BIT(GPIO_REG_SHIFT(offset))); in __bcm2835_gpio_irq_config()
417 unsigned offset, bool enable) in bcm2835_gpio_irq_config() argument
419 switch (pc->irq_type[offset]) { in bcm2835_gpio_irq_config()
421 __bcm2835_gpio_irq_config(pc, GPREN0, offset, enable); in bcm2835_gpio_irq_config()
425 __bcm2835_gpio_irq_config(pc, GPFEN0, offset, enable); in bcm2835_gpio_irq_config()
429 __bcm2835_gpio_irq_config(pc, GPREN0, offset, enable); in bcm2835_gpio_irq_config()
430 __bcm2835_gpio_irq_config(pc, GPFEN0, offset, enable); in bcm2835_gpio_irq_config()
434 __bcm2835_gpio_irq_config(pc, GPHEN0, offset, enable); in bcm2835_gpio_irq_config()
438 __bcm2835_gpio_irq_config(pc, GPLEN0, offset, enable); in bcm2835_gpio_irq_config()
447 unsigned offset = GPIO_REG_SHIFT(gpio); in bcm2835_gpio_irq_enable() local
452 set_bit(offset, &pc->enabled_irq_map[bank]); in bcm2835_gpio_irq_enable()
461 unsigned offset = GPIO_REG_SHIFT(gpio); in bcm2835_gpio_irq_disable() local
469 clear_bit(offset, &pc->enabled_irq_map[bank]); in bcm2835_gpio_irq_disable()
474 unsigned offset, unsigned int type) in __bcm2835_gpio_irq_set_type_disabled() argument
483 pc->irq_type[offset] = type; in __bcm2835_gpio_irq_set_type_disabled()
494 unsigned offset, unsigned int type) in __bcm2835_gpio_irq_set_type_enabled() argument
498 if (pc->irq_type[offset] != type) { in __bcm2835_gpio_irq_set_type_enabled()
499 bcm2835_gpio_irq_config(pc, offset, false); in __bcm2835_gpio_irq_set_type_enabled()
500 pc->irq_type[offset] = type; in __bcm2835_gpio_irq_set_type_enabled()
505 if (pc->irq_type[offset] == IRQ_TYPE_EDGE_BOTH) { in __bcm2835_gpio_irq_set_type_enabled()
507 pc->irq_type[offset] = IRQ_TYPE_EDGE_FALLING; in __bcm2835_gpio_irq_set_type_enabled()
508 bcm2835_gpio_irq_config(pc, offset, false); in __bcm2835_gpio_irq_set_type_enabled()
509 pc->irq_type[offset] = type; in __bcm2835_gpio_irq_set_type_enabled()
510 } else if (pc->irq_type[offset] != type) { in __bcm2835_gpio_irq_set_type_enabled()
511 bcm2835_gpio_irq_config(pc, offset, false); in __bcm2835_gpio_irq_set_type_enabled()
512 pc->irq_type[offset] = type; in __bcm2835_gpio_irq_set_type_enabled()
513 bcm2835_gpio_irq_config(pc, offset, true); in __bcm2835_gpio_irq_set_type_enabled()
518 if (pc->irq_type[offset] == IRQ_TYPE_EDGE_BOTH) { in __bcm2835_gpio_irq_set_type_enabled()
520 pc->irq_type[offset] = IRQ_TYPE_EDGE_RISING; in __bcm2835_gpio_irq_set_type_enabled()
521 bcm2835_gpio_irq_config(pc, offset, false); in __bcm2835_gpio_irq_set_type_enabled()
522 pc->irq_type[offset] = type; in __bcm2835_gpio_irq_set_type_enabled()
523 } else if (pc->irq_type[offset] != type) { in __bcm2835_gpio_irq_set_type_enabled()
524 bcm2835_gpio_irq_config(pc, offset, false); in __bcm2835_gpio_irq_set_type_enabled()
525 pc->irq_type[offset] = type; in __bcm2835_gpio_irq_set_type_enabled()
526 bcm2835_gpio_irq_config(pc, offset, true); in __bcm2835_gpio_irq_set_type_enabled()
531 if (pc->irq_type[offset] == IRQ_TYPE_EDGE_RISING) { in __bcm2835_gpio_irq_set_type_enabled()
533 pc->irq_type[offset] = IRQ_TYPE_EDGE_FALLING; in __bcm2835_gpio_irq_set_type_enabled()
534 bcm2835_gpio_irq_config(pc, offset, true); in __bcm2835_gpio_irq_set_type_enabled()
535 pc->irq_type[offset] = type; in __bcm2835_gpio_irq_set_type_enabled()
536 } else if (pc->irq_type[offset] == IRQ_TYPE_EDGE_FALLING) { in __bcm2835_gpio_irq_set_type_enabled()
538 pc->irq_type[offset] = IRQ_TYPE_EDGE_RISING; in __bcm2835_gpio_irq_set_type_enabled()
539 bcm2835_gpio_irq_config(pc, offset, true); in __bcm2835_gpio_irq_set_type_enabled()
540 pc->irq_type[offset] = type; in __bcm2835_gpio_irq_set_type_enabled()
541 } else if (pc->irq_type[offset] != type) { in __bcm2835_gpio_irq_set_type_enabled()
542 bcm2835_gpio_irq_config(pc, offset, false); in __bcm2835_gpio_irq_set_type_enabled()
543 pc->irq_type[offset] = type; in __bcm2835_gpio_irq_set_type_enabled()
544 bcm2835_gpio_irq_config(pc, offset, true); in __bcm2835_gpio_irq_set_type_enabled()
550 if (pc->irq_type[offset] != type) { in __bcm2835_gpio_irq_set_type_enabled()
551 bcm2835_gpio_irq_config(pc, offset, false); in __bcm2835_gpio_irq_set_type_enabled()
552 pc->irq_type[offset] = type; in __bcm2835_gpio_irq_set_type_enabled()
553 bcm2835_gpio_irq_config(pc, offset, true); in __bcm2835_gpio_irq_set_type_enabled()
567 unsigned offset = GPIO_REG_SHIFT(gpio); in bcm2835_gpio_irq_set_type() local
574 if (test_bit(offset, &pc->enabled_irq_map[bank])) in bcm2835_gpio_irq_set_type()
631 unsigned offset) in bcm2835_pctl_pin_dbg_show() argument
634 enum bcm2835_fsel fsel = bcm2835_pinctrl_fsel_get(pc, offset); in bcm2835_pctl_pin_dbg_show()
636 int value = bcm2835_gpio_get_bit(pc, GPLEV0, offset); in bcm2835_pctl_pin_dbg_show()
637 int irq = irq_find_mapping(pc->irq_domain, offset); in bcm2835_pctl_pin_dbg_show()
641 irq, irq_type_names[pc->irq_type[offset]]); in bcm2835_pctl_pin_dbg_show()
847 unsigned offset) in bcm2835_pmx_gpio_disable_free() argument
852 bcm2835_pinctrl_fsel_set(pc, offset, BCM2835_FSEL_GPIO_IN); in bcm2835_pmx_gpio_disable_free()
857 unsigned offset, in bcm2835_pmx_gpio_set_direction() argument
864 bcm2835_pinctrl_fsel_set(pc, offset, fsel); in bcm2835_pmx_gpio_set_direction()
987 unsigned offset; in bcm2835_pinctrl_probe() local
1001 for_each_set_bit(offset, &events, 32) in bcm2835_pinctrl_probe()
1002 bcm2835_gpio_wr(pc, GPEDS0 + i * 4, BIT(offset)); in bcm2835_pinctrl_probe()