Lines Matching refs:MIPHY_CONF
69 #define MIPHY_CONF 0x0f macro
421 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28lp_pll_calibration()
442 writeb_relaxed(gen->bank, base + MIPHY_CONF); in miphy28lp_sata_config_gen()
469 writeb_relaxed(gen->bank, base + MIPHY_CONF); in miphy28lp_pcie_config_gen()
555 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28_usb3_miphy_reset()
558 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28_usb3_miphy_reset()
561 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28_usb3_miphy_reset()
583 writeb_relaxed(val, base + MIPHY_CONF); in miphy_sata_tune_ssc()
621 writeb_relaxed(val, base + MIPHY_CONF); in miphy_pcie_tune_ssc()
741 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28lp_configure_usb3()
778 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28lp_configure_usb3()