Lines Matching refs:BIT

34 #define EXYNOS_5250_HOSTPHYCTRL0_PHYSWRSTALL		BIT(31)
41 #define EXYNOS_5250_HOSTPHYCTRL0_TESTBURNIN		BIT(11)
42 #define EXYNOS_5250_HOSTPHYCTRL0_RETENABLE		BIT(10)
43 #define EXYNOS_5250_HOSTPHYCTRL0_COMMON_ON_N		BIT(9)
48 #define EXYNOS_5250_HOSTPHYCTRL0_SIDDQ			BIT(6)
49 #define EXYNOS_5250_HOSTPHYCTRL0_FORCESLEEP		BIT(5)
50 #define EXYNOS_5250_HOSTPHYCTRL0_FORCESUSPEND		BIT(4)
51 #define EXYNOS_5250_HOSTPHYCTRL0_WORDINTERFACE		BIT(3)
52 #define EXYNOS_5250_HOSTPHYCTRL0_UTMISWRST		BIT(2)
53 #define EXYNOS_5250_HOSTPHYCTRL0_LINKSWRST		BIT(1)
54 #define EXYNOS_5250_HOSTPHYCTRL0_PHYSWRST		BIT(0)
68 #define EXYNOS_5250_HSICPHYCTRLX_SIDDQ			BIT(6)
69 #define EXYNOS_5250_HSICPHYCTRLX_FORCESLEEP		BIT(5)
70 #define EXYNOS_5250_HSICPHYCTRLX_FORCESUSPEND		BIT(4)
71 #define EXYNOS_5250_HSICPHYCTRLX_WORDINTERFACE		BIT(3)
72 #define EXYNOS_5250_HSICPHYCTRLX_UTMISWRST		BIT(2)
73 #define EXYNOS_5250_HSICPHYCTRLX_PHYSWRST		BIT(0)
77 #define EXYNOS_5250_HOSTEHCICTRL_ENAINCRXALIGN		BIT(29)
78 #define EXYNOS_5250_HOSTEHCICTRL_ENAINCR4		BIT(28)
79 #define EXYNOS_5250_HOSTEHCICTRL_ENAINCR8		BIT(27)
80 #define EXYNOS_5250_HOSTEHCICTRL_ENAINCR16		BIT(26)
81 #define EXYNOS_5250_HOSTEHCICTRL_AUTOPPDONOVRCUREN	BIT(25)
94 #define EXYNOS_5250_HOSTEHCICTRL_SIMULATIONMODE		BIT(0)
101 #define EXYNOS_5250_HOSTOHCICTRL_FRAMELENVALEN		BIT(0)
105 #define EXYNOS_5250_USBOTGSYS_PHYLINK_SW_RESET		BIT(14)
106 #define EXYNOS_5250_USBOTGSYS_LINK_SW_RST_UOTG		BIT(13)
107 #define EXYNOS_5250_USBOTGSYS_PHY_SW_RST		BIT(12)
111 #define EXYNOS_5250_USBOTGSYS_ID_PULLUP			BIT(8)
112 #define EXYNOS_5250_USBOTGSYS_COMMON_ON			BIT(7)
116 #define EXYNOS_5250_USBOTGSYS_FORCE_SLEEP		BIT(3)
117 #define EXYNOS_5250_USBOTGSYS_OTGDISABLE		BIT(2)
118 #define EXYNOS_5250_USBOTGSYS_SIDDQ_UOTG		BIT(1)
119 #define EXYNOS_5250_USBOTGSYS_FORCE_SUSPEND		BIT(0)
123 #define EXYNOS_5250_USB_ISOL_OTG		BIT(0)
125 #define EXYNOS_5250_USB_ISOL_HOST		BIT(0)