Lines Matching refs:pci_write_config_dword

542 		pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,  in pci_setup_cardbus()
544 		pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,  in pci_setup_cardbus()
552 		pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,  in pci_setup_cardbus()
554 		pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,  in pci_setup_cardbus()
562 		pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,  in pci_setup_cardbus()
564 		pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,  in pci_setup_cardbus()
572 		pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,  in pci_setup_cardbus()
574 		pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,  in pci_setup_cardbus()
621 	pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);  in pci_setup_bridge_io()
625 	pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16);  in pci_setup_bridge_io()
644 	pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);  in pci_setup_bridge_mmio()
656 	pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0);  in pci_setup_bridge_mmio_pref()
673 	pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);  in pci_setup_bridge_mmio_pref()
676 	pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);  in pci_setup_bridge_mmio_pref()
677 	pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);  in pci_setup_bridge_mmio_pref()
772 		pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE,  in pci_bridge_check_ranges()
775 		pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, 0x0);  in pci_bridge_check_ranges()
791 		pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,  in pci_bridge_check_ranges()
796 		pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,  in pci_bridge_check_ranges()