677 			      struct msix_entry *entries, int nvec)  in msix_setup_entries()  argument
695 		entry->msi_attrib.entry_nr	= entries[i].entry;  in msix_setup_entries()
707 				 struct msix_entry *entries)  in msix_program_entries()  argument
713 		int offset = entries[i].entry * PCI_MSIX_ENTRY_SIZE +  in msix_program_entries()
716 		entries[i].vector = entry->irq;  in msix_program_entries()
734 				struct msix_entry *entries, int nvec)  in msix_capability_init()  argument
749 	ret = msix_setup_entries(dev, base, entries, nvec);  in msix_capability_init()
770 	msix_program_entries(dev, entries);  in msix_capability_init()
944 int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec)  in pci_enable_msix()  argument
952 	if (!entries)  in pci_enable_msix()
963 		if (entries[i].entry >= nr_entries)  in pci_enable_msix()
966 			if (entries[i].entry == entries[j].entry)  in pci_enable_msix()
977 	return msix_capability_init(dev, entries, nvec);  in pci_enable_msix()
1101 int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,  in pci_enable_msix_range()  argument
1111 		rc = pci_enable_msix(dev, entries, nvec);  in pci_enable_msix_range()