Lines Matching refs:slot_ctrl
161 if (ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE && in pcie_wait_cmd()
162 ctrl->slot_ctrl & PCI_EXP_SLTCTL_CCIE) in pcie_wait_cmd()
177 ctrl->slot_ctrl, in pcie_wait_cmd()
185 u16 slot_ctrl; in pcie_do_write_cmd() local
194 pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); in pcie_do_write_cmd()
195 if (slot_ctrl == (u16) ~0) { in pcie_do_write_cmd()
200 slot_ctrl &= ~mask; in pcie_do_write_cmd()
201 slot_ctrl |= (cmd & mask); in pcie_do_write_cmd()
204 pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl); in pcie_do_write_cmd()
206 ctrl->slot_ctrl = slot_ctrl; in pcie_do_write_cmd()
362 u16 slot_ctrl; in pciehp_get_attention_status() local
364 pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); in pciehp_get_attention_status()
366 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); in pciehp_get_attention_status()
368 switch (slot_ctrl & PCI_EXP_SLTCTL_AIC) { in pciehp_get_attention_status()
388 u16 slot_ctrl; in pciehp_get_power_status() local
390 pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); in pciehp_get_power_status()
392 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); in pciehp_get_power_status()
394 switch (slot_ctrl & PCI_EXP_SLTCTL_PCC) { in pciehp_get_power_status()