Lines Matching refs:u8
106 u8 ver_num;
107 u8 scal_count;
108 u8 riodev_count;
117 u8 node_id;
119 u8 port0_node_connect;
120 u8 port0_port_connect;
121 u8 port1_node_connect;
122 u8 port1_port_connect;
123 u8 port2_node_connect;
124 u8 port2_port_connect;
125 u8 chassis_num;
134 u8 rio_node_id;
136 u8 rio_type;
137 u8 owner_id;
138 u8 port0_node_connect;
139 u8 port0_port_connect;
140 u8 port1_node_connect;
141 u8 port1_port_connect;
142 u8 first_slot_num;
143 u8 status;
144 u8 wpindex;
145 u8 chassis_num;
150 u8 rio_type;
151 u8 chassis_num;
152 u8 first_slot_num;
153 u8 middle_num;
158 u8 rio_type;
159 u8 chassis_num;
160 u8 first_slot_num;
161 u8 middle_num;
162 u8 pack_count;
171 u8 format;
182 u8 slot_num;
184 u8 ctl_index;
185 u8 slot_cap;
190 u8 slots_at_33_conv;
191 u8 slots_at_66_conv;
192 u8 slots_at_66_pcix;
193 u8 slots_at_100_pcix;
194 u8 slots_at_133_pcix;
208 u8 bus;
209 u8 dev_fun;
214 u8 i2c_addr;
225 u8 format;
237 u8 rsrc_type;
238 u8 bus_num;
239 u8 dev_fun;
242 u8 marked; /* for NVRAM */
252 u8 slot_min;
253 u8 slot_max;
254 u8 slot_count;
255 u8 busno;
256 u8 controller_id;
257 u8 current_speed;
258 u8 current_bus_mode;
259 u8 index;
260 u8 slots_at_33_conv;
261 u8 slots_at_66_conv;
262 u8 slots_at_66_pcix;
263 u8 slots_at_100_pcix;
264 u8 slots_at_133_pcix;
280 struct slot *ibmphp_get_slot_from_physical_num(u8);
286 int ibmphp_get_bus_index(u8);
343 u8 busno;
362 u8 busno;
363 u8 devfunc;
368 u8 fromMem; /* this is to indicate that the range is from
378 u8 not_correct; /* needed for return */
388 int ibmphp_check_resource(struct resource_node *, u8);
389 int ibmphp_remove_bus(struct bus_node *, u8);
392 struct bus_node *ibmphp_find_res_bus(u8);
396 int ibmphp_hpc_readslot(struct slot *, u8, u8 *);
397 int ibmphp_hpc_writeslot(struct slot *, u8);
600 #define SLOT_POWER(s) ((u8) ((s & HPC_SLOT_POWER) \
603 #define SLOT_CONNECT(s) ((u8) ((s & HPC_SLOT_CONNECT) \
606 #define SLOT_ATTN(s,es) ((u8) ((es & HPC_SLOT_BLINK_ATTN) \
610 #define SLOT_PRESENT(s) ((u8) ((s & HPC_SLOT_PRSNT1) \
614 #define SLOT_PWRGD(s) ((u8) ((s & HPC_SLOT_PWRGD) \
617 #define SLOT_BUS_SPEED(s) ((u8) ((s & HPC_SLOT_BUS_SPEED) \
620 #define SLOT_LATCH(s) ((u8) ((s & HPC_SLOT_LATCH) \
623 #define SLOT_PCIX(es) ((u8) ((es & HPC_SLOT_PCIX) \
626 #define SLOT_SPEED(es) ((u8) ((es & HPC_SLOT_SPEED2) \
631 #define SLOT_BUS_MODE(es) ((u8) ((es & HPC_SLOT_BUS_MODE) \
637 #define CURRENT_BUS_SPEED(s) ((u8) (s & BUS_SPEED_2) \
641 #define CURRENT_BUS_MODE(s) ((u8) (s & BUS_MODE) ? BUS_MODE_PCIX : BUS_MODE_PCI)
643 #define READ_BUS_STATUS(s) ((u8) (s->options & BUS_STATUS_AVAILABLE))
647 #define SET_BUS_STATUS(s) ((u8) (s->options & BUS_CONTROL_AVAILABLE))
649 #define READ_SLOT_LATCH(s) ((u8) (s->options & SLOT_LATCH_REGS_SUPPORTED))
654 #define CTLR_WORKING(c) ((u8) ((c & HPC_CTLR_WORKING) \
656 #define CTLR_FINISHED(c) ((u8) ((c & HPC_CTLR_FINISHED) \
658 #define CTLR_RESULT(c) ((u8) ((c & HPC_CTLR_RESULT1) \
693 u8 busno;
694 u8 device;
695 u8 function;
701 u8 irq[4]; /* for interrupt config */
702 u8 bus; /* flag for unconfiguring, to say if PPB */
706 u8 bus;
707 u8 device;
708 u8 number;
709 u8 real_physical_slot_num;
711 u8 supported_speed;
712 u8 supported_bus_mode;
713 u8 flag; /* this is for disable slot and polling */
714 u8 ctlr_index;
718 u8 irq[4];
722 u8 status;
723 u8 ext_status;
724 u8 busstatus;
731 u8 starting_slot_num; /* starting and ending slot #'s this ctrl controls*/
732 u8 ending_slot_num;
733 u8 revision;
734 u8 options; /* which options HPC supports */
735 u8 status;
736 u8 ctlr_id;
737 u8 slot_count;
738 u8 bus_count;
739 u8 ctlr_relative_id;
746 u8 ctlr_type;
755 int ibmphp_configure_card(struct pci_func *, u8);