Lines Matching refs:upper_32_bits
198 val = (val32 & 0x0000ffff) | (upper_32_bits(mask) << 16); in xgene_pcie_set_ib_mask()
202 val = (val32 & 0xffff0000) | (upper_32_bits(mask) >> 16); in xgene_pcie_set_ib_mask()
287 writel(upper_32_bits(cpu_addr), base + 0x04); in xgene_pcie_setup_ob_reg()
289 writel(upper_32_bits(mask), base + 0x0c); in xgene_pcie_setup_ob_reg()
291 writel(upper_32_bits(pci_addr), base + 0x14); in xgene_pcie_setup_ob_reg()
297 writel(upper_32_bits(addr), csr_base + CFGBARH); in xgene_pcie_setup_cfg_reg()
350 writel(upper_32_bits(pim) | EN_COHERENCY, addr + 0x04); in xgene_pcie_setup_pims()
352 writel(upper_32_bits(size), addr + 0x14); in xgene_pcie_setup_pims()
409 writel(upper_32_bits(cpu_addr), bar_addr + 0x4); in xgene_pcie_setup_ib_reg()
421 writel(upper_32_bits(cpu_addr), bar_addr + 0x4); in xgene_pcie_setup_ib_reg()
423 writel(upper_32_bits(mask), csr_base + IR3MSKL + 0x4); in xgene_pcie_setup_ib_reg()