Lines Matching refs:ret
611 int ret; in wl127x_prepare_read() local
629 ret = wlcore_write(wl, WL1271_SLV_REG_DATA, priv->rx_mem_addr, in wl127x_prepare_read()
631 if (ret < 0) in wl127x_prepare_read()
632 return ret; in wl127x_prepare_read()
640 int ret = 0; in wl12xx_identify_chip() local
715 ret = -ENODEV; in wl12xx_identify_chip()
730 return ret; in wl12xx_identify_chip()
736 int ret; in wl12xx_top_reg_write() local
740 ret = wlcore_write32(wl, WL12XX_OCP_POR_CTR, addr); in wl12xx_top_reg_write()
741 if (ret < 0) in wl12xx_top_reg_write()
745 ret = wlcore_write32(wl, WL12XX_OCP_DATA_WRITE, val); in wl12xx_top_reg_write()
746 if (ret < 0) in wl12xx_top_reg_write()
750 ret = wlcore_write32(wl, WL12XX_OCP_CMD, OCP_CMD_WRITE); in wl12xx_top_reg_write()
751 if (ret < 0) in wl12xx_top_reg_write()
755 return ret; in wl12xx_top_reg_write()
763 int ret; in wl12xx_top_reg_read() local
767 ret = wlcore_write32(wl, WL12XX_OCP_POR_CTR, addr); in wl12xx_top_reg_read()
768 if (ret < 0) in wl12xx_top_reg_read()
769 return ret; in wl12xx_top_reg_read()
772 ret = wlcore_write32(wl, WL12XX_OCP_CMD, OCP_CMD_READ); in wl12xx_top_reg_read()
773 if (ret < 0) in wl12xx_top_reg_read()
774 return ret; in wl12xx_top_reg_read()
778 ret = wlcore_read32(wl, WL12XX_OCP_DATA_READ, &val); in wl12xx_top_reg_read()
779 if (ret < 0) in wl12xx_top_reg_read()
780 return ret; in wl12xx_top_reg_read()
803 int ret; in wl128x_switch_tcxo_to_fref() local
806 ret = wl12xx_top_reg_read(wl, WL_SPARE_REG, &spare_reg); in wl128x_switch_tcxo_to_fref()
807 if (ret < 0) in wl128x_switch_tcxo_to_fref()
808 return ret; in wl128x_switch_tcxo_to_fref()
813 ret = wl12xx_top_reg_write(wl, WL_SPARE_REG, spare_reg); in wl128x_switch_tcxo_to_fref()
814 if (ret < 0) in wl128x_switch_tcxo_to_fref()
815 return ret; in wl128x_switch_tcxo_to_fref()
818 ret = wl12xx_top_reg_write(wl, SYS_CLK_CFG_REG, in wl128x_switch_tcxo_to_fref()
820 if (ret < 0) in wl128x_switch_tcxo_to_fref()
821 return ret; in wl128x_switch_tcxo_to_fref()
832 int ret; in wl128x_is_tcxo_valid() local
834 ret = wl12xx_top_reg_read(wl, TCXO_CLK_DETECT_REG, &tcxo_detection); in wl128x_is_tcxo_valid()
835 if (ret < 0) in wl128x_is_tcxo_valid()
847 int ret; in wl128x_is_fref_valid() local
849 ret = wl12xx_top_reg_read(wl, FREF_CLK_DETECT_REG, &fref_detection); in wl128x_is_fref_valid()
850 if (ret < 0) in wl128x_is_fref_valid()
861 int ret; in wl128x_manually_configure_mcs_pll() local
863 ret = wl12xx_top_reg_write(wl, MCS_PLL_M_REG, MCS_PLL_M_REG_VAL); in wl128x_manually_configure_mcs_pll()
864 if (ret < 0) in wl128x_manually_configure_mcs_pll()
867 ret = wl12xx_top_reg_write(wl, MCS_PLL_N_REG, MCS_PLL_N_REG_VAL); in wl128x_manually_configure_mcs_pll()
868 if (ret < 0) in wl128x_manually_configure_mcs_pll()
871 ret = wl12xx_top_reg_write(wl, MCS_PLL_CONFIG_REG, in wl128x_manually_configure_mcs_pll()
875 return ret; in wl128x_manually_configure_mcs_pll()
884 int ret; in wl128x_configure_mcs_pll() local
887 ret = wl12xx_top_reg_read(wl, WL_SPARE_REG, &spare_reg); in wl128x_configure_mcs_pll()
888 if (ret < 0) in wl128x_configure_mcs_pll()
889 return ret; in wl128x_configure_mcs_pll()
894 ret = wl12xx_top_reg_write(wl, WL_SPARE_REG, spare_reg); in wl128x_configure_mcs_pll()
895 if (ret < 0) in wl128x_configure_mcs_pll()
896 return ret; in wl128x_configure_mcs_pll()
906 ret = wl12xx_top_reg_read(wl, MCS_PLL_CONFIG_REG, &pll_config); in wl128x_configure_mcs_pll()
907 if (ret < 0) in wl128x_configure_mcs_pll()
908 return ret; in wl128x_configure_mcs_pll()
914 ret = wl12xx_top_reg_write(wl, MCS_PLL_CONFIG_REG, pll_config); in wl128x_configure_mcs_pll()
916 return ret; in wl128x_configure_mcs_pll()
930 int ret; in wl128x_boot_clk() local
941 ret = wl12xx_top_reg_read(wl, SYS_CLK_CFG_REG, &sys_clk_cfg); in wl128x_boot_clk()
942 if (ret < 0) in wl128x_boot_clk()
943 return ret; in wl128x_boot_clk()
979 int ret; in wl127x_boot_clk() local
1000 ret = wl12xx_top_reg_read(wl, OCP_REG_CLK_TYPE, &val); in wl127x_boot_clk()
1001 if (ret < 0) in wl127x_boot_clk()
1005 ret = wl12xx_top_reg_write(wl, OCP_REG_CLK_TYPE, val); in wl127x_boot_clk()
1006 if (ret < 0) in wl127x_boot_clk()
1010 ret = wl12xx_top_reg_read(wl, OCP_REG_CLK_PULL, &val); in wl127x_boot_clk()
1011 if (ret < 0) in wl127x_boot_clk()
1015 ret = wl12xx_top_reg_write(wl, OCP_REG_CLK_PULL, val); in wl127x_boot_clk()
1016 if (ret < 0) in wl127x_boot_clk()
1021 ret = wl12xx_top_reg_read(wl, OCP_REG_CLK_POLARITY, &val); in wl127x_boot_clk()
1022 if (ret < 0) in wl127x_boot_clk()
1027 ret = wl12xx_top_reg_write(wl, OCP_REG_CLK_POLARITY, val); in wl127x_boot_clk()
1028 if (ret < 0) in wl127x_boot_clk()
1032 ret = wlcore_write32(wl, WL12XX_PLL_PARAMETERS, clk); in wl127x_boot_clk()
1033 if (ret < 0) in wl127x_boot_clk()
1036 ret = wlcore_read32(wl, WL12XX_PLL_PARAMETERS, &pause); in wl127x_boot_clk()
1037 if (ret < 0) in wl127x_boot_clk()
1044 ret = wlcore_write32(wl, WL12XX_WU_COUNTER_PAUSE, pause); in wl127x_boot_clk()
1047 return ret; in wl127x_boot_clk()
1054 int ret = 0; in wl1271_boot_soft_reset() local
1057 ret = wlcore_write32(wl, WL12XX_SLV_SOFT_RESET, ACX_SLV_SOFT_RESET_BIT); in wl1271_boot_soft_reset()
1058 if (ret < 0) in wl1271_boot_soft_reset()
1064 ret = wlcore_read32(wl, WL12XX_SLV_SOFT_RESET, &boot_data); in wl1271_boot_soft_reset()
1065 if (ret < 0) in wl1271_boot_soft_reset()
1083 ret = wlcore_write32(wl, WL12XX_ENABLE, 0x0); in wl1271_boot_soft_reset()
1084 if (ret < 0) in wl1271_boot_soft_reset()
1088 ret = wlcore_write32(wl, WL12XX_SPARE_A2, 0xffff); in wl1271_boot_soft_reset()
1091 return ret; in wl1271_boot_soft_reset()
1097 int ret = 0; in wl12xx_pre_boot() local
1102 ret = wl128x_boot_clk(wl, &selected_clock); in wl12xx_pre_boot()
1103 if (ret < 0) in wl12xx_pre_boot()
1106 ret = wl127x_boot_clk(wl); in wl12xx_pre_boot()
1107 if (ret < 0) in wl12xx_pre_boot()
1112 ret = wlcore_write32(wl, WL12XX_WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL); in wl12xx_pre_boot()
1113 if (ret < 0) in wl12xx_pre_boot()
1118 ret = wlcore_set_partition(wl, &wl->ptable[PART_DRPW]); in wl12xx_pre_boot()
1119 if (ret < 0) in wl12xx_pre_boot()
1126 ret = wlcore_read32(wl, WL12XX_DRPW_SCRATCH_START, &clk); in wl12xx_pre_boot()
1127 if (ret < 0) in wl12xx_pre_boot()
1137 ret = wlcore_write32(wl, WL12XX_DRPW_SCRATCH_START, clk); in wl12xx_pre_boot()
1138 if (ret < 0) in wl12xx_pre_boot()
1141 ret = wlcore_set_partition(wl, &wl->ptable[PART_WORK]); in wl12xx_pre_boot()
1142 if (ret < 0) in wl12xx_pre_boot()
1146 ret = wlcore_write_reg(wl, REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL); in wl12xx_pre_boot()
1147 if (ret < 0) in wl12xx_pre_boot()
1150 ret = wl1271_boot_soft_reset(wl); in wl12xx_pre_boot()
1151 if (ret < 0) in wl12xx_pre_boot()
1155 return ret; in wl12xx_pre_boot()
1162 int ret; in wl12xx_pre_upload() local
1168 ret = wlcore_write32(wl, WL12XX_EEPROMLESS_IND, WL12XX_EEPROMLESS_IND); in wl12xx_pre_upload()
1169 if (ret < 0) in wl12xx_pre_upload()
1172 ret = wlcore_read_reg(wl, REG_CHIP_ID_B, &tmp); in wl12xx_pre_upload()
1173 if (ret < 0) in wl12xx_pre_upload()
1179 ret = wlcore_read32(wl, WL12XX_SCR_PAD2, &tmp); in wl12xx_pre_upload()
1180 if (ret < 0) in wl12xx_pre_upload()
1187 ret = wl12xx_top_reg_write(wl, SDIO_IO_DS, HCI_IO_DS_6MA); in wl12xx_pre_upload()
1188 if (ret < 0) in wl12xx_pre_upload()
1193 ret = wl12xx_top_reg_read(wl, OCP_REG_POLARITY, &polarity); in wl12xx_pre_upload()
1194 if (ret < 0) in wl12xx_pre_upload()
1199 ret = wl12xx_top_reg_write(wl, OCP_REG_POLARITY, polarity); in wl12xx_pre_upload()
1202 return ret; in wl12xx_pre_upload()
1207 int ret; in wl12xx_enable_interrupts() local
1209 ret = wlcore_write_reg(wl, REG_INTERRUPT_MASK, in wl12xx_enable_interrupts()
1211 if (ret < 0) in wl12xx_enable_interrupts()
1215 ret = wlcore_write_reg(wl, REG_INTERRUPT_MASK, in wl12xx_enable_interrupts()
1217 if (ret < 0) in wl12xx_enable_interrupts()
1220 ret = wlcore_write32(wl, WL12XX_HI_CFG, HI_CFG_DEF_VAL); in wl12xx_enable_interrupts()
1221 if (ret < 0) in wl12xx_enable_interrupts()
1224 return ret; in wl12xx_enable_interrupts()
1230 return ret; in wl12xx_enable_interrupts()
1235 int ret; in wl12xx_boot() local
1237 ret = wl12xx_pre_boot(wl); in wl12xx_boot()
1238 if (ret < 0) in wl12xx_boot()
1241 ret = wlcore_boot_upload_nvs(wl); in wl12xx_boot()
1242 if (ret < 0) in wl12xx_boot()
1245 ret = wl12xx_pre_upload(wl); in wl12xx_boot()
1246 if (ret < 0) in wl12xx_boot()
1249 ret = wlcore_boot_upload_firmware(wl); in wl12xx_boot()
1250 if (ret < 0) in wl12xx_boot()
1271 ret = wlcore_boot_run_firmware(wl); in wl12xx_boot()
1272 if (ret < 0) in wl12xx_boot()
1275 ret = wl12xx_enable_interrupts(wl); in wl12xx_boot()
1278 return ret; in wl12xx_boot()
1284 int ret; in wl12xx_trigger_cmd() local
1286 ret = wlcore_write(wl, cmd_box_addr, buf, len, false); in wl12xx_trigger_cmd()
1287 if (ret < 0) in wl12xx_trigger_cmd()
1288 return ret; in wl12xx_trigger_cmd()
1290 ret = wlcore_write_reg(wl, REG_INTERRUPT_TRIG, WL12XX_INTR_TRIG_CMD); in wl12xx_trigger_cmd()
1292 return ret; in wl12xx_trigger_cmd()
1389 int ret; in wl12xx_hw_init() local
1394 ret = wl128x_cmd_general_parms(wl); in wl12xx_hw_init()
1395 if (ret < 0) in wl12xx_hw_init()
1405 ret = wl128x_cmd_radio_parms(wl); in wl12xx_hw_init()
1406 if (ret < 0) in wl12xx_hw_init()
1414 ret = wl1271_acx_host_if_cfg_bitmap(wl, host_cfg_bitmap); in wl12xx_hw_init()
1415 if (ret < 0) in wl12xx_hw_init()
1418 ret = wl1271_cmd_general_parms(wl); in wl12xx_hw_init()
1419 if (ret < 0) in wl12xx_hw_init()
1429 ret = wl1271_cmd_radio_parms(wl); in wl12xx_hw_init()
1430 if (ret < 0) in wl12xx_hw_init()
1432 ret = wl1271_cmd_ext_radio_parms(wl); in wl12xx_hw_init()
1433 if (ret < 0) in wl12xx_hw_init()
1437 return ret; in wl12xx_hw_init()
1519 int ret; in wl12xx_get_fuse_mac() local
1521 ret = wlcore_set_partition(wl, &wl->ptable[PART_DRPW]); in wl12xx_get_fuse_mac()
1522 if (ret < 0) in wl12xx_get_fuse_mac()
1525 ret = wlcore_read32(wl, WL12XX_REG_FUSE_BD_ADDR_1, &mac1); in wl12xx_get_fuse_mac()
1526 if (ret < 0) in wl12xx_get_fuse_mac()
1529 ret = wlcore_read32(wl, WL12XX_REG_FUSE_BD_ADDR_2, &mac2); in wl12xx_get_fuse_mac()
1530 if (ret < 0) in wl12xx_get_fuse_mac()
1538 ret = wlcore_set_partition(wl, &wl->ptable[PART_DOWN]); in wl12xx_get_fuse_mac()
1541 return ret; in wl12xx_get_fuse_mac()
1547 int ret; in wl12xx_get_pg_ver() local
1550 ret = wl12xx_top_reg_read(wl, WL128X_REG_FUSE_DATA_2_1, in wl12xx_get_pg_ver()
1553 ret = wl12xx_top_reg_read(wl, WL127X_REG_FUSE_DATA_2_1, in wl12xx_get_pg_ver()
1556 if (ret >= 0 && ver) in wl12xx_get_pg_ver()
1559 return ret; in wl12xx_get_pg_ver()
1579 int ret; in wl12xx_plt_init() local
1581 ret = wl->ops->boot(wl); in wl12xx_plt_init()
1582 if (ret < 0) in wl12xx_plt_init()
1585 ret = wl->ops->hw_init(wl); in wl12xx_plt_init()
1586 if (ret < 0) in wl12xx_plt_init()
1596 ret = wl1271_acx_init_mem_config(wl); in wl12xx_plt_init()
1597 if (ret < 0) in wl12xx_plt_init()
1600 ret = wl12xx_acx_mem_cfg(wl); in wl12xx_plt_init()
1601 if (ret < 0) in wl12xx_plt_init()
1605 ret = wl1271_cmd_data_path(wl, 1); in wl12xx_plt_init()
1606 if (ret < 0) in wl12xx_plt_init()
1610 ret = wl1271_acx_sleep_auth(wl, WL1271_PSM_CAM); in wl12xx_plt_init()
1611 if (ret < 0) in wl12xx_plt_init()
1615 ret = wl1271_acx_pm_config(wl); in wl12xx_plt_init()
1616 if (ret < 0) in wl12xx_plt_init()
1637 return ret; in wl12xx_plt_init()
1903 int ret; in wl12xx_probe() local
1910 ret = PTR_ERR(hw); in wl12xx_probe()
1917 ret = wlcore_probe(wl, pdev); in wl12xx_probe()
1918 if (ret) in wl12xx_probe()
1921 return ret; in wl12xx_probe()
1926 return ret; in wl12xx_probe()