1132 static void rt61pci_start_queue(struct data_queue *queue)  in rt61pci_start_queue()  argument
1134 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt61pci_start_queue()
1137 	switch (queue->qid) {  in rt61pci_start_queue()
1155 static void rt61pci_kick_queue(struct data_queue *queue)  in rt61pci_kick_queue()  argument
1157 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt61pci_kick_queue()
1160 	switch (queue->qid) {  in rt61pci_kick_queue()
1186 static void rt61pci_stop_queue(struct data_queue *queue)  in rt61pci_stop_queue()  argument
1188 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt61pci_stop_queue()
1191 	switch (queue->qid) {  in rt61pci_stop_queue()
1383 	if (entry->queue->qid == QID_RX) {  in rt61pci_get_entry_state()
1401 	if (entry->queue->qid == QID_RX) {  in rt61pci_clear_entry()
1878 	rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, entry->queue->qid);  in rt61pci_write_tx_desc()
1879 	rt2x00_set_field32(&word, TXD_W1_AIFSN, entry->queue->aifs);  in rt61pci_write_tx_desc()
1880 	rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);  in rt61pci_write_tx_desc()
1881 	rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);  in rt61pci_write_tx_desc()
1903 	rt2x00_set_field32(&word, TXD_W5_PID_TYPE, entry->queue->qid);  in rt61pci_write_tx_desc()
1907 			   TXPOWER_TO_DEV(entry->queue->rt2x00dev->tx_power));  in rt61pci_write_tx_desc()
1911 	if (entry->queue->qid != QID_BEACON) {  in rt61pci_write_tx_desc()
1957 	skbdesc->desc_len = (entry->queue->qid == QID_BEACON) ? TXINFO_SIZE :  in rt61pci_write_tx_desc()
1967 	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;  in rt61pci_write_beacon()
2031 	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;  in rt61pci_clear_beacon()
2089 	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;  in rt61pci_fill_rxdone()
2153 	struct data_queue *queue;  in rt61pci_txdone()  local
2183 		queue = rt2x00queue_get_tx_queue(rt2x00dev, type);  in rt61pci_txdone()
2184 		if (unlikely(!queue))  in rt61pci_txdone()
2192 		if (unlikely(index >= queue->limit))  in rt61pci_txdone()
2195 		entry = &queue->entries[index];  in rt61pci_txdone()
2203 		entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE);  in rt61pci_txdone()
2212 			entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE);  in rt61pci_txdone()
2897 	struct data_queue *queue;  in rt61pci_conf_tx()  local
2920 	queue = rt2x00queue_get_tx_queue(rt2x00dev, queue_idx);  in rt61pci_conf_tx()
2928 	rt2x00_set_field32(&reg, field, queue->txop);  in rt61pci_conf_tx()
2936 	rt2x00_set_field32(&reg, field, queue->aifs);  in rt61pci_conf_tx()
2940 	rt2x00_set_field32(&reg, field, queue->cw_min);  in rt61pci_conf_tx()
2944 	rt2x00_set_field32(&reg, field, queue->cw_max);  in rt61pci_conf_tx()
3023 static void rt61pci_queue_init(struct data_queue *queue)  in rt61pci_queue_init()  argument
3025 	switch (queue->qid) {  in rt61pci_queue_init()
3027 		queue->limit = 32;  in rt61pci_queue_init()
3028 		queue->data_size = DATA_FRAME_SIZE;  in rt61pci_queue_init()
3029 		queue->desc_size = RXD_DESC_SIZE;  in rt61pci_queue_init()
3030 		queue->priv_size = sizeof(struct queue_entry_priv_mmio);  in rt61pci_queue_init()
3037 		queue->limit = 32;  in rt61pci_queue_init()
3038 		queue->data_size = DATA_FRAME_SIZE;  in rt61pci_queue_init()
3039 		queue->desc_size = TXD_DESC_SIZE;  in rt61pci_queue_init()
3040 		queue->priv_size = sizeof(struct queue_entry_priv_mmio);  in rt61pci_queue_init()
3044 		queue->limit = 4;  in rt61pci_queue_init()
3045 		queue->data_size = 0; /* No DMA required for beacons */  in rt61pci_queue_init()
3046 		queue->desc_size = TXINFO_SIZE;  in rt61pci_queue_init()
3047 		queue->priv_size = sizeof(struct queue_entry_priv_mmio);  in rt61pci_queue_init()