39 static bool _rtl8723be_phy_bb8723b_config_parafile(struct ieee80211_hw *hw);
40 static bool _rtl8723be_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
41 static bool _rtl8723be_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
43 static bool _rtl8723be_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
45 static bool _rtl8723be_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
49 static void rtl8723be_phy_set_rf_on(struct ieee80211_hw *hw);
50 static void rtl8723be_phy_set_io(struct ieee80211_hw *hw);
52 u32 rtl8723be_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,  in rtl8723be_phy_query_rf_reg()  argument
55 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_query_rf_reg()
65 	original_value = rtl8723_phy_rf_serial_read(hw, rfpath, regaddr);  in rtl8723be_phy_query_rf_reg()
78 void rtl8723be_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path path,  in rtl8723be_phy_set_rf_reg()  argument
81 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_set_rf_reg()
92 			original_value = rtl8723_phy_rf_serial_read(hw, path,  in rtl8723be_phy_set_rf_reg()
99 	rtl8723_phy_rf_serial_write(hw, path, regaddr, data);  in rtl8723be_phy_set_rf_reg()
109 bool rtl8723be_phy_mac_config(struct ieee80211_hw *hw)  in rtl8723be_phy_mac_config()  argument
111 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_mac_config()
112 	bool rtstatus = _rtl8723be_phy_config_mac_with_headerfile(hw);  in rtl8723be_phy_mac_config()
118 bool rtl8723be_phy_bb_config(struct ieee80211_hw *hw)  in rtl8723be_phy_bb_config()  argument
121 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_bb_config()
126 	rtl8723_phy_init_bb_rf_reg_def(hw);  in rtl8723be_phy_bb_config()
141 		rtstatus = _rtl8723be_phy_bb8723b_config_parafile(hw);  in rtl8723be_phy_bb_config()
144 	rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, 0xFFF000,  in rtl8723be_phy_bb_config()
150 bool rtl8723be_phy_rf_config(struct ieee80211_hw *hw)  in rtl8723be_phy_rf_config()  argument
152 	return rtl8723be_phy_rf6052_config(hw);  in rtl8723be_phy_rf_config()
155 static bool _rtl8723be_check_condition(struct ieee80211_hw *hw,  in _rtl8723be_check_condition()  argument
158 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));  in _rtl8723be_check_condition()
159 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));  in _rtl8723be_check_condition()
184 static void _rtl8723be_config_rf_reg(struct ieee80211_hw *hw, u32 addr,  in _rtl8723be_config_rf_reg()  argument
194 		rtl_set_rfreg(hw, rfpath, regaddr, RFREG_OFFSET_MASK, data);  in _rtl8723be_config_rf_reg()
198 static void _rtl8723be_config_rf_radio_a(struct ieee80211_hw *hw,  in _rtl8723be_config_rf_radio_a()  argument
204 	_rtl8723be_config_rf_reg(hw, addr, data, RF90_PATH_A,  in _rtl8723be_config_rf_radio_a()
209 static void _rtl8723be_phy_init_tx_power_by_rate(struct ieee80211_hw *hw)  in _rtl8723be_phy_init_tx_power_by_rate()  argument
211 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_init_tx_power_by_rate()
226 static void _rtl8723be_config_bb_reg(struct ieee80211_hw *hw,  in _rtl8723be_config_bb_reg()  argument
242 		rtl_set_bbreg(hw, addr, MASKDWORD, data);  in _rtl8723be_config_bb_reg()
247 static void _rtl8723be_phy_set_txpower_by_rate_base(struct ieee80211_hw *hw,  in _rtl8723be_phy_set_txpower_by_rate_base()  argument
252 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_set_txpower_by_rate_base()
290 static u8 _rtl8723be_phy_get_txpower_by_rate_base(struct ieee80211_hw *hw,  in _rtl8723be_phy_get_txpower_by_rate_base()  argument
294 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_get_txpower_by_rate_base()
333 static void _rtl8723be_phy_store_txpower_by_rate_base(struct ieee80211_hw *hw)  in _rtl8723be_phy_store_txpower_by_rate_base()  argument
335 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_store_txpower_by_rate_base()
345 			_rtl8723be_phy_set_txpower_by_rate_base(hw,  in _rtl8723be_phy_store_txpower_by_rate_base()
351 			_rtl8723be_phy_set_txpower_by_rate_base(hw,  in _rtl8723be_phy_store_txpower_by_rate_base()
359 		_rtl8723be_phy_set_txpower_by_rate_base(hw, BAND_ON_2_4G,  in _rtl8723be_phy_store_txpower_by_rate_base()
366 		_rtl8723be_phy_set_txpower_by_rate_base(hw, BAND_ON_2_4G,  in _rtl8723be_phy_store_txpower_by_rate_base()
373 		_rtl8723be_phy_set_txpower_by_rate_base(hw, BAND_ON_2_4G,  in _rtl8723be_phy_store_txpower_by_rate_base()
406 							struct ieee80211_hw *hw)  in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()  argument
408 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()
412 	base = _rtl8723be_phy_get_txpower_by_rate_base(hw,  in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()
421 	base = _rtl8723be_phy_get_txpower_by_rate_base(hw, BAND_ON_2_4G, rfpath,  in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()
430 	base = _rtl8723be_phy_get_txpower_by_rate_base(hw, BAND_ON_2_4G,  in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()
439 	base = _rtl8723be_phy_get_txpower_by_rate_base(hw, BAND_ON_2_4G,  in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()
454 static void phy_txpower_by_rate_config(struct ieee80211_hw *hw)  in phy_txpower_by_rate_config()  argument
456 	_rtl8723be_phy_store_txpower_by_rate_base(hw);  in phy_txpower_by_rate_config()
457 	_rtl8723be_phy_convert_txpower_dbm_to_relative_value(hw);  in phy_txpower_by_rate_config()
460 static bool _rtl8723be_phy_bb8723b_config_parafile(struct ieee80211_hw *hw)  in _rtl8723be_phy_bb8723b_config_parafile()  argument
462 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_bb8723b_config_parafile()
464 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));  in _rtl8723be_phy_bb8723b_config_parafile()
467 	rtstatus = _rtl8723be_phy_config_bb_with_headerfile(hw,  in _rtl8723be_phy_bb8723b_config_parafile()
473 	_rtl8723be_phy_init_tx_power_by_rate(hw);  in _rtl8723be_phy_bb8723b_config_parafile()
476 		rtstatus = _rtl8723be_phy_config_bb_with_pgheaderfile(hw,  in _rtl8723be_phy_bb8723b_config_parafile()
479 	phy_txpower_by_rate_config(hw);  in _rtl8723be_phy_bb8723b_config_parafile()
484 	rtstatus = _rtl8723be_phy_config_bb_with_headerfile(hw,  in _rtl8723be_phy_bb8723b_config_parafile()
490 	rtlphy->cck_high_power = (bool)(rtl_get_bbreg(hw,  in _rtl8723be_phy_bb8723b_config_parafile()
496 static bool _rtl8723be_phy_config_mac_with_headerfile(struct ieee80211_hw *hw)  in _rtl8723be_phy_config_mac_with_headerfile()  argument
498 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_config_mac_with_headerfile()
513 static bool _rtl8723be_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,  in _rtl8723be_phy_config_bb_with_headerfile()  argument
526 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_config_bb_with_headerfile()
537 				_rtl8723be_config_bb_reg(hw, v1, v2);  in _rtl8723be_phy_config_bb_with_headerfile()
543 				if (!_rtl8723be_check_condition(hw,  in _rtl8723be_phy_config_bb_with_headerfile()
565 						_rtl8723be_config_bb_reg(hw,  in _rtl8723be_phy_config_bb_with_headerfile()
583 				rtl_set_bbreg(hw, array_table[i],  in _rtl8723be_phy_config_bb_with_headerfile()
593 				if (!_rtl8723be_check_condition(hw,  in _rtl8723be_phy_config_bb_with_headerfile()
615 						rtl_set_bbreg(hw, array_table[i],  in _rtl8723be_phy_config_bb_with_headerfile()
695 static void _rtl8723be_store_tx_power_by_rate(struct ieee80211_hw *hw,  in _rtl8723be_store_tx_power_by_rate()  argument
700 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_store_tx_power_by_rate()
723 static bool _rtl8723be_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,  in _rtl8723be_phy_config_bb_with_pgheaderfile()  argument
726 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_config_bb_with_pgheaderfile()
749 					_rtl8723be_store_tx_power_by_rate(hw,  in _rtl8723be_phy_config_bb_with_pgheaderfile()
761 bool rtl8723be_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,  in rtl8723be_phy_config_rf_with_headerfile()  argument
775 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_config_rf_with_headerfile()
776 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));  in rtl8723be_phy_config_rf_with_headerfile()
791 				_rtl8723be_config_rf_radio_a(hw, v1, v2);  in rtl8723be_phy_config_rf_with_headerfile()
797 				if (!_rtl8723be_check_condition(hw,  in rtl8723be_phy_config_rf_with_headerfile()
819 						_rtl8723be_config_rf_radio_a(hw,  in rtl8723be_phy_config_rf_with_headerfile()
833 			_rtl8723be_config_rf_radio_a(hw, 0x52, 0x7E4BD);  in rtl8723be_phy_config_rf_with_headerfile()
846 void rtl8723be_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw)  in rtl8723be_phy_get_hw_reg_originalvalue()  argument
848 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_get_hw_reg_originalvalue()
852 	    (u8)rtl_get_bbreg(hw, ROFDM0_XAAGCCORE1, MASKBYTE0);  in rtl8723be_phy_get_hw_reg_originalvalue()
854 	    (u8)rtl_get_bbreg(hw, ROFDM0_XBAGCCORE1, MASKBYTE0);  in rtl8723be_phy_get_hw_reg_originalvalue()
856 	    (u8)rtl_get_bbreg(hw, ROFDM0_XCAGCCORE1, MASKBYTE0);  in rtl8723be_phy_get_hw_reg_originalvalue()
858 	    (u8)rtl_get_bbreg(hw, ROFDM0_XDAGCCORE1, MASKBYTE0);  in rtl8723be_phy_get_hw_reg_originalvalue()
867 	rtlphy->framesync = (u8)rtl_get_bbreg(hw, ROFDM0_RXDETECTOR3,  in rtl8723be_phy_get_hw_reg_originalvalue()
869 	rtlphy->framesync_c34 = rtl_get_bbreg(hw, ROFDM0_RXDETECTOR2,  in rtl8723be_phy_get_hw_reg_originalvalue()
949 static u8 _rtl8723be_get_txpower_by_rate(struct ieee80211_hw *hw,  in _rtl8723be_get_txpower_by_rate()  argument
953 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_get_txpower_by_rate()
1016 static u8 _rtl8723be_get_txpower_index(struct ieee80211_hw *hw, u8 path,  in _rtl8723be_get_txpower_index()  argument
1019 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_get_txpower_index()
1020 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));  in _rtl8723be_get_txpower_index()
1055 		power_diff_byrate = _rtl8723be_get_txpower_by_rate(hw,  in _rtl8723be_get_txpower_index()
1067 static void _rtl8723be_phy_set_txpower_index(struct ieee80211_hw *hw,  in _rtl8723be_phy_set_txpower_index()  argument
1070 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_set_txpower_index()
1074 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_CCK1_MCS32,  in _rtl8723be_phy_set_txpower_index()
1078 			rtl8723_phy_set_bb_reg(hw, RTXAGC_B_CCK11_A_CCK2_11,  in _rtl8723be_phy_set_txpower_index()
1082 			rtl8723_phy_set_bb_reg(hw, RTXAGC_B_CCK11_A_CCK2_11,  in _rtl8723be_phy_set_txpower_index()
1086 			rtl8723_phy_set_bb_reg(hw, RTXAGC_B_CCK11_A_CCK2_11,  in _rtl8723be_phy_set_txpower_index()
1091 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_RATE18_06,  in _rtl8723be_phy_set_txpower_index()
1095 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_RATE18_06,  in _rtl8723be_phy_set_txpower_index()
1099 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_RATE18_06,  in _rtl8723be_phy_set_txpower_index()
1103 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_RATE18_06,  in _rtl8723be_phy_set_txpower_index()
1108 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_RATE54_24,  in _rtl8723be_phy_set_txpower_index()
1112 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_RATE54_24,  in _rtl8723be_phy_set_txpower_index()
1116 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_RATE54_24,  in _rtl8723be_phy_set_txpower_index()
1120 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_RATE54_24,  in _rtl8723be_phy_set_txpower_index()
1125 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_MCS03_MCS00,  in _rtl8723be_phy_set_txpower_index()
1129 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_MCS03_MCS00,  in _rtl8723be_phy_set_txpower_index()
1133 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_MCS03_MCS00,  in _rtl8723be_phy_set_txpower_index()
1137 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_MCS03_MCS00,  in _rtl8723be_phy_set_txpower_index()
1142 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_MCS07_MCS04,  in _rtl8723be_phy_set_txpower_index()
1146 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_MCS07_MCS04,  in _rtl8723be_phy_set_txpower_index()
1150 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_MCS07_MCS04,  in _rtl8723be_phy_set_txpower_index()
1154 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_MCS07_MCS04,  in _rtl8723be_phy_set_txpower_index()
1159 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_MCS11_MCS08,  in _rtl8723be_phy_set_txpower_index()
1163 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_MCS11_MCS08,  in _rtl8723be_phy_set_txpower_index()
1167 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_MCS11_MCS08,  in _rtl8723be_phy_set_txpower_index()
1171 			rtl8723_phy_set_bb_reg(hw, RTXAGC_A_MCS11_MCS08,  in _rtl8723be_phy_set_txpower_index()
1184 void rtl8723be_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)  in rtl8723be_phy_set_txpower_level()  argument
1186 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));  in rtl8723be_phy_set_txpower_level()
1205 		power_index = _rtl8723be_get_txpower_index(hw, RF90_PATH_A,  in rtl8723be_phy_set_txpower_level()
1207 					rtl_priv(hw)->phy.current_chan_bw,  in rtl8723be_phy_set_txpower_level()
1209 		_rtl8723be_phy_set_txpower_index(hw, power_index, RF90_PATH_A,  in rtl8723be_phy_set_txpower_level()
1214 		power_index = _rtl8723be_get_txpower_index(hw, RF90_PATH_A,  in rtl8723be_phy_set_txpower_level()
1216 					rtl_priv(hw)->phy.current_chan_bw,  in rtl8723be_phy_set_txpower_level()
1218 		_rtl8723be_phy_set_txpower_index(hw, power_index, RF90_PATH_A,  in rtl8723be_phy_set_txpower_level()
1223 		power_index = _rtl8723be_get_txpower_index(hw, RF90_PATH_A,  in rtl8723be_phy_set_txpower_level()
1225 					rtl_priv(hw)->phy.current_chan_bw,  in rtl8723be_phy_set_txpower_level()
1227 		_rtl8723be_phy_set_txpower_index(hw, power_index, RF90_PATH_A,  in rtl8723be_phy_set_txpower_level()
1232 void rtl8723be_phy_scan_operation_backup(struct ieee80211_hw *hw, u8 operation)  in rtl8723be_phy_scan_operation_backup()  argument
1234 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_scan_operation_backup()
1235 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));  in rtl8723be_phy_scan_operation_backup()
1242 			rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_IO_CMD,  in rtl8723be_phy_scan_operation_backup()
1248 			rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_IO_CMD,  in rtl8723be_phy_scan_operation_backup()
1259 void rtl8723be_phy_set_bw_mode_callback(struct ieee80211_hw *hw)  in rtl8723be_phy_set_bw_mode_callback()  argument
1261 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_set_bw_mode_callback()
1262 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));  in rtl8723be_phy_set_bw_mode_callback()
1264 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));  in rtl8723be_phy_set_bw_mode_callback()
1301 		rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x0);  in rtl8723be_phy_set_bw_mode_callback()
1302 		rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x0);  in rtl8723be_phy_set_bw_mode_callback()
1306 		rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x1);  in rtl8723be_phy_set_bw_mode_callback()
1307 		rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x1);  in rtl8723be_phy_set_bw_mode_callback()
1309 		rtl_set_bbreg(hw, RCCK0_SYSTEM, BCCK_SIDEBAND,  in rtl8723be_phy_set_bw_mode_callback()
1311 		rtl_set_bbreg(hw, ROFDM1_LSTF, 0xC00, mac->cur_40_prime_sc);  in rtl8723be_phy_set_bw_mode_callback()
1314 		rtl_set_bbreg(hw, 0x818, (BIT(26) | BIT(27)),  in rtl8723be_phy_set_bw_mode_callback()
1323 	rtl8723be_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);  in rtl8723be_phy_set_bw_mode_callback()
1328 void rtl8723be_phy_set_bw_mode(struct ieee80211_hw *hw,  in rtl8723be_phy_set_bw_mode()  argument
1331 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_set_bw_mode()
1333 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));  in rtl8723be_phy_set_bw_mode()
1339 	if ((!is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) {  in rtl8723be_phy_set_bw_mode()
1340 		rtl8723be_phy_set_bw_mode_callback(hw);  in rtl8723be_phy_set_bw_mode()
1349 void rtl8723be_phy_sw_chnl_callback(struct ieee80211_hw *hw)  in rtl8723be_phy_sw_chnl_callback()  argument
1351 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_sw_chnl_callback()
1352 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));  in rtl8723be_phy_sw_chnl_callback()
1363 		if (!_rtl8723be_phy_sw_chnl_step_by_step(hw,  in rtl8723be_phy_sw_chnl_callback()
1380 u8 rtl8723be_phy_sw_chnl(struct ieee80211_hw *hw)  in rtl8723be_phy_sw_chnl()  argument
1382 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_sw_chnl()
1384 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));  in rtl8723be_phy_sw_chnl()
1395 	if (!(is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) {  in rtl8723be_phy_sw_chnl()
1396 		rtl8723be_phy_sw_chnl_callback(hw);  in rtl8723be_phy_sw_chnl()
1409 static bool _rtl8723be_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,  in _rtl8723be_phy_sw_chnl_step_by_step()  argument
1413 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_sw_chnl_step_by_step()
1482 			rtl8723be_phy_set_txpower_level(hw, channel);  in _rtl8723be_phy_sw_chnl_step_by_step()
1502 				rtl_set_rfreg(hw, (enum radio_path)rfpath,  in _rtl8723be_phy_sw_chnl_step_by_step()
1522 static u8 _rtl8723be_phy_path_a_iqk(struct ieee80211_hw *hw)  in _rtl8723be_phy_path_a_iqk()  argument
1528 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_a_iqk()
1530 	rtl_set_bbreg(hw, 0x948, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_a_iqk()
1532 	rtl_set_rfreg(hw, RF90_PATH_A, RF_WE_LUT, RFREG_OFFSET_MASK, 0x800a0);  in _rtl8723be_phy_path_a_iqk()
1533 	rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK_OS, RFREG_OFFSET_MASK, 0x20000);  in _rtl8723be_phy_path_a_iqk()
1534 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G1, RFREG_OFFSET_MASK, 0x0003f);  in _rtl8723be_phy_path_a_iqk()
1535 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G2, RFREG_OFFSET_MASK, 0xc7f87);  in _rtl8723be_phy_path_a_iqk()
1540 	rtl_set_bbreg(hw, RTX_IQK, MASKDWORD, 0x01007c00);  in _rtl8723be_phy_path_a_iqk()
1541 	rtl_set_bbreg(hw, RRX_IQK, MASKDWORD, 0x01004800);  in _rtl8723be_phy_path_a_iqk()
1543 	rtl_set_bbreg(hw, RTX_IQK_TONE_A, MASKDWORD, 0x18008c1c);  in _rtl8723be_phy_path_a_iqk()
1544 	rtl_set_bbreg(hw, RRX_IQK_TONE_A, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_a_iqk()
1545 	rtl_set_bbreg(hw, RTX_IQK_TONE_B, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_a_iqk()
1546 	rtl_set_bbreg(hw, RRX_IQK_TONE_B, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_a_iqk()
1548 	rtl_set_bbreg(hw, RTX_IQK_PI_A, MASKDWORD, 0x821403ea);  in _rtl8723be_phy_path_a_iqk()
1549 	rtl_set_bbreg(hw, RRX_IQK_PI_A, MASKDWORD, 0x28160000);  in _rtl8723be_phy_path_a_iqk()
1550 	rtl_set_bbreg(hw, RTX_IQK_PI_B, MASKDWORD, 0x82110000);  in _rtl8723be_phy_path_a_iqk()
1551 	rtl_set_bbreg(hw, RRX_IQK_PI_B, MASKDWORD, 0x28110000);  in _rtl8723be_phy_path_a_iqk()
1553 	rtl_set_bbreg(hw, RIQK_AGC_RSP, MASKDWORD, 0x00462911);  in _rtl8723be_phy_path_a_iqk()
1555 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x80800000);  in _rtl8723be_phy_path_a_iqk()
1558 	rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf9000000);  in _rtl8723be_phy_path_a_iqk()
1559 	rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf8000000);  in _rtl8723be_phy_path_a_iqk()
1564 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_a_iqk()
1567 	reg_eac = rtl_get_bbreg(hw, 0xeac, MASKDWORD);  in _rtl8723be_phy_path_a_iqk()
1568 	reg_e94 = rtl_get_bbreg(hw, 0xe94, MASKDWORD);  in _rtl8723be_phy_path_a_iqk()
1569 	reg_e9c = rtl_get_bbreg(hw, 0xe9c, MASKDWORD);  in _rtl8723be_phy_path_a_iqk()
1595 static u8 _rtl8723be_phy_path_a_rx_iqk(struct ieee80211_hw *hw)  in _rtl8723be_phy_path_a_rx_iqk()  argument
1601 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_a_rx_iqk()
1604 	rtl_set_bbreg(hw, 0x948, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_a_rx_iqk()
1608 	rtl_set_rfreg(hw, RF90_PATH_A, RF_WE_LUT, 0x80000, 0x1);  in _rtl8723be_phy_path_a_rx_iqk()
1609 	rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK_OS, RFREG_OFFSET_MASK, 0x30000);  in _rtl8723be_phy_path_a_rx_iqk()
1610 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G1, RFREG_OFFSET_MASK, 0x0001f);  in _rtl8723be_phy_path_a_rx_iqk()
1612 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G2, RFREG_OFFSET_MASK, 0xf7fb7);  in _rtl8723be_phy_path_a_rx_iqk()
1613 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x80800000);  in _rtl8723be_phy_path_a_rx_iqk()
1616 	rtl_set_bbreg(hw, RTX_IQK, MASKDWORD, 0x01007c00);  in _rtl8723be_phy_path_a_rx_iqk()
1617 	rtl_set_bbreg(hw, RRX_IQK, MASKDWORD, 0x01004800);  in _rtl8723be_phy_path_a_rx_iqk()
1620 	rtl_set_bbreg(hw, RTX_IQK_TONE_A, MASKDWORD, 0x18008c1c);  in _rtl8723be_phy_path_a_rx_iqk()
1621 	rtl_set_bbreg(hw, RRX_IQK_TONE_A, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_a_rx_iqk()
1622 	rtl_set_bbreg(hw, RTX_IQK_TONE_B, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_a_rx_iqk()
1623 	rtl_set_bbreg(hw, RRX_IQK_TONE_B, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_a_rx_iqk()
1625 	rtl_set_bbreg(hw, RTX_IQK_PI_A, MASKDWORD, 0x82160ff0);  in _rtl8723be_phy_path_a_rx_iqk()
1626 	rtl_set_bbreg(hw, RRX_IQK_PI_A, MASKDWORD, 0x28110000);  in _rtl8723be_phy_path_a_rx_iqk()
1627 	rtl_set_bbreg(hw, RTX_IQK_PI_B, MASKDWORD, 0x82110000);  in _rtl8723be_phy_path_a_rx_iqk()
1628 	rtl_set_bbreg(hw, RRX_IQK_PI_B, MASKDWORD, 0x28110000);  in _rtl8723be_phy_path_a_rx_iqk()
1631 	rtl_set_bbreg(hw, RIQK_AGC_RSP, MASKDWORD, 0x0046a911);  in _rtl8723be_phy_path_a_rx_iqk()
1634 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x80800000);  in _rtl8723be_phy_path_a_rx_iqk()
1637 	rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf9000000);  in _rtl8723be_phy_path_a_rx_iqk()
1638 	rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf8000000);  in _rtl8723be_phy_path_a_rx_iqk()
1643 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_a_rx_iqk()
1646 	reg_eac = rtl_get_bbreg(hw, RRX_POWER_AFTER_IQK_A_2, MASKDWORD);  in _rtl8723be_phy_path_a_rx_iqk()
1647 	reg_e94 = rtl_get_bbreg(hw, RTX_POWER_BEFORE_IQK_A, MASKDWORD);  in _rtl8723be_phy_path_a_rx_iqk()
1648 	reg_e9c = rtl_get_bbreg(hw, RTX_POWER_AFTER_IQK_A, MASKDWORD);  in _rtl8723be_phy_path_a_rx_iqk()
1672 	rtl_set_bbreg(hw, RTX_IQK, MASKDWORD, u32tmp);  in _rtl8723be_phy_path_a_rx_iqk()
1676 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_a_rx_iqk()
1677 	rtl_set_rfreg(hw, RF90_PATH_A, RF_WE_LUT, 0x80000, 0x1);  in _rtl8723be_phy_path_a_rx_iqk()
1678 	rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK_OS, RFREG_OFFSET_MASK, 0x30000);  in _rtl8723be_phy_path_a_rx_iqk()
1679 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G1, RFREG_OFFSET_MASK, 0x0001f);  in _rtl8723be_phy_path_a_rx_iqk()
1681 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G2, RFREG_OFFSET_MASK, 0xf7d77);  in _rtl8723be_phy_path_a_rx_iqk()
1684 	rtl_set_rfreg(hw, RF90_PATH_A, 0xdf, RFREG_OFFSET_MASK, 0xf80);  in _rtl8723be_phy_path_a_rx_iqk()
1685 	rtl_set_rfreg(hw, RF90_PATH_A, 0x55, RFREG_OFFSET_MASK, 0x4021f);  in _rtl8723be_phy_path_a_rx_iqk()
1688 	rtl_set_bbreg(hw, RRX_IQK, MASKDWORD, 0x01004800);  in _rtl8723be_phy_path_a_rx_iqk()
1691 	rtl_set_bbreg(hw, RTX_IQK_TONE_A, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_a_rx_iqk()
1692 	rtl_set_bbreg(hw, RRX_IQK_TONE_A, MASKDWORD, 0x18008c1c);  in _rtl8723be_phy_path_a_rx_iqk()
1693 	rtl_set_bbreg(hw, RTX_IQK_TONE_B, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_a_rx_iqk()
1694 	rtl_set_bbreg(hw, RRX_IQK_TONE_B, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_a_rx_iqk()
1696 	rtl_set_bbreg(hw, RTX_IQK_PI_A, MASKDWORD, 0x82110000);  in _rtl8723be_phy_path_a_rx_iqk()
1697 	rtl_set_bbreg(hw, RRX_IQK_PI_A, MASKDWORD, 0x2816001f);  in _rtl8723be_phy_path_a_rx_iqk()
1698 	rtl_set_bbreg(hw, RTX_IQK_PI_B, MASKDWORD, 0x82110000);  in _rtl8723be_phy_path_a_rx_iqk()
1699 	rtl_set_bbreg(hw, RRX_IQK_PI_B, MASKDWORD, 0x28110000);  in _rtl8723be_phy_path_a_rx_iqk()
1702 	rtl_set_bbreg(hw, RIQK_AGC_RSP, MASKDWORD, 0x0046a8d1);  in _rtl8723be_phy_path_a_rx_iqk()
1705 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x80800000);  in _rtl8723be_phy_path_a_rx_iqk()
1708 	rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf9000000);  in _rtl8723be_phy_path_a_rx_iqk()
1709 	rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf8000000);  in _rtl8723be_phy_path_a_rx_iqk()
1714 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_a_rx_iqk()
1717 	reg_eac = rtl_get_bbreg(hw, RRX_POWER_AFTER_IQK_A_2, MASKDWORD);  in _rtl8723be_phy_path_a_rx_iqk()
1718 	reg_ea4 = rtl_get_bbreg(hw, RRX_POWER_BEFORE_IQK_A_2, MASKDWORD);  in _rtl8723be_phy_path_a_rx_iqk()
1721 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_a_rx_iqk()
1722 	rtl_set_rfreg(hw, RF90_PATH_A, 0xdf, RFREG_OFFSET_MASK, 0x780);  in _rtl8723be_phy_path_a_rx_iqk()
1742 static u8 _rtl8723be_phy_path_b_iqk(struct ieee80211_hw *hw)  in _rtl8723be_phy_path_b_iqk()  argument
1748 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_b_iqk()
1750 	rtl_set_bbreg(hw, 0x948, MASKDWORD, 0x00000280);  in _rtl8723be_phy_path_b_iqk()
1753 	rtl_set_rfreg(hw, RF90_PATH_A, 0xed, RFREG_OFFSET_MASK, 0x00020);  in _rtl8723be_phy_path_b_iqk()
1754 	rtl_set_rfreg(hw, RF90_PATH_A, 0x43, RFREG_OFFSET_MASK, 0x40fc1);  in _rtl8723be_phy_path_b_iqk()
1758 	rtl_set_bbreg(hw, RTX_IQK, MASKDWORD, 0x01007c00);  in _rtl8723be_phy_path_b_iqk()
1759 	rtl_set_bbreg(hw, RRX_IQK, MASKDWORD, 0x01004800);  in _rtl8723be_phy_path_b_iqk()
1761 	rtl_set_bbreg(hw, RTX_IQK_TONE_A, MASKDWORD, 0x18008c1c);  in _rtl8723be_phy_path_b_iqk()
1762 	rtl_set_bbreg(hw, RRX_IQK_TONE_A, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_b_iqk()
1763 	rtl_set_bbreg(hw, RTX_IQK_TONE_B, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_b_iqk()
1764 	rtl_set_bbreg(hw, RRX_IQK_TONE_B, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_b_iqk()
1766 	rtl_set_bbreg(hw, RTX_IQK_PI_A, MASKDWORD, 0x821403ea);  in _rtl8723be_phy_path_b_iqk()
1767 	rtl_set_bbreg(hw, RRX_IQK_PI_A, MASKDWORD, 0x28110000);  in _rtl8723be_phy_path_b_iqk()
1768 	rtl_set_bbreg(hw, RTX_IQK_PI_B, MASKDWORD, 0x82110000);  in _rtl8723be_phy_path_b_iqk()
1769 	rtl_set_bbreg(hw, RRX_IQK_PI_B, MASKDWORD, 0x28110000);  in _rtl8723be_phy_path_b_iqk()
1772 	rtl_set_bbreg(hw, RIQK_AGC_RSP, MASKDWORD, 0x00462911);  in _rtl8723be_phy_path_b_iqk()
1775 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x80800000);  in _rtl8723be_phy_path_b_iqk()
1778 	rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf9000000);  in _rtl8723be_phy_path_b_iqk()
1779 	rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf8000000);  in _rtl8723be_phy_path_b_iqk()
1784 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_b_iqk()
1787 	reg_eac = rtl_get_bbreg(hw, RRX_POWER_AFTER_IQK_A_2, MASKDWORD);  in _rtl8723be_phy_path_b_iqk()
1788 	reg_e94 = rtl_get_bbreg(hw, RTX_POWER_BEFORE_IQK_A, MASKDWORD);  in _rtl8723be_phy_path_b_iqk()
1789 	reg_e9c = rtl_get_bbreg(hw, RTX_POWER_AFTER_IQK_A, MASKDWORD);  in _rtl8723be_phy_path_b_iqk()
1815 static u8 _rtl8723be_phy_path_b_rx_iqk(struct ieee80211_hw *hw)  in _rtl8723be_phy_path_b_rx_iqk()  argument
1821 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_b_rx_iqk()
1823 	rtl_set_bbreg(hw, 0x948, MASKDWORD, 0x00000280);  in _rtl8723be_phy_path_b_rx_iqk()
1827 	rtl_set_rfreg(hw, RF90_PATH_A, RF_WE_LUT, RFREG_OFFSET_MASK, 0x800a0);  in _rtl8723be_phy_path_b_rx_iqk()
1828 	rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK_OS, RFREG_OFFSET_MASK, 0x30000);  in _rtl8723be_phy_path_b_rx_iqk()
1829 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G1, RFREG_OFFSET_MASK, 0x0001f);  in _rtl8723be_phy_path_b_rx_iqk()
1830 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G2, RFREG_OFFSET_MASK, 0xf7ff7);  in _rtl8723be_phy_path_b_rx_iqk()
1833 	rtl_set_rfreg(hw, RF90_PATH_A, 0xed, RFREG_OFFSET_MASK, 0x00020);  in _rtl8723be_phy_path_b_rx_iqk()
1834 	rtl_set_rfreg(hw, RF90_PATH_A, 0x43, RFREG_OFFSET_MASK, 0x60fed);  in _rtl8723be_phy_path_b_rx_iqk()
1837 	rtl_set_bbreg(hw, RTX_IQK, MASKDWORD, 0x01007c00);  in _rtl8723be_phy_path_b_rx_iqk()
1838 	rtl_set_bbreg(hw, RRX_IQK, MASKDWORD, 0x01004800);  in _rtl8723be_phy_path_b_rx_iqk()
1841 	rtl_set_bbreg(hw, RTX_IQK_TONE_A, MASKDWORD, 0x18008c1c);  in _rtl8723be_phy_path_b_rx_iqk()
1842 	rtl_set_bbreg(hw, RRX_IQK_TONE_A, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_b_rx_iqk()
1843 	rtl_set_bbreg(hw, RTX_IQK_TONE_B, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_b_rx_iqk()
1844 	rtl_set_bbreg(hw, RRX_IQK_TONE_B, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_b_rx_iqk()
1846 	rtl_set_bbreg(hw, RTX_IQK_PI_A, MASKDWORD, 0x82160ff0);  in _rtl8723be_phy_path_b_rx_iqk()
1847 	rtl_set_bbreg(hw, RRX_IQK_PI_A, MASKDWORD, 0x28110000);  in _rtl8723be_phy_path_b_rx_iqk()
1848 	rtl_set_bbreg(hw, RTX_IQK_PI_B, MASKDWORD, 0x82110000);  in _rtl8723be_phy_path_b_rx_iqk()
1849 	rtl_set_bbreg(hw, RRX_IQK_PI_B, MASKDWORD, 0x28110000);  in _rtl8723be_phy_path_b_rx_iqk()
1852 	rtl_set_bbreg(hw, RIQK_AGC_RSP, MASKDWORD, 0x0046a911);  in _rtl8723be_phy_path_b_rx_iqk()
1854 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x80800000);  in _rtl8723be_phy_path_b_rx_iqk()
1857 	rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf9000000);  in _rtl8723be_phy_path_b_rx_iqk()
1858 	rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf8000000);  in _rtl8723be_phy_path_b_rx_iqk()
1863 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_b_rx_iqk()
1865 	reg_eac = rtl_get_bbreg(hw, RRX_POWER_AFTER_IQK_A_2, MASKDWORD);  in _rtl8723be_phy_path_b_rx_iqk()
1866 	reg_e94 = rtl_get_bbreg(hw, RTX_POWER_BEFORE_IQK_A, MASKDWORD);  in _rtl8723be_phy_path_b_rx_iqk()
1867 	reg_e9c = rtl_get_bbreg(hw, RTX_POWER_AFTER_IQK_A, MASKDWORD);  in _rtl8723be_phy_path_b_rx_iqk()
1891 	rtl_set_bbreg(hw, RTX_IQK, MASKDWORD, u32tmp);  in _rtl8723be_phy_path_b_rx_iqk()
1896 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_b_rx_iqk()
1897 	rtl_set_rfreg(hw, RF90_PATH_A, RF_WE_LUT, 0x80000, 0x1);  in _rtl8723be_phy_path_b_rx_iqk()
1898 	rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK_OS, RFREG_OFFSET_MASK, 0x30000);  in _rtl8723be_phy_path_b_rx_iqk()
1899 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G1, RFREG_OFFSET_MASK, 0x0001f);  in _rtl8723be_phy_path_b_rx_iqk()
1900 	rtl_set_rfreg(hw, RF90_PATH_A, RF_TXPA_G2, RFREG_OFFSET_MASK, 0xf7d77);  in _rtl8723be_phy_path_b_rx_iqk()
1901 	rtl_set_rfreg(hw, RF90_PATH_A, RF_WE_LUT, 0x80000, 0x0);  in _rtl8723be_phy_path_b_rx_iqk()
1904 	rtl_set_rfreg(hw, RF90_PATH_A, 0xed, RFREG_OFFSET_MASK, 0x00020);  in _rtl8723be_phy_path_b_rx_iqk()
1905 	rtl_set_rfreg(hw, RF90_PATH_A, 0x43, RFREG_OFFSET_MASK, 0x60fbd);  in _rtl8723be_phy_path_b_rx_iqk()
1908 	rtl_set_bbreg(hw, RRX_IQK, MASKDWORD, 0x01004800);  in _rtl8723be_phy_path_b_rx_iqk()
1911 	rtl_set_bbreg(hw, RTX_IQK_TONE_A, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_b_rx_iqk()
1912 	rtl_set_bbreg(hw, RRX_IQK_TONE_A, MASKDWORD, 0x18008c1c);  in _rtl8723be_phy_path_b_rx_iqk()
1913 	rtl_set_bbreg(hw, RTX_IQK_TONE_B, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_b_rx_iqk()
1914 	rtl_set_bbreg(hw, RRX_IQK_TONE_B, MASKDWORD, 0x38008c1c);  in _rtl8723be_phy_path_b_rx_iqk()
1916 	rtl_set_bbreg(hw, RTX_IQK_PI_A, MASKDWORD, 0x82110000);  in _rtl8723be_phy_path_b_rx_iqk()
1917 	rtl_set_bbreg(hw, RRX_IQK_PI_A, MASKDWORD, 0x2816001f);  in _rtl8723be_phy_path_b_rx_iqk()
1918 	rtl_set_bbreg(hw, RTX_IQK_PI_B, MASKDWORD, 0x82110000);  in _rtl8723be_phy_path_b_rx_iqk()
1919 	rtl_set_bbreg(hw, RRX_IQK_PI_B, MASKDWORD, 0x28110000);  in _rtl8723be_phy_path_b_rx_iqk()
1922 	rtl_set_bbreg(hw, RIQK_AGC_RSP, MASKDWORD, 0x0046a8d1);  in _rtl8723be_phy_path_b_rx_iqk()
1924 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x80800000);  in _rtl8723be_phy_path_b_rx_iqk()
1927 	rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf9000000);  in _rtl8723be_phy_path_b_rx_iqk()
1928 	rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf8000000);  in _rtl8723be_phy_path_b_rx_iqk()
1933 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000);  in _rtl8723be_phy_path_b_rx_iqk()
1935 	reg_eac = rtl_get_bbreg(hw, RRX_POWER_AFTER_IQK_A_2, MASKDWORD);  in _rtl8723be_phy_path_b_rx_iqk()
1936 	reg_ea4 = rtl_get_bbreg(hw, RRX_POWER_BEFORE_IQK_A_2, MASKDWORD);  in _rtl8723be_phy_path_b_rx_iqk()
1959 static void _rtl8723be_phy_path_b_fill_iqk_matrix(struct ieee80211_hw *hw,  in _rtl8723be_phy_path_b_fill_iqk_matrix()  argument
1971 		oldval_1 = (rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE,  in _rtl8723be_phy_path_b_fill_iqk_matrix()
1977 		rtl_set_bbreg(hw, ROFDM0_XBTXIQIMBALANCE, 0x3FF, tx1_a);  in _rtl8723be_phy_path_b_fill_iqk_matrix()
1978 		rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(27),  in _rtl8723be_phy_path_b_fill_iqk_matrix()
1984 		rtl_set_bbreg(hw, ROFDM0_XDTXAFE, 0xF0000000,  in _rtl8723be_phy_path_b_fill_iqk_matrix()
1986 		rtl_set_bbreg(hw, ROFDM0_XBTXIQIMBALANCE, 0x003F0000,  in _rtl8723be_phy_path_b_fill_iqk_matrix()
1988 		rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(25),  in _rtl8723be_phy_path_b_fill_iqk_matrix()
1993 		rtl_set_bbreg(hw, ROFDM0_XBRXIQIMBALANCE, 0x3FF, reg);  in _rtl8723be_phy_path_b_fill_iqk_matrix()
1995 		rtl_set_bbreg(hw, ROFDM0_XBRXIQIMBALANCE, 0xFC00, reg);  in _rtl8723be_phy_path_b_fill_iqk_matrix()
2001 static bool _rtl8723be_phy_simularity_compare(struct ieee80211_hw *hw,  in _rtl8723be_phy_simularity_compare()  argument
2076 static void _rtl8723be_phy_iq_calibrate(struct ieee80211_hw *hw,  in _rtl8723be_phy_iq_calibrate()  argument
2079 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_iq_calibrate()
2105 	tmp_reg_c50 = rtl_get_bbreg(hw, 0xc50, MASKBYTE0);  in _rtl8723be_phy_iq_calibrate()
2106 	tmp_reg_c58 = rtl_get_bbreg(hw, 0xc58, MASKBYTE0);  in _rtl8723be_phy_iq_calibrate()
2109 		rtl8723_save_adda_registers(hw, adda_reg,  in _rtl8723be_phy_iq_calibrate()
2111 		rtl8723_phy_save_mac_registers(hw, iqk_mac_reg,  in _rtl8723be_phy_iq_calibrate()
2113 		rtl8723_save_adda_registers(hw, iqk_bb_reg,  in _rtl8723be_phy_iq_calibrate()
2117 	rtl8723_phy_path_adda_on(hw, adda_reg, true, is2t);  in _rtl8723be_phy_iq_calibrate()
2119 		rtlphy->rfpi_enable = (u8)rtl_get_bbreg(hw,  in _rtl8723be_phy_iq_calibrate()
2124 	path_sel_bb = rtl_get_bbreg(hw, 0x948, MASKDWORD);  in _rtl8723be_phy_iq_calibrate()
2126 	rtl8723_phy_mac_setting_calibration(hw, iqk_mac_reg,  in _rtl8723be_phy_iq_calibrate()
2129 	rtl_set_bbreg(hw, 0xa04, 0x0f000000, 0xf);  in _rtl8723be_phy_iq_calibrate()
2130 	rtl_set_bbreg(hw, 0xc04, MASKDWORD, 0x03a05600);  in _rtl8723be_phy_iq_calibrate()
2131 	rtl_set_bbreg(hw, 0xc08, MASKDWORD, 0x000800e4);  in _rtl8723be_phy_iq_calibrate()
2132 	rtl_set_bbreg(hw, 0x874, MASKDWORD, 0x22204000);  in _rtl8723be_phy_iq_calibrate()
2136 		patha_ok = _rtl8723be_phy_path_a_iqk(hw);  in _rtl8723be_phy_iq_calibrate()
2140 			result[t][0] = (rtl_get_bbreg(hw, 0xe94, MASKDWORD) &  in _rtl8723be_phy_iq_calibrate()
2142 			result[t][1] = (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) &  in _rtl8723be_phy_iq_calibrate()
2152 		patha_ok = _rtl8723be_phy_path_a_rx_iqk(hw);  in _rtl8723be_phy_iq_calibrate()
2156 			result[t][2] = (rtl_get_bbreg(hw, 0xea4, MASKDWORD) &  in _rtl8723be_phy_iq_calibrate()
2158 			result[t][3] = (rtl_get_bbreg(hw, 0xeac, MASKDWORD) &  in _rtl8723be_phy_iq_calibrate()
2172 			pathb_ok = _rtl8723be_phy_path_b_iqk(hw);  in _rtl8723be_phy_iq_calibrate()
2176 				result[t][4] = (rtl_get_bbreg(hw, 0xe94,  in _rtl8723be_phy_iq_calibrate()
2179 				result[t][5] = (rtl_get_bbreg(hw, 0xe9c,  in _rtl8723be_phy_iq_calibrate()
2189 			pathb_ok = _rtl8723be_phy_path_b_rx_iqk(hw);  in _rtl8723be_phy_iq_calibrate()
2193 				result[t][6] = (rtl_get_bbreg(hw, 0xea4,  in _rtl8723be_phy_iq_calibrate()
2196 				result[t][7] = (rtl_get_bbreg(hw, 0xeac,  in _rtl8723be_phy_iq_calibrate()
2207 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0);  in _rtl8723be_phy_iq_calibrate()
2210 		rtl8723_phy_reload_adda_registers(hw, adda_reg,  in _rtl8723be_phy_iq_calibrate()
2212 		rtl8723_phy_reload_mac_registers(hw, iqk_mac_reg,  in _rtl8723be_phy_iq_calibrate()
2214 		rtl8723_phy_reload_adda_registers(hw, iqk_bb_reg,  in _rtl8723be_phy_iq_calibrate()
2218 		rtl_set_bbreg(hw, 0x948, MASKDWORD, path_sel_bb);  in _rtl8723be_phy_iq_calibrate()
2221 		rtl_set_bbreg(hw, 0xc50, MASKBYTE0, 0x50);  in _rtl8723be_phy_iq_calibrate()
2222 		rtl_set_bbreg(hw, 0xc50, MASKBYTE0, tmp_reg_c50);  in _rtl8723be_phy_iq_calibrate()
2224 			rtl_set_bbreg(hw, 0xc58, MASKBYTE0, 0x50);  in _rtl8723be_phy_iq_calibrate()
2225 			rtl_set_bbreg(hw, 0xc58, MASKBYTE0, tmp_reg_c58);  in _rtl8723be_phy_iq_calibrate()
2227 		rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x01008c00);  in _rtl8723be_phy_iq_calibrate()
2228 		rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x01008c00);  in _rtl8723be_phy_iq_calibrate()
2255 static void _rtl8723be_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t)  in _rtl8723be_phy_lc_calibrate()  argument
2259 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_lc_calibrate()
2269 		rf_a_mode = rtl_get_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS);  in _rtl8723be_phy_lc_calibrate()
2272 			rf_b_mode = rtl_get_rfreg(hw, RF90_PATH_B, 0x00,  in _rtl8723be_phy_lc_calibrate()
2275 		rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS,  in _rtl8723be_phy_lc_calibrate()
2279 			rtl_set_rfreg(hw, RF90_PATH_B, 0x00, MASK12BITS,  in _rtl8723be_phy_lc_calibrate()
2282 	lc_cal = rtl_get_rfreg(hw, RF90_PATH_A, 0x18, MASK12BITS);  in _rtl8723be_phy_lc_calibrate()
2284 	rtl_set_rfreg(hw, RF90_PATH_A, 0xb0, RFREG_OFFSET_MASK, 0xdfbe0);  in _rtl8723be_phy_lc_calibrate()
2285 	rtl_set_rfreg(hw, RF90_PATH_A, 0x18, MASK12BITS, 0x8c0a);  in _rtl8723be_phy_lc_calibrate()
2292 	rtl_set_rfreg(hw, RF90_PATH_A, 0xb0, RFREG_OFFSET_MASK, 0xdffe0);  in _rtl8723be_phy_lc_calibrate()
2296 		rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS, rf_a_mode);  in _rtl8723be_phy_lc_calibrate()
2299 			rtl_set_rfreg(hw, RF90_PATH_B, 0x00,  in _rtl8723be_phy_lc_calibrate()
2308 static void _rtl8723be_phy_set_rfpath_switch(struct ieee80211_hw *hw,  in _rtl8723be_phy_set_rfpath_switch()  argument
2311 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_set_rfpath_switch()
2315 		rtl_set_bbreg(hw, 0x92C, MASKDWORD, 0x1);  in _rtl8723be_phy_set_rfpath_switch()
2317 		rtl_set_bbreg(hw, 0x92C, MASKDWORD, 0x2);  in _rtl8723be_phy_set_rfpath_switch()
2323 void rtl8723be_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery)  in rtl8723be_phy_iq_calibrate()  argument
2325 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_iq_calibrate()
2354 		rtl8723_phy_reload_adda_registers(hw, iqk_bb_reg,  in rtl8723be_phy_iq_calibrate()
2359 	path_sel_bb = rtl_get_bbreg(hw, 0x948, MASKDWORD);  in rtl8723be_phy_iq_calibrate()
2375 		_rtl8723be_phy_iq_calibrate(hw, result, i, true);  in rtl8723be_phy_iq_calibrate()
2377 			is12simular = _rtl8723be_phy_simularity_compare(hw,  in rtl8723be_phy_iq_calibrate()
2386 			is13simular = _rtl8723be_phy_simularity_compare(hw,  in rtl8723be_phy_iq_calibrate()
2393 			is23simular = _rtl8723be_phy_simularity_compare(hw,  in rtl8723be_phy_iq_calibrate()
2441 		rtl8723_phy_path_a_fill_iqk_matrix(hw, b_patha_ok, result,  in rtl8723be_phy_iq_calibrate()
2445 		_rtl8723be_phy_path_b_fill_iqk_matrix(hw, b_pathb_ok, result,  in rtl8723be_phy_iq_calibrate()
2458 	rtl8723_save_adda_registers(hw, iqk_bb_reg,  in rtl8723be_phy_iq_calibrate()
2461 	rtl_set_bbreg(hw, 0x948, MASKDWORD, path_sel_bb);  in rtl8723be_phy_iq_calibrate()
2469 void rtl8723be_phy_lc_calibrate(struct ieee80211_hw *hw)  in rtl8723be_phy_lc_calibrate()  argument
2471 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_lc_calibrate()
2486 	_rtl8723be_phy_lc_calibrate(hw, false);  in rtl8723be_phy_lc_calibrate()
2491 void rtl8723be_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain)  in rtl8723be_phy_set_rfpath_switch()  argument
2493 	_rtl8723be_phy_set_rfpath_switch(hw, bmain, true);  in rtl8723be_phy_set_rfpath_switch()
2496 bool rtl8723be_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype)  in rtl8723be_phy_set_io_cmd()  argument
2498 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_set_io_cmd()
2529 	rtl8723be_phy_set_io(hw);  in rtl8723be_phy_set_io_cmd()
2534 static void rtl8723be_phy_set_io(struct ieee80211_hw *hw)  in rtl8723be_phy_set_io()  argument
2536 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_set_io()
2547 		rtl8723be_phy_set_txpower_level(hw, rtlphy->current_channel);  in rtl8723be_phy_set_io()
2548 		rtl_set_bbreg(hw, RCCK0_CCA, 0xff0000, 0x83);  in rtl8723be_phy_set_io()
2553 		rtl_set_bbreg(hw, RCCK0_CCA, 0xff0000, 0x40);  in rtl8723be_phy_set_io()
2565 static void rtl8723be_phy_set_rf_on(struct ieee80211_hw *hw)  in rtl8723be_phy_set_rf_on()  argument
2567 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl8723be_phy_set_rf_on()
2576 static void _rtl8723be_phy_set_rf_sleep(struct ieee80211_hw *hw)  in _rtl8723be_phy_set_rf_sleep()  argument
2578 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_set_rf_sleep()
2581 	rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);  in _rtl8723be_phy_set_rf_sleep()
2586 static bool _rtl8723be_phy_set_rf_power_state(struct ieee80211_hw *hw,  in _rtl8723be_phy_set_rf_power_state()  argument
2589 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl8723be_phy_set_rf_power_state()
2590 	struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);  in _rtl8723be_phy_set_rf_power_state()
2591 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));  in _rtl8723be_phy_set_rf_power_state()
2592 	struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));  in _rtl8723be_phy_set_rf_power_state()
2607 				rtstatus = rtl_ps_enable_nic(hw);  in _rtl8723be_phy_set_rf_power_state()
2617 			rtl8723be_phy_set_rf_on(hw);  in _rtl8723be_phy_set_rf_power_state()
2620 			rtlpriv->cfg->ops->led_control(hw, LED_CTL_LINK);  in _rtl8723be_phy_set_rf_power_state()
2622 			rtlpriv->cfg->ops->led_control(hw, LED_CTL_NO_LINK);  in _rtl8723be_phy_set_rf_power_state()
2660 			rtl_ps_disable_nic(hw);  in _rtl8723be_phy_set_rf_power_state()
2664 				rtlpriv->cfg->ops->led_control(hw,  in _rtl8723be_phy_set_rf_power_state()
2667 				rtlpriv->cfg->ops->led_control(hw,  in _rtl8723be_phy_set_rf_power_state()
2705 		_rtl8723be_phy_set_rf_sleep(hw);  in _rtl8723be_phy_set_rf_power_state()
2719 bool rtl8723be_phy_set_rf_power_state(struct ieee80211_hw *hw,  in rtl8723be_phy_set_rf_power_state()  argument
2722 	struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));  in rtl8723be_phy_set_rf_power_state()
2728 	bresult = _rtl8723be_phy_set_rf_power_state(hw, rfpwr_state);  in rtl8723be_phy_set_rf_power_state()