Lines Matching refs:rtlpriv
57 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_query_bb_reg() local
60 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "regaddr(%#x), bitmask(%#x)\n", in rtl92s_phy_query_bb_reg()
63 originalvalue = rtl_read_dword(rtlpriv, regaddr); in rtl92s_phy_query_bb_reg()
67 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "BBR MASK=0x%x Addr[0x%x]=0x%x\n", in rtl92s_phy_query_bb_reg()
77 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_set_bb_reg() local
80 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, in rtl92s_phy_set_bb_reg()
85 originalvalue = rtl_read_dword(rtlpriv, regaddr); in rtl92s_phy_set_bb_reg()
90 rtl_write_dword(rtlpriv, regaddr, data); in rtl92s_phy_set_bb_reg()
92 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, in rtl92s_phy_set_bb_reg()
102 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92s_phy_rf_serial_read() local
103 struct rtl_phy *rtlphy = &(rtlpriv->phy); in _rtl92s_phy_rf_serial_read()
152 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "RFR-%d Addr[0x%x]=0x%x\n", in _rtl92s_phy_rf_serial_read()
163 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92s_phy_rf_serial_write() local
164 struct rtl_phy *rtlphy = &(rtlpriv->phy); in _rtl92s_phy_rf_serial_write()
175 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "RFW-%d Addr[0x%x]=0x%x\n", in _rtl92s_phy_rf_serial_write()
183 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_query_rf_reg() local
186 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, in rtl92s_phy_query_rf_reg()
190 spin_lock(&rtlpriv->locks.rf_lock); in rtl92s_phy_query_rf_reg()
197 spin_unlock(&rtlpriv->locks.rf_lock); in rtl92s_phy_query_rf_reg()
199 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, in rtl92s_phy_query_rf_reg()
209 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_set_rf_reg() local
210 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92s_phy_set_rf_reg()
216 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, in rtl92s_phy_set_rf_reg()
220 spin_lock(&rtlpriv->locks.rf_lock); in rtl92s_phy_set_rf_reg()
231 spin_unlock(&rtlpriv->locks.rf_lock); in rtl92s_phy_set_rf_reg()
233 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, in rtl92s_phy_set_rf_reg()
242 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_scan_operation_backup() local
254 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in rtl92s_phy_scan_operation_backup()
264 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_set_bw_mode() local
266 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92s_phy_set_bw_mode()
270 RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "Switch to %s bandwidth\n", in rtl92s_phy_set_bw_mode()
281 reg_bw_opmode = rtl_read_byte(rtlpriv, BW_OPMODE); in rtl92s_phy_set_bw_mode()
283 rtl_read_byte(rtlpriv, RRSR + 2); in rtl92s_phy_set_bw_mode()
288 rtl_write_byte(rtlpriv, BW_OPMODE, reg_bw_opmode); in rtl92s_phy_set_bw_mode()
292 rtl_write_byte(rtlpriv, BW_OPMODE, reg_bw_opmode); in rtl92s_phy_set_bw_mode()
295 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in rtl92s_phy_set_bw_mode()
306 rtl_write_byte(rtlpriv, RFPGA0_ANALOGPARAMETER2, 0x58); in rtl92s_phy_set_bw_mode()
317 rtl_write_byte(rtlpriv, RFPGA0_ANALOGPARAMETER2, 0x18); in rtl92s_phy_set_bw_mode()
320 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in rtl92s_phy_set_bw_mode()
327 RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "<==\n"); in rtl92s_phy_set_bw_mode()
356 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92s_phy_sw_chnl_step_by_step() local
357 struct rtl_phy *rtlphy = &(rtlpriv->phy); in _rtl92s_phy_sw_chnl_step_by_step()
421 rtl_write_dword(rtlpriv, currentcmd->para1, in _rtl92s_phy_sw_chnl_step_by_step()
425 rtl_write_word(rtlpriv, currentcmd->para1, in _rtl92s_phy_sw_chnl_step_by_step()
429 rtl_write_byte(rtlpriv, currentcmd->para1, in _rtl92s_phy_sw_chnl_step_by_step()
444 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in _rtl92s_phy_sw_chnl_step_by_step()
459 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_sw_chnl() local
461 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92s_phy_sw_chnl()
465 RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "switch to channel%d\n", in rtl92s_phy_sw_chnl()
502 RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "<==\n"); in rtl92s_phy_sw_chnl()
509 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92se_phy_set_rf_sleep() local
512 u1btmp = rtl_read_byte(rtlpriv, LDOV12D_CTRL); in _rtl92se_phy_set_rf_sleep()
515 rtl_write_byte(rtlpriv, LDOV12D_CTRL, u1btmp); in _rtl92se_phy_set_rf_sleep()
516 rtl_write_byte(rtlpriv, SPS1_CTRL, 0x0); in _rtl92se_phy_set_rf_sleep()
517 rtl_write_byte(rtlpriv, TXPAUSE, 0xFF); in _rtl92se_phy_set_rf_sleep()
518 rtl_write_word(rtlpriv, CMDR, 0x57FC); in _rtl92se_phy_set_rf_sleep()
521 rtl_write_word(rtlpriv, CMDR, 0x77FC); in _rtl92se_phy_set_rf_sleep()
522 rtl_write_byte(rtlpriv, PHY_CCA, 0x0); in _rtl92se_phy_set_rf_sleep()
525 rtl_write_word(rtlpriv, CMDR, 0x37FC); in _rtl92se_phy_set_rf_sleep()
528 rtl_write_word(rtlpriv, CMDR, 0x77FC); in _rtl92se_phy_set_rf_sleep()
531 rtl_write_word(rtlpriv, CMDR, 0x57FC); in _rtl92se_phy_set_rf_sleep()
541 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_set_rf_power_state() local
561 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, in rtl92s_phy_set_rf_power_state()
569 RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG, in rtl92s_phy_set_rf_power_state()
574 rtlpriv->psc.state_inap); in rtl92s_phy_set_rf_power_state()
576 rtl_write_word(rtlpriv, CMDR, 0x37FC); in rtl92s_phy_set_rf_power_state()
577 rtl_write_byte(rtlpriv, TXPAUSE, 0x00); in rtl92s_phy_set_rf_power_state()
578 rtl_write_byte(rtlpriv, PHY_CCA, 0x3); in rtl92s_phy_set_rf_power_state()
582 rtlpriv->cfg->ops->led_control(hw, in rtl92s_phy_set_rf_power_state()
585 rtlpriv->cfg->ops->led_control(hw, in rtl92s_phy_set_rf_power_state()
591 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, in rtl92s_phy_set_rf_power_state()
597 rtlpriv->cfg->ops->led_control(hw, in rtl92s_phy_set_rf_power_state()
600 rtlpriv->cfg->ops->led_control(hw, in rtl92s_phy_set_rf_power_state()
617 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, in rtl92s_phy_set_rf_power_state()
627 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, in rtl92s_phy_set_rf_power_state()
636 RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG, in rtl92s_phy_set_rf_power_state()
641 RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG, in rtl92s_phy_set_rf_power_state()
645 rtlpriv->psc.state_inap); in rtl92s_phy_set_rf_power_state()
650 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in rtl92s_phy_set_rf_power_state()
681 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92s_store_pwrindex_diffrate_offset() local
682 struct rtl_phy *rtlphy = &(rtlpriv->phy); in _rtl92s_store_pwrindex_diffrate_offset()
709 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92s_phy_init_register_definition() local
710 struct rtl_phy *rtlphy = &(rtlpriv->phy); in _rtl92s_phy_init_register_definition()
863 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92s_phy_set_bb_to_diff_rf() local
864 struct rtl_phy *rtlphy = &(rtlpriv->phy); in _rtl92s_phy_set_bb_to_diff_rf()
921 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92s_phy_bb_config_parafile() local
922 struct rtl_phy *rtlphy = &(rtlpriv->phy); in _rtl92s_phy_bb_config_parafile()
943 RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, in _rtl92s_phy_bb_config_parafile()
957 RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, in _rtl92s_phy_bb_config_parafile()
981 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_config_rf() local
982 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92s_phy_config_rf()
1001 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Radio No %x\n", rfpath); in rtl92s_phy_config_rf()
1037 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_mac_config() local
1046 rtl_write_byte(rtlpriv, ptraArray[i], (u8)ptraArray[i + 1]); in rtl92s_phy_mac_config()
1054 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_bb_config() local
1055 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92s_phy_bb_config()
1083 RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, in rtl92s_phy_bb_config()
1086 RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, in rtl92s_phy_bb_config()
1096 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_rf_config() local
1097 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92s_phy_rf_config()
1111 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_get_hw_reg_originalvalue() local
1112 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92s_phy_get_hw_reg_originalvalue()
1123 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in rtl92s_phy_get_hw_reg_originalvalue()
1134 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in rtl92s_phy_get_hw_reg_originalvalue()
1143 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92s_phy_get_txpower_index() local
1144 struct rtl_phy *rtlphy = &(rtlpriv->phy); in _rtl92s_phy_get_txpower_index()
1172 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92s_phy_ccxpower_indexcheck() local
1173 struct rtl_phy *rtlphy = &(rtlpriv->phy); in _rtl92s_phy_ccxpower_indexcheck()
1181 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_set_txpower() local
1198 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, in rtl92s_phy_set_txpower()
1213 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_chk_fwcmd_iodone() local
1221 tmpvalue = rtl_read_dword(rtlpriv, WFM5); in rtl92s_phy_chk_fwcmd_iodone()
1227 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Set FW Cmd fail!!\n"); in rtl92s_phy_chk_fwcmd_iodone()
1233 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92s_phy_set_fwcmd_io() local
1235 struct rtl_phy *rtlphy = &(rtlpriv->phy); in _rtl92s_phy_set_fwcmd_io()
1241 if (hal_get_firmwareversion(rtlpriv) < 0x34) in _rtl92s_phy_set_fwcmd_io()
1259 RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, "FW_CMD_RA_RESET\n"); in _rtl92s_phy_set_fwcmd_io()
1260 rtl_write_dword(rtlpriv, WFM5, FW_RA_RESET); in _rtl92s_phy_set_fwcmd_io()
1264 RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, "FW_CMD_RA_ACTIVE\n"); in _rtl92s_phy_set_fwcmd_io()
1265 rtl_write_dword(rtlpriv, WFM5, FW_RA_ACTIVE); in _rtl92s_phy_set_fwcmd_io()
1269 RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, "FW_CMD_RA_REFRESH_N\n"); in _rtl92s_phy_set_fwcmd_io()
1271 rtl_write_dword(rtlpriv, WFM5, input); in _rtl92s_phy_set_fwcmd_io()
1273 rtl_write_dword(rtlpriv, WFM5, FW_RA_ENABLE_RSSI_MASK); in _rtl92s_phy_set_fwcmd_io()
1277 RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, in _rtl92s_phy_set_fwcmd_io()
1279 rtl_write_dword(rtlpriv, WFM5, FW_RA_REFRESH); in _rtl92s_phy_set_fwcmd_io()
1281 rtl_write_dword(rtlpriv, WFM5, FW_RA_DISABLE_RSSI_MASK); in _rtl92s_phy_set_fwcmd_io()
1285 RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, in _rtl92s_phy_set_fwcmd_io()
1288 rtl_write_dword(rtlpriv, WFM5, input); in _rtl92s_phy_set_fwcmd_io()
1292 RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, in _rtl92s_phy_set_fwcmd_io()
1295 rtl_write_dword(rtlpriv, WFM5, input); in _rtl92s_phy_set_fwcmd_io()
1299 RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, "FW_CMD_IQK_ENABLE\n"); in _rtl92s_phy_set_fwcmd_io()
1300 rtl_write_dword(rtlpriv, WFM5, FW_IQK_ENABLE); in _rtl92s_phy_set_fwcmd_io()
1316 if (rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) in _rtl92s_phy_set_fwcmd_io()
1326 if ((rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) || in _rtl92s_phy_set_fwcmd_io()
1327 rtlpriv->dm.dynamic_txpower_enable) in _rtl92s_phy_set_fwcmd_io()
1334 RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, "FW_CMD_LPS_ENTER\n"); in _rtl92s_phy_set_fwcmd_io()
1335 current_aid = rtlpriv->mac80211.assoc_id; in _rtl92s_phy_set_fwcmd_io()
1336 rtl_write_dword(rtlpriv, WFM5, (FW_LPS_ENTER | in _rtl92s_phy_set_fwcmd_io()
1343 RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, "FW_CMD_LPS_LEAVE\n"); in _rtl92s_phy_set_fwcmd_io()
1344 rtl_write_dword(rtlpriv, WFM5, FW_LPS_LEAVE); in _rtl92s_phy_set_fwcmd_io()
1348 RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, "FW_CMD_ADD_A2_ENTRY\n"); in _rtl92s_phy_set_fwcmd_io()
1349 rtl_write_dword(rtlpriv, WFM5, FW_ADD_A2_ENTRY); in _rtl92s_phy_set_fwcmd_io()
1353 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, in _rtl92s_phy_set_fwcmd_io()
1355 rtl_write_dword(rtlpriv, WFM5, FW_CTRL_DM_BY_DRIVER); in _rtl92s_phy_set_fwcmd_io()
1371 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_set_fw_cmd() local
1372 struct dig_t *digtable = &rtlpriv->dm_digtable; in rtl92s_phy_set_fw_cmd()
1375 u32 fw_param = FW_CMD_IO_PARA_QUERY(rtlpriv); in rtl92s_phy_set_fw_cmd()
1376 u16 fw_cmdmap = FW_CMD_IO_QUERY(rtlpriv); in rtl92s_phy_set_fw_cmd()
1379 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, in rtl92s_phy_set_fw_cmd()
1386 if (hal_get_firmwareversion(rtlpriv) >= 0x35) { in rtl92s_phy_set_fw_cmd()
1408 if (hal_get_firmwareversion(rtlpriv) >= 0x3E) { in rtl92s_phy_set_fw_cmd()
1418 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "RA init!!\n"); in rtl92s_phy_set_fw_cmd()
1420 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1422 FW_CMD_IO_CLR(rtlpriv, FW_RA_INIT_CTL); in rtl92s_phy_set_fw_cmd()
1425 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, in rtl92s_phy_set_fw_cmd()
1428 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1432 if (!(rtlpriv->dm.dm_flag & HAL_DM_DIG_DISABLE)) { in rtl92s_phy_set_fw_cmd()
1433 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, in rtl92s_phy_set_fw_cmd()
1436 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1440 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, in rtl92s_phy_set_fw_cmd()
1443 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1452 thermalval = rtlpriv->dm.thermalvalue; in rtl92s_phy_set_fw_cmd()
1456 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, in rtl92s_phy_set_fw_cmd()
1460 FW_CMD_PARA_SET(rtlpriv, fw_param); in rtl92s_phy_set_fw_cmd()
1461 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1464 FW_CMD_IO_CLR(rtlpriv, FW_PWR_TRK_CTL); in rtl92s_phy_set_fw_cmd()
1478 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, in rtl92s_phy_set_fw_cmd()
1482 FW_CMD_PARA_SET(rtlpriv, fw_param); in rtl92s_phy_set_fw_cmd()
1483 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1486 FW_CMD_IO_CLR(rtlpriv, FW_RA_N_CTL); in rtl92s_phy_set_fw_cmd()
1496 FW_CMD_PARA_SET(rtlpriv, fw_param); in rtl92s_phy_set_fw_cmd()
1497 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1500 FW_CMD_IO_CLR(rtlpriv, FW_RA_BG_CTL); in rtl92s_phy_set_fw_cmd()
1504 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1506 FW_CMD_IO_CLR(rtlpriv, FW_IQK_CTL); in rtl92s_phy_set_fw_cmd()
1511 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1519 if (rtlpriv->dm.dm_flag & HAL_DM_DIG_DISABLE || in rtl92s_phy_set_fw_cmd()
1523 if ((rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) || in rtl92s_phy_set_fw_cmd()
1524 rtlpriv->dm.dynamic_txpower_enable) in rtl92s_phy_set_fw_cmd()
1533 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1540 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1545 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1549 if (!(rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) && in rtl92s_phy_set_fw_cmd()
1550 !rtlpriv->dm.dynamic_txpower_enable) { in rtl92s_phy_set_fw_cmd()
1553 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1559 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1563 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1566 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, in rtl92s_phy_set_fw_cmd()
1570 FW_CMD_IO_SET(rtlpriv, fw_cmdmap); in rtl92s_phy_set_fw_cmd()
1597 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92s_phy_check_ephy_switchready() local
1601 regu1 = rtl_read_byte(rtlpriv, 0x554); in _rtl92s_phy_check_ephy_switchready()
1603 regu1 = rtl_read_byte(rtlpriv, 0x554); in _rtl92s_phy_check_ephy_switchready()
1613 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_switch_ephy_parameter() local
1620 rtl_write_dword(rtlpriv, 0x540, 0x73c11); in rtl92s_phy_switch_ephy_parameter()
1621 rtl_write_dword(rtlpriv, 0x548, 0x2407c); in rtl92s_phy_switch_ephy_parameter()
1624 rtl_write_word(rtlpriv, 0x550, 0x1000); in rtl92s_phy_switch_ephy_parameter()
1625 rtl_write_byte(rtlpriv, 0x554, 0x20); in rtl92s_phy_switch_ephy_parameter()
1628 rtl_write_word(rtlpriv, 0x550, 0xa0eb); in rtl92s_phy_switch_ephy_parameter()
1629 rtl_write_byte(rtlpriv, 0x554, 0x3e); in rtl92s_phy_switch_ephy_parameter()
1632 rtl_write_word(rtlpriv, 0x550, 0xff80); in rtl92s_phy_switch_ephy_parameter()
1633 rtl_write_byte(rtlpriv, 0x554, 0x39); in rtl92s_phy_switch_ephy_parameter()
1638 rtl_write_byte(rtlpriv, 0x560, 0x40); in rtl92s_phy_switch_ephy_parameter()
1640 rtl_write_byte(rtlpriv, 0x560, 0x00); in rtl92s_phy_switch_ephy_parameter()
1646 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92s_phy_set_beacon_hwreg() local
1649 if (hal_get_firmwareversion(rtlpriv) >= 0x33) { in rtl92s_phy_set_beacon_hwreg()
1651 rtl_write_dword(rtlpriv, WFM5, 0xF1000000 | in rtl92s_phy_set_beacon_hwreg()
1655 rtl_write_dword(rtlpriv, WFM3 + 4, new_bcn_num); in rtl92s_phy_set_beacon_hwreg()
1656 rtl_write_dword(rtlpriv, WFM3, 0xB026007C); in rtl92s_phy_set_beacon_hwreg()