55 u32 rtl92s_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask)  in rtl92s_phy_query_bb_reg()  argument
57 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_query_bb_reg()
74 void rtl92s_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask,  in rtl92s_phy_set_bb_reg()  argument
77 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_set_bb_reg()
98 static u32 _rtl92s_phy_rf_serial_read(struct ieee80211_hw *hw,  in _rtl92s_phy_rf_serial_read()  argument
102 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92s_phy_rf_serial_read()
113 	tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD);  in _rtl92s_phy_rf_serial_read()
118 		tmplong2 = rtl_get_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD);  in _rtl92s_phy_rf_serial_read()
123 	rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD,  in _rtl92s_phy_rf_serial_read()
128 	rtl_set_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD, tmplong2);  in _rtl92s_phy_rf_serial_read()
131 	rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD, tmplong |  in _rtl92s_phy_rf_serial_read()
136 		rfpi_enable = (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER1,  in _rtl92s_phy_rf_serial_read()
139 		rfpi_enable = (u8)rtl_get_bbreg(hw, RFPGA0_XB_HSSIPARAMETER1,  in _rtl92s_phy_rf_serial_read()
143 		retvalue = rtl_get_bbreg(hw, pphyreg->rf_rbpi,  in _rtl92s_phy_rf_serial_read()
146 		retvalue = rtl_get_bbreg(hw, pphyreg->rf_rb,  in _rtl92s_phy_rf_serial_read()
149 	retvalue = rtl_get_bbreg(hw, pphyreg->rf_rb,  in _rtl92s_phy_rf_serial_read()
159 static void _rtl92s_phy_rf_serial_write(struct ieee80211_hw *hw,  in _rtl92s_phy_rf_serial_write()  argument
163 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92s_phy_rf_serial_write()
173 	rtl_set_bbreg(hw, pphyreg->rf3wire_offset, MASKDWORD, data_and_addr);  in _rtl92s_phy_rf_serial_write()
180 u32 rtl92s_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,  in rtl92s_phy_query_rf_reg()  argument
183 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_query_rf_reg()
192 	original_value = _rtl92s_phy_rf_serial_read(hw, rfpath, regaddr);  in rtl92s_phy_query_rf_reg()
206 void rtl92s_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,  in rtl92s_phy_set_rf_reg()  argument
209 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_set_rf_reg()
223 		original_value = _rtl92s_phy_rf_serial_read(hw, rfpath,  in rtl92s_phy_set_rf_reg()
229 	_rtl92s_phy_rf_serial_write(hw, rfpath, regaddr, data);  in rtl92s_phy_set_rf_reg()
239 void rtl92s_phy_scan_operation_backup(struct ieee80211_hw *hw,  in rtl92s_phy_scan_operation_backup()  argument
242 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_scan_operation_backup()
243 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));  in rtl92s_phy_scan_operation_backup()
248 			rtl92s_phy_set_fw_cmd(hw, FW_CMD_PAUSE_DM_BY_SCAN);  in rtl92s_phy_scan_operation_backup()
251 			rtl92s_phy_set_fw_cmd(hw, FW_CMD_RESUME_DM_BY_SCAN);  in rtl92s_phy_scan_operation_backup()
261 void rtl92s_phy_set_bw_mode(struct ieee80211_hw *hw,  in rtl92s_phy_set_bw_mode()  argument
264 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_set_bw_mode()
265 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));  in rtl92s_phy_set_bw_mode()
267 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));  in rtl92s_phy_set_bw_mode()
302 		rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x0);  in rtl92s_phy_set_bw_mode()
303 		rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x0);  in rtl92s_phy_set_bw_mode()
309 		rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x1);  in rtl92s_phy_set_bw_mode()
310 		rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x1);  in rtl92s_phy_set_bw_mode()
312 		rtl_set_bbreg(hw, RCCK0_SYSTEM, BCCK_SIDEBAND,  in rtl92s_phy_set_bw_mode()
314 		rtl_set_bbreg(hw, ROFDM1_LSTF, 0xC00, mac->cur_40_prime_sc);  in rtl92s_phy_set_bw_mode()
325 	rtl92s_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);  in rtl92s_phy_set_bw_mode()
353 static bool _rtl92s_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,  in _rtl92s_phy_sw_chnl_step_by_step()  argument
356 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92s_phy_sw_chnl_step_by_step()
418 			rtl92s_phy_set_txpower(hw, channel);  in _rtl92s_phy_sw_chnl_step_by_step()
437 				rtl_set_rfreg(hw, (enum radio_path)rfpath,  in _rtl92s_phy_sw_chnl_step_by_step()
457 u8 rtl92s_phy_sw_chnl(struct ieee80211_hw *hw)  in rtl92s_phy_sw_chnl()  argument
459 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_sw_chnl()
460 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));  in rtl92s_phy_sw_chnl()
485 		ret = _rtl92s_phy_sw_chnl_step_by_step(hw,  in rtl92s_phy_sw_chnl()
507 static void _rtl92se_phy_set_rf_sleep(struct ieee80211_hw *hw)  in _rtl92se_phy_set_rf_sleep()  argument
509 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92se_phy_set_rf_sleep()
535 	rtl8192se_gpiobit3_cfg_inputmode(hw);  in _rtl92se_phy_set_rf_sleep()
538 bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,  in rtl92s_phy_set_rf_power_state()  argument
541 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_set_rf_power_state()
542 	struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);  in rtl92s_phy_set_rf_power_state()
543 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));  in rtl92s_phy_set_rf_power_state()
544 	struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));  in rtl92s_phy_set_rf_power_state()
563 					rtstatus = rtl_ps_enable_nic(hw);  in rtl92s_phy_set_rf_power_state()
582 				rtlpriv->cfg->ops->led_control(hw,  in rtl92s_phy_set_rf_power_state()
585 				rtlpriv->cfg->ops->led_control(hw,  in rtl92s_phy_set_rf_power_state()
593 				rtl_ps_disable_nic(hw);  in rtl92s_phy_set_rf_power_state()
597 					rtlpriv->cfg->ops->led_control(hw,  in rtl92s_phy_set_rf_power_state()
600 					rtlpriv->cfg->ops->led_control(hw,  in rtl92s_phy_set_rf_power_state()
647 			_rtl92se_phy_set_rf_sleep(hw);  in rtl92s_phy_set_rf_power_state()
662 static bool _rtl92s_phy_config_rfpa_bias_current(struct ieee80211_hw *hw,  in _rtl92s_phy_config_rfpa_bias_current()  argument
665 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));  in _rtl92s_phy_config_rfpa_bias_current()
671 		tmpval = rtl92s_phy_query_rf_reg(hw, rfpath, RF_IPA, 0xf);  in _rtl92s_phy_config_rfpa_bias_current()
672 		rtl92s_phy_set_rf_reg(hw, rfpath, RF_IPA, 0xf, tmpval + 1);  in _rtl92s_phy_config_rfpa_bias_current()
678 static void _rtl92s_store_pwrindex_diffrate_offset(struct ieee80211_hw *hw,  in _rtl92s_store_pwrindex_diffrate_offset()  argument
681 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92s_store_pwrindex_diffrate_offset()
707 static void _rtl92s_phy_init_register_definition(struct ieee80211_hw *hw)  in _rtl92s_phy_init_register_definition()  argument
709 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92s_phy_init_register_definition()
824 static bool _rtl92s_phy_config_bb(struct ieee80211_hw *hw, u8 configtype)  in _rtl92s_phy_config_bb()  argument
844 			rtl92s_phy_set_bb_reg(hw, phy_reg_table[i], MASKDWORD,  in _rtl92s_phy_config_bb()
849 			rtl92s_phy_set_bb_reg(hw, agc_table[i], MASKDWORD,  in _rtl92s_phy_config_bb()
860 static bool _rtl92s_phy_set_bb_to_diff_rf(struct ieee80211_hw *hw,  in _rtl92s_phy_set_bb_to_diff_rf()  argument
863 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92s_phy_set_bb_to_diff_rf()
883 			rtl92s_phy_set_bb_reg(hw, phy_regarray2xtxr_table[i],  in _rtl92s_phy_set_bb_to_diff_rf()
892 static bool _rtl92s_phy_config_bb_with_pg(struct ieee80211_hw *hw,  in _rtl92s_phy_config_bb_with_pg()  argument
906 			_rtl92s_store_pwrindex_diffrate_offset(hw,  in _rtl92s_phy_config_bb_with_pg()
910 			rtl92s_phy_set_bb_reg(hw, phy_table_pg[i],  in _rtl92s_phy_config_bb_with_pg()
919 static bool _rtl92s_phy_bb_config_parafile(struct ieee80211_hw *hw)  in _rtl92s_phy_bb_config_parafile()  argument
921 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92s_phy_bb_config_parafile()
923 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));  in _rtl92s_phy_bb_config_parafile()
930 		rtstatus = _rtl92s_phy_config_bb(hw, BASEBAND_CONFIG_PHY_REG);  in _rtl92s_phy_bb_config_parafile()
936 			rtstatus = _rtl92s_phy_set_bb_to_diff_rf(hw,  in _rtl92s_phy_bb_config_parafile()
953 		rtstatus = _rtl92s_phy_config_bb_with_pg(hw,  in _rtl92s_phy_bb_config_parafile()
963 	rtstatus = _rtl92s_phy_config_bb(hw, BASEBAND_CONFIG_AGC_TAB);  in _rtl92s_phy_bb_config_parafile()
972 	rtlphy->cck_high_power = (bool)(rtl92s_phy_query_bb_reg(hw,  in _rtl92s_phy_bb_config_parafile()
979 u8 rtl92s_phy_config_rf(struct ieee80211_hw *hw, enum radio_path rfpath)  in rtl92s_phy_config_rf()  argument
981 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_config_rf()
1007 			rtl_rfreg_delay(hw, rfpath, radio_a_table[i],  in rtl92s_phy_config_rf()
1013 		_rtl92s_phy_config_rfpa_bias_current(hw, rfpath);  in rtl92s_phy_config_rf()
1017 			rtl_rfreg_delay(hw, rfpath, radio_b_table[i],  in rtl92s_phy_config_rf()
1035 bool rtl92s_phy_mac_config(struct ieee80211_hw *hw)  in rtl92s_phy_mac_config()  argument
1037 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_mac_config()
1052 bool rtl92s_phy_bb_config(struct ieee80211_hw *hw)  in rtl92s_phy_bb_config()  argument
1054 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_bb_config()
1060 	_rtl92s_phy_init_register_definition(hw);  in rtl92s_phy_bb_config()
1063 	rtstatus = _rtl92s_phy_bb_config_parafile(hw);  in rtl92s_phy_bb_config()
1068 	path1 = (u8)(rtl92s_phy_query_bb_reg(hw, RFPGA0_TXINFO, 0xf));  in rtl92s_phy_bb_config()
1070 	path2 = (u8)(rtl92s_phy_query_bb_reg(hw, ROFDM0_TRXPATHENABLE, 0xf));  in rtl92s_phy_bb_config()
1094 bool rtl92s_phy_rf_config(struct ieee80211_hw *hw)  in rtl92s_phy_rf_config()  argument
1096 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_rf_config()
1106 	return rtl92s_phy_rf6052_config(hw);  in rtl92s_phy_rf_config()
1109 void rtl92s_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw)  in rtl92s_phy_get_hw_reg_originalvalue()  argument
1111 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_get_hw_reg_originalvalue()
1115 	rtlphy->default_initialgain[0] = rtl_get_bbreg(hw,  in rtl92s_phy_get_hw_reg_originalvalue()
1117 	rtlphy->default_initialgain[1] = rtl_get_bbreg(hw,  in rtl92s_phy_get_hw_reg_originalvalue()
1119 	rtlphy->default_initialgain[2] = rtl_get_bbreg(hw,  in rtl92s_phy_get_hw_reg_originalvalue()
1121 	rtlphy->default_initialgain[3] = rtl_get_bbreg(hw,  in rtl92s_phy_get_hw_reg_originalvalue()
1131 	rtlphy->framesync = rtl_get_bbreg(hw, ROFDM0_RXDETECTOR3, MASKBYTE0);  in rtl92s_phy_get_hw_reg_originalvalue()
1132 	rtlphy->framesync_c34 = rtl_get_bbreg(hw, ROFDM0_RXDETECTOR2,  in rtl92s_phy_get_hw_reg_originalvalue()
1140 static void _rtl92s_phy_get_txpower_index(struct ieee80211_hw *hw, u8 channel,  in _rtl92s_phy_get_txpower_index()  argument
1143 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92s_phy_get_txpower_index()
1145 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));  in _rtl92s_phy_get_txpower_index()
1169 static void _rtl92s_phy_ccxpower_indexcheck(struct ieee80211_hw *hw,  in _rtl92s_phy_ccxpower_indexcheck()  argument
1172 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92s_phy_ccxpower_indexcheck()
1179 void rtl92s_phy_set_txpower(struct ieee80211_hw *hw, u8	channel)  in rtl92s_phy_set_txpower()  argument
1181 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_set_txpower()
1182 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));  in rtl92s_phy_set_txpower()
1195 	_rtl92s_phy_get_txpower_index(hw, channel, &cckpowerlevel[0],  in rtl92s_phy_set_txpower()
1203 	_rtl92s_phy_ccxpower_indexcheck(hw, channel, &cckpowerlevel[0],  in rtl92s_phy_set_txpower()
1206 	rtl92s_phy_rf6052_set_ccktxpower(hw, cckpowerlevel[0]);  in rtl92s_phy_set_txpower()
1207 	rtl92s_phy_rf6052_set_ofdmtxpower(hw, &ofdmpowerLevel[0], channel);  in rtl92s_phy_set_txpower()
1211 void rtl92s_phy_chk_fwcmd_iodone(struct ieee80211_hw *hw)  in rtl92s_phy_chk_fwcmd_iodone()  argument
1213 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_chk_fwcmd_iodone()
1231 static void _rtl92s_phy_set_fwcmd_io(struct ieee80211_hw *hw)  in _rtl92s_phy_set_fwcmd_io()  argument
1233 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92s_phy_set_fwcmd_io()
1234 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));  in _rtl92s_phy_set_fwcmd_io()
1261 		rtl92s_phy_chk_fwcmd_iodone(hw);  in _rtl92s_phy_set_fwcmd_io()
1266 		rtl92s_phy_chk_fwcmd_iodone(hw);  in _rtl92s_phy_set_fwcmd_io()
1272 		rtl92s_phy_chk_fwcmd_iodone(hw);  in _rtl92s_phy_set_fwcmd_io()
1274 		rtl92s_phy_chk_fwcmd_iodone(hw);  in _rtl92s_phy_set_fwcmd_io()
1280 		rtl92s_phy_chk_fwcmd_iodone(hw);  in _rtl92s_phy_set_fwcmd_io()
1282 		rtl92s_phy_chk_fwcmd_iodone(hw);  in _rtl92s_phy_set_fwcmd_io()
1289 		rtl92s_phy_chk_fwcmd_iodone(hw);  in _rtl92s_phy_set_fwcmd_io()
1296 		rtl92s_phy_chk_fwcmd_iodone(hw);  in _rtl92s_phy_set_fwcmd_io()
1301 		rtl92s_phy_chk_fwcmd_iodone(hw);  in _rtl92s_phy_set_fwcmd_io()
1305 		rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, MASKBYTE0, 0x17);  in _rtl92s_phy_set_fwcmd_io()
1306 		rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, MASKBYTE0, 0x17);  in _rtl92s_phy_set_fwcmd_io()
1308 		rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0x40);  in _rtl92s_phy_set_fwcmd_io()
1312 		rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);  in _rtl92s_phy_set_fwcmd_io()
1313 		rtl92s_phy_set_txpower(hw, rtlphy->current_channel);  in _rtl92s_phy_set_fwcmd_io()
1320 		rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, MASKBYTE0, 0x17);  in _rtl92s_phy_set_fwcmd_io()
1321 		rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, MASKBYTE0, 0x17);  in _rtl92s_phy_set_fwcmd_io()
1323 		rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0x40);  in _rtl92s_phy_set_fwcmd_io()
1331 		rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);  in _rtl92s_phy_set_fwcmd_io()
1338 		rtl92s_phy_chk_fwcmd_iodone(hw);  in _rtl92s_phy_set_fwcmd_io()
1345 		rtl92s_phy_chk_fwcmd_iodone(hw);  in _rtl92s_phy_set_fwcmd_io()
1350 		rtl92s_phy_chk_fwcmd_iodone(hw);  in _rtl92s_phy_set_fwcmd_io()
1356 		rtl92s_phy_chk_fwcmd_iodone(hw);  in _rtl92s_phy_set_fwcmd_io()
1363 	rtl92s_phy_chk_fwcmd_iodone(hw);  in _rtl92s_phy_set_fwcmd_io()
1369 bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fw_cmdio)  in rtl92s_phy_set_fw_cmd()  argument
1371 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_set_fw_cmd()
1373 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));  in rtl92s_phy_set_fw_cmd()
1374 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));  in rtl92s_phy_set_fw_cmd()
1591 	_rtl92s_phy_set_fwcmd_io(hw);  in rtl92s_phy_set_fw_cmd()
1595 static	void _rtl92s_phy_check_ephy_switchready(struct ieee80211_hw *hw)  in _rtl92s_phy_check_ephy_switchready()  argument
1597 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92s_phy_check_ephy_switchready()
1611 void rtl92s_phy_switch_ephy_parameter(struct ieee80211_hw *hw)  in rtl92s_phy_switch_ephy_parameter()  argument
1613 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_switch_ephy_parameter()
1614 	struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));  in rtl92s_phy_switch_ephy_parameter()
1626 	_rtl92s_phy_check_ephy_switchready(hw);  in rtl92s_phy_switch_ephy_parameter()
1630 	_rtl92s_phy_check_ephy_switchready(hw);  in rtl92s_phy_switch_ephy_parameter()
1634 	_rtl92s_phy_check_ephy_switchready(hw);  in rtl92s_phy_switch_ephy_parameter()
1644 void rtl92s_phy_set_beacon_hwreg(struct ieee80211_hw *hw, u16 beaconinterval)  in rtl92s_phy_set_beacon_hwreg()  argument
1646 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92s_phy_set_beacon_hwreg()