1278 	struct rtl_phy *rtlphy = &rtlpriv->phy;  in rtl92ee_hw_init()  local
1348 	rtlphy->rfreg_chnlval[0] = rtl_get_rfreg(hw, RF90_PATH_A,  in rtl92ee_hw_init()
1350 	rtlphy->rfreg_chnlval[1] = rtl_get_rfreg(hw, RF90_PATH_B,  in rtl92ee_hw_init()
1352 	rtlphy->backup_rf_0x1a = (u32)rtl_get_rfreg(hw, RF90_PATH_A, RF_RX_G1,  in rtl92ee_hw_init()
1354 	rtlphy->rfreg_chnlval[0] = (rtlphy->rfreg_chnlval[0] & 0xfffff3ff) |  in rtl92ee_hw_init()
1358 		      rtlphy->rfreg_chnlval[0]);  in rtl92ee_hw_init()
1360 		      rtlphy->rfreg_chnlval[0]);  in rtl92ee_hw_init()
1390 		if (rtlphy->iqk_initialized) {  in rtl92ee_hw_init()
1394 			rtlphy->iqk_initialized = true;  in rtl92ee_hw_init()
1398 	rtlphy->rfpath_rx_enable[0] = true;  in rtl92ee_hw_init()
1399 	if (rtlphy->rf_type == RF_2T2R)  in rtl92ee_hw_init()
1400 		rtlphy->rfpath_rx_enable[1] = true;  in rtl92ee_hw_init()
1408 	if ((!(tmp_u1b & BIT(1))) && (rtlphy->rf_type == RF_2T2R)) {  in rtl92ee_hw_init()
1433 	struct rtl_phy *rtlphy = &rtlpriv->phy;  in _rtl92ee_read_chip_version()  local
1437 	rtlphy->rf_type = RF_2T2R;  in _rtl92ee_read_chip_version()
1446 		 "Chip RF Type: %s\n", (rtlphy->rf_type == RF_2T2R) ?  in _rtl92ee_read_chip_version()
2239 	struct rtl_phy *rtlphy = &rtlpriv->phy;  in rtl92ee_read_eeprom_info()  local
2244 	if (get_rf_type(rtlphy) == RF_1T1R) {  in rtl92ee_read_eeprom_info()
2269 	rtlphy->rfpath_rx_enable[0] = true;  in rtl92ee_read_eeprom_info()
2270 	if (rtlphy->rf_type == RF_2T2R)  in rtl92ee_read_eeprom_info()
2271 		rtlphy->rfpath_rx_enable[1] = true;  in rtl92ee_read_eeprom_info()
2310 	struct rtl_phy *rtlphy = &rtlpriv->phy;  in rtl92ee_update_hal_rate_mask()  local
2366 		if (rtlphy->rf_type == RF_1T1R) {  in rtl92ee_update_hal_rate_mask()
2411 		if (rtlphy->rf_type == RF_1T1R)  in rtl92ee_update_hal_rate_mask()