Lines Matching refs:hw
201 u32 rtl92d_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask) in rtl92d_phy_query_bb_reg() argument
203 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_query_bb_reg()
218 originalvalue = rtl92de_read_dword_dbi(hw, (u16)regaddr, in rtl92d_phy_query_bb_reg()
231 void rtl92d_phy_set_bb_reg(struct ieee80211_hw *hw, in rtl92d_phy_set_bb_reg() argument
234 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_set_bb_reg()
250 originalvalue = rtl92de_read_dword_dbi(hw, in rtl92d_phy_set_bb_reg()
259 rtl92de_write_dword_dbi(hw, (u16) regaddr, data, dbi_direct); in rtl92d_phy_set_bb_reg()
267 static u32 _rtl92d_phy_rf_serial_read(struct ieee80211_hw *hw, in _rtl92d_phy_rf_serial_read() argument
271 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_rf_serial_read()
280 tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD); in _rtl92d_phy_rf_serial_read()
284 tmplong2 = rtl_get_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD); in _rtl92d_phy_rf_serial_read()
287 rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD, in _rtl92d_phy_rf_serial_read()
290 rtl_set_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD, tmplong2); in _rtl92d_phy_rf_serial_read()
293 rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD, in _rtl92d_phy_rf_serial_read()
297 rfpi_enable = (u8) rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER1, in _rtl92d_phy_rf_serial_read()
300 rfpi_enable = (u8) rtl_get_bbreg(hw, RFPGA0_XB_HSSIPARAMETER1, in _rtl92d_phy_rf_serial_read()
303 retvalue = rtl_get_bbreg(hw, pphyreg->rf_rbpi, in _rtl92d_phy_rf_serial_read()
306 retvalue = rtl_get_bbreg(hw, pphyreg->rf_rb, in _rtl92d_phy_rf_serial_read()
313 static void _rtl92d_phy_rf_serial_write(struct ieee80211_hw *hw, in _rtl92d_phy_rf_serial_write() argument
319 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_rf_serial_write()
326 rtl_set_bbreg(hw, pphyreg->rf3wire_offset, MASKDWORD, data_and_addr); in _rtl92d_phy_rf_serial_write()
331 u32 rtl92d_phy_query_rf_reg(struct ieee80211_hw *hw, in rtl92d_phy_query_rf_reg() argument
334 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_query_rf_reg()
342 original_value = _rtl92d_phy_rf_serial_read(hw, rfpath, regaddr); in rtl92d_phy_query_rf_reg()
352 void rtl92d_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath, in rtl92d_phy_set_rf_reg() argument
355 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_set_rf_reg()
368 original_value = _rtl92d_phy_rf_serial_read(hw, in rtl92d_phy_set_rf_reg()
374 _rtl92d_phy_rf_serial_write(hw, rfpath, regaddr, data); in rtl92d_phy_set_rf_reg()
382 bool rtl92d_phy_mac_config(struct ieee80211_hw *hw) in rtl92d_phy_mac_config() argument
384 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_mac_config()
408 static void _rtl92d_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw) in _rtl92d_phy_init_bb_rf_register_definition() argument
410 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_init_bb_rf_register_definition()
535 static bool _rtl92d_phy_config_bb_with_headerfile(struct ieee80211_hw *hw, in _rtl92d_phy_config_bb_with_headerfile() argument
543 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_config_bb_with_headerfile()
544 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); in _rtl92d_phy_config_bb_with_headerfile()
573 rtl_set_bbreg(hw, phy_regarray_table[i], MASKDWORD, in _rtl92d_phy_config_bb_with_headerfile()
584 rtl_set_bbreg(hw, agctab_array_table[i], in _rtl92d_phy_config_bb_with_headerfile()
600 rtl_set_bbreg(hw, agctab_array_table[i], in _rtl92d_phy_config_bb_with_headerfile()
615 rtl_set_bbreg(hw, in _rtl92d_phy_config_bb_with_headerfile()
635 static void _rtl92d_store_pwrindex_diffrate_offset(struct ieee80211_hw *hw, in _rtl92d_store_pwrindex_diffrate_offset() argument
639 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_store_pwrindex_diffrate_offset()
687 static bool _rtl92d_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw, in _rtl92d_phy_config_bb_with_pgheaderfile() argument
690 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_config_bb_with_pgheaderfile()
700 _rtl92d_store_pwrindex_diffrate_offset(hw, in _rtl92d_phy_config_bb_with_pgheaderfile()
712 static bool _rtl92d_phy_bb_config(struct ieee80211_hw *hw) in _rtl92d_phy_bb_config() argument
714 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_bb_config()
716 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); in _rtl92d_phy_bb_config()
720 rtstatus = _rtl92d_phy_config_bb_with_headerfile(hw, in _rtl92d_phy_bb_config()
734 rtstatus = _rtl92d_phy_config_bb_with_pgheaderfile(hw, in _rtl92d_phy_bb_config()
741 rtstatus = _rtl92d_phy_config_bb_with_headerfile(hw, in _rtl92d_phy_bb_config()
747 rtlphy->cck_high_power = (bool) (rtl_get_bbreg(hw, in _rtl92d_phy_bb_config()
753 bool rtl92d_phy_bb_config(struct ieee80211_hw *hw) in rtl92d_phy_bb_config() argument
755 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_bb_config()
760 _rtl92d_phy_init_bb_rf_register_definition(hw); in rtl92d_phy_bb_config()
778 return _rtl92d_phy_bb_config(hw); in rtl92d_phy_bb_config()
781 bool rtl92d_phy_rf_config(struct ieee80211_hw *hw) in rtl92d_phy_rf_config() argument
783 return rtl92d_phy_rf6052_config(hw); in rtl92d_phy_rf_config()
786 bool rtl92d_phy_config_rf_with_headerfile(struct ieee80211_hw *hw, in rtl92d_phy_config_rf_with_headerfile() argument
794 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_config_rf_with_headerfile()
826 rtl_rfreg_delay(hw, rfpath, radioa_array_table[i], in rtl92d_phy_config_rf_with_headerfile()
833 rtl_rfreg_delay(hw, rfpath, radiob_array_table[i], in rtl92d_phy_config_rf_with_headerfile()
850 void rtl92d_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw) in rtl92d_phy_get_hw_reg_originalvalue() argument
852 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_get_hw_reg_originalvalue()
856 (u8) rtl_get_bbreg(hw, ROFDM0_XAAGCCORE1, MASKBYTE0); in rtl92d_phy_get_hw_reg_originalvalue()
858 (u8) rtl_get_bbreg(hw, ROFDM0_XBAGCCORE1, MASKBYTE0); in rtl92d_phy_get_hw_reg_originalvalue()
860 (u8) rtl_get_bbreg(hw, ROFDM0_XCAGCCORE1, MASKBYTE0); in rtl92d_phy_get_hw_reg_originalvalue()
862 (u8) rtl_get_bbreg(hw, ROFDM0_XDAGCCORE1, MASKBYTE0); in rtl92d_phy_get_hw_reg_originalvalue()
869 rtlphy->framesync = (u8)rtl_get_bbreg(hw, ROFDM0_RXDETECTOR3, in rtl92d_phy_get_hw_reg_originalvalue()
871 rtlphy->framesync_c34 = rtl_get_bbreg(hw, ROFDM0_RXDETECTOR2, in rtl92d_phy_get_hw_reg_originalvalue()
878 static void _rtl92d_get_txpower_index(struct ieee80211_hw *hw, u8 channel, in _rtl92d_get_txpower_index() argument
881 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_get_txpower_index()
884 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); in _rtl92d_get_txpower_index()
915 static void _rtl92d_ccxpower_index_check(struct ieee80211_hw *hw, in _rtl92d_ccxpower_index_check() argument
918 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_ccxpower_index_check()
948 void rtl92d_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel) in rtl92d_phy_set_txpower_level() argument
950 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); in rtl92d_phy_set_txpower_level()
951 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_set_txpower_level()
957 _rtl92d_get_txpower_index(hw, channel, &cckpowerlevel[0], in rtl92d_phy_set_txpower_level()
960 _rtl92d_ccxpower_index_check(hw, channel, &cckpowerlevel[0], in rtl92d_phy_set_txpower_level()
963 rtl92d_phy_rf6052_set_cck_txpower(hw, &cckpowerlevel[0]); in rtl92d_phy_set_txpower_level()
964 rtl92d_phy_rf6052_set_ofdm_txpower(hw, &ofdmpowerlevel[0], channel); in rtl92d_phy_set_txpower_level()
967 void rtl92d_phy_set_bw_mode(struct ieee80211_hw *hw, in rtl92d_phy_set_bw_mode() argument
970 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_set_bw_mode()
972 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); in rtl92d_phy_set_bw_mode()
973 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); in rtl92d_phy_set_bw_mode()
980 if ((is_hal_stop(rtlhal)) || (RT_CANNOT_IO(hw))) { in rtl92d_phy_set_bw_mode()
1011 rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x0); in rtl92d_phy_set_bw_mode()
1012 rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x0); in rtl92d_phy_set_bw_mode()
1014 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10) | in rtl92d_phy_set_bw_mode()
1018 rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x1); in rtl92d_phy_set_bw_mode()
1019 rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x1); in rtl92d_phy_set_bw_mode()
1023 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag); in rtl92d_phy_set_bw_mode()
1024 rtl_set_bbreg(hw, RCCK0_SYSTEM, BCCKSIDEBAND, in rtl92d_phy_set_bw_mode()
1026 rtl92d_release_cckandrw_pagea_ctl(hw, &flag); in rtl92d_phy_set_bw_mode()
1028 rtl_set_bbreg(hw, ROFDM1_LSTF, 0xC00, mac->cur_40_prime_sc); in rtl92d_phy_set_bw_mode()
1030 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10) | in rtl92d_phy_set_bw_mode()
1032 rtl_set_bbreg(hw, 0x818, (BIT(26) | BIT(27)), in rtl92d_phy_set_bw_mode()
1042 rtl92d_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw); in rtl92d_phy_set_bw_mode()
1047 static void _rtl92d_phy_stop_trx_before_changeband(struct ieee80211_hw *hw) in _rtl92d_phy_stop_trx_before_changeband() argument
1049 rtl_set_bbreg(hw, RFPGA0_RFMOD, BCCKEN, 0); in _rtl92d_phy_stop_trx_before_changeband()
1050 rtl_set_bbreg(hw, RFPGA0_RFMOD, BOFDMEN, 0); in _rtl92d_phy_stop_trx_before_changeband()
1051 rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0, 0x00); in _rtl92d_phy_stop_trx_before_changeband()
1052 rtl_set_bbreg(hw, ROFDM1_TRXPATHENABLE, BDWORD, 0x0); in _rtl92d_phy_stop_trx_before_changeband()
1055 static void rtl92d_phy_switch_wirelessband(struct ieee80211_hw *hw, u8 band) in rtl92d_phy_switch_wirelessband() argument
1057 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_switch_wirelessband()
1058 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); in rtl92d_phy_switch_wirelessband()
1067 _rtl92d_phy_stop_trx_before_changeband(hw); in rtl92d_phy_switch_wirelessband()
1073 _rtl92d_phy_config_bb_with_headerfile(hw, in rtl92d_phy_switch_wirelessband()
1079 _rtl92d_phy_config_bb_with_headerfile(hw, in rtl92d_phy_switch_wirelessband()
1082 rtl92d_update_bbrf_configuration(hw); in rtl92d_phy_switch_wirelessband()
1084 rtl_set_bbreg(hw, RFPGA0_RFMOD, BCCKEN, 0x1); in rtl92d_phy_switch_wirelessband()
1085 rtl_set_bbreg(hw, RFPGA0_RFMOD, BOFDMEN, 0x1); in rtl92d_phy_switch_wirelessband()
1108 static void _rtl92d_phy_reload_imr_setting(struct ieee80211_hw *hw, in _rtl92d_phy_reload_imr_setting() argument
1111 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_reload_imr_setting()
1120 rtl_set_bbreg(hw, RFPGA0_RFMOD, BIT(25) | BIT(24), 0); in _rtl92d_phy_reload_imr_setting()
1121 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER4, 0x00f00000, 0xf); in _rtl92d_phy_reload_imr_setting()
1124 rtl_set_bbreg(hw, ROFDM1_CFOTRACKING, BIT(13) | in _rtl92d_phy_reload_imr_setting()
1127 rtl_set_bbreg(hw, ROFDM1_CFOTRACKING, BIT(13) | in _rtl92d_phy_reload_imr_setting()
1133 rtl_set_rfreg(hw, (enum radio_path)rfpath, in _rtl92d_phy_reload_imr_setting()
1136 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER4, 0x00f00000, 0); in _rtl92d_phy_reload_imr_setting()
1137 rtl_set_bbreg(hw, RFPGA0_RFMOD, BOFDMEN, 1); in _rtl92d_phy_reload_imr_setting()
1148 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag); in _rtl92d_phy_reload_imr_setting()
1149 rtl_set_bbreg(hw, RFPGA0_RFMOD, BIT(25) | BIT(24), 0); in _rtl92d_phy_reload_imr_setting()
1150 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER4, in _rtl92d_phy_reload_imr_setting()
1154 rtl_set_rfreg(hw, (enum radio_path)rfpath, in _rtl92d_phy_reload_imr_setting()
1159 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER4, in _rtl92d_phy_reload_imr_setting()
1161 rtl_set_bbreg(hw, RFPGA0_RFMOD, BOFDMEN | BCCKEN, 3); in _rtl92d_phy_reload_imr_setting()
1162 rtl92d_release_cckandrw_pagea_ctl(hw, &flag); in _rtl92d_phy_reload_imr_setting()
1168 static void _rtl92d_phy_enable_rf_env(struct ieee80211_hw *hw, in _rtl92d_phy_enable_rf_env() argument
1171 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_enable_rf_env()
1180 *pu4_regval = rtl_get_bbreg(hw, pphyreg->rfintfs, BRFSI_RFENV); in _rtl92d_phy_enable_rf_env()
1185 rtl_get_bbreg(hw, pphyreg->rfintfs, BRFSI_RFENV << 16); in _rtl92d_phy_enable_rf_env()
1189 rtl_set_bbreg(hw, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1); in _rtl92d_phy_enable_rf_env()
1192 rtl_set_bbreg(hw, pphyreg->rfintfo, BRFSI_RFENV, 0x1); in _rtl92d_phy_enable_rf_env()
1196 rtl_set_bbreg(hw, pphyreg->rfhssi_para2, B3WIREADDRESSLENGTH, 0x0); in _rtl92d_phy_enable_rf_env()
1199 rtl_set_bbreg(hw, pphyreg->rfhssi_para2, B3WIREDATALENGTH, 0x0); in _rtl92d_phy_enable_rf_env()
1204 static void _rtl92d_phy_restore_rf_env(struct ieee80211_hw *hw, u8 rfpath, in _rtl92d_phy_restore_rf_env() argument
1207 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_restore_rf_env()
1216 rtl_set_bbreg(hw, pphyreg->rfintfs, BRFSI_RFENV, *pu4_regval); in _rtl92d_phy_restore_rf_env()
1220 rtl_set_bbreg(hw, pphyreg->rfintfs, BRFSI_RFENV << 16, in _rtl92d_phy_restore_rf_env()
1227 static void _rtl92d_phy_switch_rf_setting(struct ieee80211_hw *hw, u8 channel) in _rtl92d_phy_switch_rf_setting() argument
1229 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_switch_rf_setting()
1263 need_pwr_down = rtl92d_phy_enable_anotherphy(hw, false); in _rtl92d_phy_switch_rf_setting()
1267 _rtl92d_phy_enable_rf_env(hw, path, in _rtl92d_phy_switch_rf_setting()
1272 rtl_set_rfreg(hw, (enum radio_path)path, in _rtl92d_phy_switch_rf_setting()
1280 rtl_set_rfreg(hw, (enum radio_path)path, in _rtl92d_phy_switch_rf_setting()
1284 rtl_set_rfreg(hw, (enum radio_path)path, in _rtl92d_phy_switch_rf_setting()
1294 rtl_get_rfreg(hw, (enum radio_path)path, in _rtl92d_phy_switch_rf_setting()
1299 _rtl92d_phy_restore_rf_env(hw, path, &u4regvalue); in _rtl92d_phy_switch_rf_setting()
1301 rtl92d_phy_powerdown_anotherphy(hw, false); in _rtl92d_phy_switch_rf_setting()
1324 rtl_set_rfreg(hw, rfpath, in _rtl92d_phy_switch_rf_setting()
1335 rtl_set_rfreg(hw, (enum radio_path)rfpath, 0x0B, in _rtl92d_phy_switch_rf_setting()
1355 rtl92d_phy_enable_anotherphy(hw, true); in _rtl92d_phy_switch_rf_setting()
1359 _rtl92d_phy_enable_rf_env(hw, path, in _rtl92d_phy_switch_rf_setting()
1365 rtl_set_rfreg(hw, (enum radio_path)path, in _rtl92d_phy_switch_rf_setting()
1371 rtl_set_rfreg(hw, (enum radio_path)path, in _rtl92d_phy_switch_rf_setting()
1381 rtl_get_rfreg(hw, (enum radio_path)path, in _rtl92d_phy_switch_rf_setting()
1389 rtl_set_rfreg(hw, (enum radio_path)path, RF_SYN_G4, in _rtl92d_phy_switch_rf_setting()
1393 _rtl92d_phy_restore_rf_env(hw, path, &u4regvalue); in _rtl92d_phy_switch_rf_setting()
1395 rtl92d_phy_powerdown_anotherphy(hw, true); in _rtl92d_phy_switch_rf_setting()
1427 static u8 _rtl92d_phy_patha_iqk(struct ieee80211_hw *hw, bool configpathb) in _rtl92d_phy_patha_iqk() argument
1429 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_patha_iqk()
1430 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); in _rtl92d_phy_patha_iqk()
1438 rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x10008c1f); in _rtl92d_phy_patha_iqk()
1439 rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x10008c1f); in _rtl92d_phy_patha_iqk()
1441 rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x10008c22); in _rtl92d_phy_patha_iqk()
1442 rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x10008c22); in _rtl92d_phy_patha_iqk()
1444 rtl_set_bbreg(hw, 0xe38, MASKDWORD, 0x82140102); in _rtl92d_phy_patha_iqk()
1445 rtl_set_bbreg(hw, 0xe3c, MASKDWORD, 0x28160206); in _rtl92d_phy_patha_iqk()
1448 rtl_set_bbreg(hw, 0xe50, MASKDWORD, 0x10008c22); in _rtl92d_phy_patha_iqk()
1449 rtl_set_bbreg(hw, 0xe54, MASKDWORD, 0x10008c22); in _rtl92d_phy_patha_iqk()
1450 rtl_set_bbreg(hw, 0xe58, MASKDWORD, 0x82140102); in _rtl92d_phy_patha_iqk()
1451 rtl_set_bbreg(hw, 0xe5c, MASKDWORD, 0x28160206); in _rtl92d_phy_patha_iqk()
1455 rtl_set_bbreg(hw, 0xe4c, MASKDWORD, 0x00462911); in _rtl92d_phy_patha_iqk()
1458 rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf9000000); in _rtl92d_phy_patha_iqk()
1459 rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf8000000); in _rtl92d_phy_patha_iqk()
1466 regeac = rtl_get_bbreg(hw, 0xeac, MASKDWORD); in _rtl92d_phy_patha_iqk()
1468 rege94 = rtl_get_bbreg(hw, 0xe94, MASKDWORD); in _rtl92d_phy_patha_iqk()
1470 rege9c = rtl_get_bbreg(hw, 0xe9c, MASKDWORD); in _rtl92d_phy_patha_iqk()
1472 regea4 = rtl_get_bbreg(hw, 0xea4, MASKDWORD); in _rtl92d_phy_patha_iqk()
1489 static u8 _rtl92d_phy_patha_iqk_5g_normal(struct ieee80211_hw *hw, in _rtl92d_phy_patha_iqk_5g_normal() argument
1492 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_patha_iqk_5g_normal()
1493 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); in _rtl92d_phy_patha_iqk_5g_normal()
1508 rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x18008c1f); in _rtl92d_phy_patha_iqk_5g_normal()
1509 rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x18008c1f); in _rtl92d_phy_patha_iqk_5g_normal()
1510 rtl_set_bbreg(hw, 0xe38, MASKDWORD, 0x82140307); in _rtl92d_phy_patha_iqk_5g_normal()
1511 rtl_set_bbreg(hw, 0xe3c, MASKDWORD, 0x68160960); in _rtl92d_phy_patha_iqk_5g_normal()
1514 rtl_set_bbreg(hw, 0xe50, MASKDWORD, 0x18008c2f); in _rtl92d_phy_patha_iqk_5g_normal()
1515 rtl_set_bbreg(hw, 0xe54, MASKDWORD, 0x18008c2f); in _rtl92d_phy_patha_iqk_5g_normal()
1516 rtl_set_bbreg(hw, 0xe58, MASKDWORD, 0x82110000); in _rtl92d_phy_patha_iqk_5g_normal()
1517 rtl_set_bbreg(hw, 0xe5c, MASKDWORD, 0x68110000); in _rtl92d_phy_patha_iqk_5g_normal()
1521 rtl_set_bbreg(hw, 0xe4c, MASKDWORD, 0x00462911); in _rtl92d_phy_patha_iqk_5g_normal()
1523 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, MASKDWORD, 0x07000f60); in _rtl92d_phy_patha_iqk_5g_normal()
1524 rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, MASKDWORD, 0x66e60e30); in _rtl92d_phy_patha_iqk_5g_normal()
1529 rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf9000000); in _rtl92d_phy_patha_iqk_5g_normal()
1530 rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf8000000); in _rtl92d_phy_patha_iqk_5g_normal()
1537 regeac = rtl_get_bbreg(hw, 0xeac, MASKDWORD); in _rtl92d_phy_patha_iqk_5g_normal()
1539 rege94 = rtl_get_bbreg(hw, 0xe94, MASKDWORD); in _rtl92d_phy_patha_iqk_5g_normal()
1541 rege9c = rtl_get_bbreg(hw, 0xe9c, MASKDWORD); in _rtl92d_phy_patha_iqk_5g_normal()
1543 regea4 = rtl_get_bbreg(hw, 0xea4, MASKDWORD); in _rtl92d_phy_patha_iqk_5g_normal()
1565 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, MASKDWORD, in _rtl92d_phy_patha_iqk_5g_normal()
1567 rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, MASKDWORD, in _rtl92d_phy_patha_iqk_5g_normal()
1573 static u8 _rtl92d_phy_pathb_iqk(struct ieee80211_hw *hw) in _rtl92d_phy_pathb_iqk() argument
1575 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_pathb_iqk()
1582 rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000002); in _rtl92d_phy_pathb_iqk()
1583 rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000000); in _rtl92d_phy_pathb_iqk()
1589 regeac = rtl_get_bbreg(hw, 0xeac, MASKDWORD); in _rtl92d_phy_pathb_iqk()
1591 regeb4 = rtl_get_bbreg(hw, 0xeb4, MASKDWORD); in _rtl92d_phy_pathb_iqk()
1593 regebc = rtl_get_bbreg(hw, 0xebc, MASKDWORD); in _rtl92d_phy_pathb_iqk()
1595 regec4 = rtl_get_bbreg(hw, 0xec4, MASKDWORD); in _rtl92d_phy_pathb_iqk()
1597 regecc = rtl_get_bbreg(hw, 0xecc, MASKDWORD); in _rtl92d_phy_pathb_iqk()
1613 static u8 _rtl92d_phy_pathb_iqk_5g_normal(struct ieee80211_hw *hw) in _rtl92d_phy_pathb_iqk_5g_normal() argument
1615 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_pathb_iqk_5g_normal()
1625 rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x18008c1f); in _rtl92d_phy_pathb_iqk_5g_normal()
1626 rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x18008c1f); in _rtl92d_phy_pathb_iqk_5g_normal()
1627 rtl_set_bbreg(hw, 0xe38, MASKDWORD, 0x82110000); in _rtl92d_phy_pathb_iqk_5g_normal()
1628 rtl_set_bbreg(hw, 0xe3c, MASKDWORD, 0x68110000); in _rtl92d_phy_pathb_iqk_5g_normal()
1631 rtl_set_bbreg(hw, 0xe50, MASKDWORD, 0x18008c2f); in _rtl92d_phy_pathb_iqk_5g_normal()
1632 rtl_set_bbreg(hw, 0xe54, MASKDWORD, 0x18008c2f); in _rtl92d_phy_pathb_iqk_5g_normal()
1633 rtl_set_bbreg(hw, 0xe58, MASKDWORD, 0x82140307); in _rtl92d_phy_pathb_iqk_5g_normal()
1634 rtl_set_bbreg(hw, 0xe5c, MASKDWORD, 0x68160960); in _rtl92d_phy_pathb_iqk_5g_normal()
1638 rtl_set_bbreg(hw, 0xe4c, MASKDWORD, 0x00462911); in _rtl92d_phy_pathb_iqk_5g_normal()
1641 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, MASKDWORD, 0x0f600700); in _rtl92d_phy_pathb_iqk_5g_normal()
1642 rtl_set_bbreg(hw, RFPGA0_XB_RFINTERFACEOE, MASKDWORD, 0x061f0d30); in _rtl92d_phy_pathb_iqk_5g_normal()
1648 rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xfa000000); in _rtl92d_phy_pathb_iqk_5g_normal()
1649 rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf8000000); in _rtl92d_phy_pathb_iqk_5g_normal()
1657 regeac = rtl_get_bbreg(hw, 0xeac, MASKDWORD); in _rtl92d_phy_pathb_iqk_5g_normal()
1659 regeb4 = rtl_get_bbreg(hw, 0xeb4, MASKDWORD); in _rtl92d_phy_pathb_iqk_5g_normal()
1661 regebc = rtl_get_bbreg(hw, 0xebc, MASKDWORD); in _rtl92d_phy_pathb_iqk_5g_normal()
1663 regec4 = rtl_get_bbreg(hw, 0xec4, MASKDWORD); in _rtl92d_phy_pathb_iqk_5g_normal()
1665 regecc = rtl_get_bbreg(hw, 0xecc, MASKDWORD); in _rtl92d_phy_pathb_iqk_5g_normal()
1683 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, MASKDWORD, in _rtl92d_phy_pathb_iqk_5g_normal()
1685 rtl_set_bbreg(hw, RFPGA0_XB_RFINTERFACEOE, MASKDWORD, in _rtl92d_phy_pathb_iqk_5g_normal()
1690 static void _rtl92d_phy_save_adda_registers(struct ieee80211_hw *hw, in _rtl92d_phy_save_adda_registers() argument
1694 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_save_adda_registers()
1699 adda_backup[i] = rtl_get_bbreg(hw, adda_reg[i], MASKDWORD); in _rtl92d_phy_save_adda_registers()
1702 static void _rtl92d_phy_save_mac_registers(struct ieee80211_hw *hw, in _rtl92d_phy_save_mac_registers() argument
1705 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_save_mac_registers()
1714 static void _rtl92d_phy_reload_adda_registers(struct ieee80211_hw *hw, in _rtl92d_phy_reload_adda_registers() argument
1718 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_reload_adda_registers()
1724 rtl_set_bbreg(hw, adda_reg[i], MASKDWORD, adda_backup[i]); in _rtl92d_phy_reload_adda_registers()
1727 static void _rtl92d_phy_reload_mac_registers(struct ieee80211_hw *hw, in _rtl92d_phy_reload_mac_registers() argument
1730 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_reload_mac_registers()
1739 static void _rtl92d_phy_path_adda_on(struct ieee80211_hw *hw, in _rtl92d_phy_path_adda_on() argument
1742 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_path_adda_on()
1752 rtl_set_bbreg(hw, adda_reg[i], MASKDWORD, pathon); in _rtl92d_phy_path_adda_on()
1755 static void _rtl92d_phy_mac_setting_calibration(struct ieee80211_hw *hw, in _rtl92d_phy_mac_setting_calibration() argument
1758 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_mac_setting_calibration()
1770 static void _rtl92d_phy_patha_standby(struct ieee80211_hw *hw) in _rtl92d_phy_patha_standby() argument
1772 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_patha_standby()
1775 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x0); in _rtl92d_phy_patha_standby()
1776 rtl_set_bbreg(hw, RFPGA0_XA_LSSIPARAMETER, MASKDWORD, 0x00010000); in _rtl92d_phy_patha_standby()
1777 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000); in _rtl92d_phy_patha_standby()
1780 static void _rtl92d_phy_pimode_switch(struct ieee80211_hw *hw, bool pi_mode) in _rtl92d_phy_pimode_switch() argument
1782 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_pimode_switch()
1788 rtl_set_bbreg(hw, 0x820, MASKDWORD, mode); in _rtl92d_phy_pimode_switch()
1789 rtl_set_bbreg(hw, 0x828, MASKDWORD, mode); in _rtl92d_phy_pimode_switch()
1792 static void _rtl92d_phy_iq_calibrate(struct ieee80211_hw *hw, long result[][8], in _rtl92d_phy_iq_calibrate() argument
1795 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_iq_calibrate()
1820 bbvalue = rtl_get_bbreg(hw, RFPGA0_RFMOD, MASKDWORD); in _rtl92d_phy_iq_calibrate()
1826 _rtl92d_phy_save_adda_registers(hw, adda_reg, in _rtl92d_phy_iq_calibrate()
1828 _rtl92d_phy_save_mac_registers(hw, iqk_mac_reg, in _rtl92d_phy_iq_calibrate()
1830 _rtl92d_phy_save_adda_registers(hw, iqk_bb_reg, in _rtl92d_phy_iq_calibrate()
1833 _rtl92d_phy_path_adda_on(hw, adda_reg, true, is2t); in _rtl92d_phy_iq_calibrate()
1835 rtlphy->rfpi_enable = (u8) rtl_get_bbreg(hw, in _rtl92d_phy_iq_calibrate()
1840 _rtl92d_phy_pimode_switch(hw, true); in _rtl92d_phy_iq_calibrate()
1842 rtl_set_bbreg(hw, RFPGA0_RFMOD, BIT(24), 0x00); in _rtl92d_phy_iq_calibrate()
1843 rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKDWORD, 0x03a05600); in _rtl92d_phy_iq_calibrate()
1844 rtl_set_bbreg(hw, ROFDM0_TRMUXPAR, MASKDWORD, 0x000800e4); in _rtl92d_phy_iq_calibrate()
1845 rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW, MASKDWORD, 0x22204000); in _rtl92d_phy_iq_calibrate()
1846 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER4, 0xf00000, 0x0f); in _rtl92d_phy_iq_calibrate()
1848 rtl_set_bbreg(hw, RFPGA0_XA_LSSIPARAMETER, MASKDWORD, in _rtl92d_phy_iq_calibrate()
1850 rtl_set_bbreg(hw, RFPGA0_XB_LSSIPARAMETER, MASKDWORD, in _rtl92d_phy_iq_calibrate()
1854 _rtl92d_phy_mac_setting_calibration(hw, iqk_mac_reg, in _rtl92d_phy_iq_calibrate()
1857 rtl_set_bbreg(hw, 0xb68, MASKDWORD, 0x0f600000); in _rtl92d_phy_iq_calibrate()
1859 rtl_set_bbreg(hw, 0xb6c, MASKDWORD, 0x0f600000); in _rtl92d_phy_iq_calibrate()
1862 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000); in _rtl92d_phy_iq_calibrate()
1863 rtl_set_bbreg(hw, 0xe40, MASKDWORD, 0x01007c00); in _rtl92d_phy_iq_calibrate()
1864 rtl_set_bbreg(hw, 0xe44, MASKDWORD, 0x01004800); in _rtl92d_phy_iq_calibrate()
1866 patha_ok = _rtl92d_phy_patha_iqk(hw, is2t); in _rtl92d_phy_iq_calibrate()
1870 result[t][0] = (rtl_get_bbreg(hw, 0xe94, MASKDWORD) & in _rtl92d_phy_iq_calibrate()
1872 result[t][1] = (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) & in _rtl92d_phy_iq_calibrate()
1874 result[t][2] = (rtl_get_bbreg(hw, 0xea4, MASKDWORD) & in _rtl92d_phy_iq_calibrate()
1876 result[t][3] = (rtl_get_bbreg(hw, 0xeac, MASKDWORD) & in _rtl92d_phy_iq_calibrate()
1884 result[t][0] = (rtl_get_bbreg(hw, 0xe94, MASKDWORD) & in _rtl92d_phy_iq_calibrate()
1886 result[t][1] = (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) & in _rtl92d_phy_iq_calibrate()
1893 _rtl92d_phy_patha_standby(hw); in _rtl92d_phy_iq_calibrate()
1895 _rtl92d_phy_path_adda_on(hw, adda_reg, false, is2t); in _rtl92d_phy_iq_calibrate()
1897 pathb_ok = _rtl92d_phy_pathb_iqk(hw); in _rtl92d_phy_iq_calibrate()
1901 result[t][4] = (rtl_get_bbreg(hw, 0xeb4, in _rtl92d_phy_iq_calibrate()
1903 result[t][5] = (rtl_get_bbreg(hw, 0xebc, in _rtl92d_phy_iq_calibrate()
1905 result[t][6] = (rtl_get_bbreg(hw, 0xec4, in _rtl92d_phy_iq_calibrate()
1907 result[t][7] = (rtl_get_bbreg(hw, 0xecc, in _rtl92d_phy_iq_calibrate()
1914 result[t][4] = (rtl_get_bbreg(hw, 0xeb4, in _rtl92d_phy_iq_calibrate()
1916 result[t][5] = (rtl_get_bbreg(hw, 0xebc, in _rtl92d_phy_iq_calibrate()
1929 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0); in _rtl92d_phy_iq_calibrate()
1933 _rtl92d_phy_pimode_switch(hw, false); in _rtl92d_phy_iq_calibrate()
1935 _rtl92d_phy_reload_adda_registers(hw, adda_reg, in _rtl92d_phy_iq_calibrate()
1938 _rtl92d_phy_reload_mac_registers(hw, iqk_mac_reg, in _rtl92d_phy_iq_calibrate()
1941 _rtl92d_phy_reload_adda_registers(hw, iqk_bb_reg, in _rtl92d_phy_iq_calibrate()
1945 _rtl92d_phy_reload_adda_registers(hw, iqk_bb_reg, in _rtl92d_phy_iq_calibrate()
1949 rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x01008c00); in _rtl92d_phy_iq_calibrate()
1950 rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x01008c00); in _rtl92d_phy_iq_calibrate()
1955 static void _rtl92d_phy_iq_calibrate_5g_normal(struct ieee80211_hw *hw, in _rtl92d_phy_iq_calibrate_5g_normal() argument
1958 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_iq_calibrate_5g_normal()
1987 bbvalue = rtl_get_bbreg(hw, RFPGA0_RFMOD, MASKDWORD); in _rtl92d_phy_iq_calibrate_5g_normal()
1992 _rtl92d_phy_save_adda_registers(hw, adda_reg, in _rtl92d_phy_iq_calibrate_5g_normal()
1995 _rtl92d_phy_save_mac_registers(hw, iqk_mac_reg, in _rtl92d_phy_iq_calibrate_5g_normal()
1998 _rtl92d_phy_save_adda_registers(hw, iqk_bb_reg, in _rtl92d_phy_iq_calibrate_5g_normal()
2002 _rtl92d_phy_save_adda_registers(hw, iqk_bb_reg, in _rtl92d_phy_iq_calibrate_5g_normal()
2006 _rtl92d_phy_path_adda_on(hw, adda_reg, true, is2t); in _rtl92d_phy_iq_calibrate_5g_normal()
2008 _rtl92d_phy_mac_setting_calibration(hw, iqk_mac_reg, in _rtl92d_phy_iq_calibrate_5g_normal()
2011 rtlphy->rfpi_enable = (u8) rtl_get_bbreg(hw, in _rtl92d_phy_iq_calibrate_5g_normal()
2015 _rtl92d_phy_pimode_switch(hw, true); in _rtl92d_phy_iq_calibrate_5g_normal()
2016 rtl_set_bbreg(hw, RFPGA0_RFMOD, BIT(24), 0x00); in _rtl92d_phy_iq_calibrate_5g_normal()
2017 rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKDWORD, 0x03a05600); in _rtl92d_phy_iq_calibrate_5g_normal()
2018 rtl_set_bbreg(hw, ROFDM0_TRMUXPAR, MASKDWORD, 0x000800e4); in _rtl92d_phy_iq_calibrate_5g_normal()
2019 rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW, MASKDWORD, 0x22208000); in _rtl92d_phy_iq_calibrate_5g_normal()
2020 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER4, 0xf00000, 0x0f); in _rtl92d_phy_iq_calibrate_5g_normal()
2023 rtl_set_bbreg(hw, 0xb68, MASKDWORD, 0x0f600000); in _rtl92d_phy_iq_calibrate_5g_normal()
2025 rtl_set_bbreg(hw, 0xb6c, MASKDWORD, 0x0f600000); in _rtl92d_phy_iq_calibrate_5g_normal()
2028 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000); in _rtl92d_phy_iq_calibrate_5g_normal()
2029 rtl_set_bbreg(hw, 0xe40, MASKDWORD, 0x10007c00); in _rtl92d_phy_iq_calibrate_5g_normal()
2030 rtl_set_bbreg(hw, 0xe44, MASKDWORD, 0x01004800); in _rtl92d_phy_iq_calibrate_5g_normal()
2031 patha_ok = _rtl92d_phy_patha_iqk_5g_normal(hw, is2t); in _rtl92d_phy_iq_calibrate_5g_normal()
2034 result[t][0] = (rtl_get_bbreg(hw, 0xe94, MASKDWORD) & in _rtl92d_phy_iq_calibrate_5g_normal()
2036 result[t][1] = (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) & in _rtl92d_phy_iq_calibrate_5g_normal()
2038 result[t][2] = (rtl_get_bbreg(hw, 0xea4, MASKDWORD) & in _rtl92d_phy_iq_calibrate_5g_normal()
2040 result[t][3] = (rtl_get_bbreg(hw, 0xeac, MASKDWORD) & in _rtl92d_phy_iq_calibrate_5g_normal()
2046 result[t][0] = (rtl_get_bbreg(hw, 0xe94, MASKDWORD) & in _rtl92d_phy_iq_calibrate_5g_normal()
2048 result[t][1] = (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) & in _rtl92d_phy_iq_calibrate_5g_normal()
2056 _rtl92d_phy_path_adda_on(hw, adda_reg, false, is2t); in _rtl92d_phy_iq_calibrate_5g_normal()
2057 pathb_ok = _rtl92d_phy_pathb_iqk_5g_normal(hw); in _rtl92d_phy_iq_calibrate_5g_normal()
2061 result[t][4] = (rtl_get_bbreg(hw, 0xeb4, MASKDWORD) & in _rtl92d_phy_iq_calibrate_5g_normal()
2063 result[t][5] = (rtl_get_bbreg(hw, 0xebc, MASKDWORD) & in _rtl92d_phy_iq_calibrate_5g_normal()
2065 result[t][6] = (rtl_get_bbreg(hw, 0xec4, MASKDWORD) & in _rtl92d_phy_iq_calibrate_5g_normal()
2067 result[t][7] = (rtl_get_bbreg(hw, 0xecc, MASKDWORD) & in _rtl92d_phy_iq_calibrate_5g_normal()
2072 result[t][4] = (rtl_get_bbreg(hw, 0xeb4, MASKDWORD) & in _rtl92d_phy_iq_calibrate_5g_normal()
2074 result[t][5] = (rtl_get_bbreg(hw, 0xebc, MASKDWORD) & in _rtl92d_phy_iq_calibrate_5g_normal()
2085 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0); in _rtl92d_phy_iq_calibrate_5g_normal()
2088 _rtl92d_phy_reload_adda_registers(hw, iqk_bb_reg, in _rtl92d_phy_iq_calibrate_5g_normal()
2092 _rtl92d_phy_reload_adda_registers(hw, iqk_bb_reg, in _rtl92d_phy_iq_calibrate_5g_normal()
2096 _rtl92d_phy_reload_mac_registers(hw, iqk_mac_reg, in _rtl92d_phy_iq_calibrate_5g_normal()
2100 _rtl92d_phy_pimode_switch(hw, false); in _rtl92d_phy_iq_calibrate_5g_normal()
2102 _rtl92d_phy_reload_adda_registers(hw, adda_reg, in _rtl92d_phy_iq_calibrate_5g_normal()
2109 static bool _rtl92d_phy_simularity_compare(struct ieee80211_hw *hw, in _rtl92d_phy_simularity_compare() argument
2112 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_simularity_compare()
2168 static void _rtl92d_phy_patha_fill_iqk_matrix(struct ieee80211_hw *hw, in _rtl92d_phy_patha_fill_iqk_matrix() argument
2172 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_patha_fill_iqk_matrix()
2184 oldval_0 = (rtl_get_bbreg(hw, ROFDM0_XATxIQIMBALANCE, in _rtl92d_phy_patha_fill_iqk_matrix()
2193 rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE, 0x3FF, tx0_a); in _rtl92d_phy_patha_fill_iqk_matrix()
2194 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(24), in _rtl92d_phy_patha_fill_iqk_matrix()
2207 rtl_set_bbreg(hw, ROFDM0_XCTxAFE, 0xF0000000, in _rtl92d_phy_patha_fill_iqk_matrix()
2209 rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE, 0x003F0000, in _rtl92d_phy_patha_fill_iqk_matrix()
2212 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(26), in _rtl92d_phy_patha_fill_iqk_matrix()
2215 rtl_get_bbreg(hw, ROFDM0_XATxIQIMBALANCE, in _rtl92d_phy_patha_fill_iqk_matrix()
2222 rtl_set_bbreg(hw, ROFDM0_XARXIQIMBALANCE, 0x3FF, reg); in _rtl92d_phy_patha_fill_iqk_matrix()
2224 rtl_set_bbreg(hw, ROFDM0_XARXIQIMBALANCE, 0xFC00, reg); in _rtl92d_phy_patha_fill_iqk_matrix()
2226 rtl_set_bbreg(hw, 0xca0, 0xF0000000, reg); in _rtl92d_phy_patha_fill_iqk_matrix()
2230 static void _rtl92d_phy_pathb_fill_iqk_matrix(struct ieee80211_hw *hw, in _rtl92d_phy_pathb_fill_iqk_matrix() argument
2233 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_pathb_fill_iqk_matrix()
2243 oldval_1 = (rtl_get_bbreg(hw, ROFDM0_XBTxIQIMBALANCE, in _rtl92d_phy_pathb_fill_iqk_matrix()
2251 rtl_set_bbreg(hw, ROFDM0_XBTxIQIMBALANCE, 0x3FF, tx1_a); in _rtl92d_phy_pathb_fill_iqk_matrix()
2252 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(28), in _rtl92d_phy_pathb_fill_iqk_matrix()
2262 rtl_set_bbreg(hw, ROFDM0_XDTxAFE, 0xF0000000, in _rtl92d_phy_pathb_fill_iqk_matrix()
2264 rtl_set_bbreg(hw, ROFDM0_XBTxIQIMBALANCE, 0x003F0000, in _rtl92d_phy_pathb_fill_iqk_matrix()
2266 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(30), in _rtl92d_phy_pathb_fill_iqk_matrix()
2271 rtl_set_bbreg(hw, ROFDM0_XBRXIQIMBALANCE, 0x3FF, reg); in _rtl92d_phy_pathb_fill_iqk_matrix()
2273 rtl_set_bbreg(hw, ROFDM0_XBRXIQIMBALANCE, 0xFC00, reg); in _rtl92d_phy_pathb_fill_iqk_matrix()
2275 rtl_set_bbreg(hw, ROFDM0_AGCRSSITABLE, 0x0000F000, reg); in _rtl92d_phy_pathb_fill_iqk_matrix()
2279 void rtl92d_phy_iq_calibrate(struct ieee80211_hw *hw) in rtl92d_phy_iq_calibrate() argument
2281 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_iq_calibrate()
2308 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag); in rtl92d_phy_iq_calibrate()
2311 _rtl92d_phy_iq_calibrate_5g_normal(hw, result, i); in rtl92d_phy_iq_calibrate()
2314 _rtl92d_phy_iq_calibrate(hw, result, i, true); in rtl92d_phy_iq_calibrate()
2316 _rtl92d_phy_iq_calibrate(hw, result, i, false); in rtl92d_phy_iq_calibrate()
2319 is12simular = _rtl92d_phy_simularity_compare(hw, result, in rtl92d_phy_iq_calibrate()
2327 is13simular = _rtl92d_phy_simularity_compare(hw, result, in rtl92d_phy_iq_calibrate()
2333 is23simular = _rtl92d_phy_simularity_compare(hw, result, in rtl92d_phy_iq_calibrate()
2348 rtl92d_release_cckandrw_pagea_ctl(hw, &flag); in rtl92d_phy_iq_calibrate()
2384 _rtl92d_phy_patha_fill_iqk_matrix(hw, patha_ok, result, in rtl92d_phy_iq_calibrate()
2388 _rtl92d_phy_pathb_fill_iqk_matrix(hw, pathb_ok, result, in rtl92d_phy_iq_calibrate()
2406 void rtl92d_phy_reload_iqk_setting(struct ieee80211_hw *hw, u8 channel) in rtl92d_phy_reload_iqk_setting() argument
2408 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_reload_iqk_setting()
2424 rtl92d_phy_iq_calibrate(hw); in rtl92d_phy_reload_iqk_setting()
2436 _rtl92d_phy_patha_fill_iqk_matrix(hw, true, in rtl92d_phy_reload_iqk_setting()
2445 _rtl92d_phy_pathb_fill_iqk_matrix(hw, in rtl92d_phy_reload_iqk_setting()
2470 static bool _rtl92d_is_legal_5g_channel(struct ieee80211_hw *hw, u8 channel) in _rtl92d_is_legal_5g_channel() argument
2488 static void _rtl92d_phy_calc_curvindex(struct ieee80211_hw *hw, in _rtl92d_phy_calc_curvindex() argument
2492 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_calc_curvindex()
2498 if (is5g && !_rtl92d_is_legal_5g_channel(hw, i + 1)) in _rtl92d_phy_calc_curvindex()
2516 static void _rtl92d_phy_reload_lck_setting(struct ieee80211_hw *hw, in _rtl92d_phy_reload_lck_setting() argument
2519 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_reload_lck_setting()
2538 rtl92d_phy_enable_anotherphy(hw, false); in _rtl92d_phy_reload_lck_setting()
2542 _rtl92d_phy_enable_rf_env(hw, erfpath, in _rtl92d_phy_reload_lck_setting()
2545 rtl_set_rfreg(hw, erfpath, RF_SYN_G4, 0x3f800, u4tmp); in _rtl92d_phy_reload_lck_setting()
2547 _rtl92d_phy_restore_rf_env(hw, erfpath, &u4regvalue); in _rtl92d_phy_reload_lck_setting()
2549 rtl92d_phy_powerdown_anotherphy(hw, false); in _rtl92d_phy_reload_lck_setting()
2557 rtl92d_phy_enable_anotherphy(hw, true); in _rtl92d_phy_reload_lck_setting()
2560 _rtl92d_phy_enable_rf_env(hw, erfpath, in _rtl92d_phy_reload_lck_setting()
2563 rtl_set_rfreg(hw, erfpath, RF_SYN_G4, 0x3f800, u4tmp); in _rtl92d_phy_reload_lck_setting()
2566 rtl_get_rfreg(hw, erfpath, RF_SYN_G4, 0x3f800)); in _rtl92d_phy_reload_lck_setting()
2568 _rtl92d_phy_restore_rf_env(hw, erfpath, &u4regvalue); in _rtl92d_phy_reload_lck_setting()
2570 rtl92d_phy_powerdown_anotherphy(hw, true); in _rtl92d_phy_reload_lck_setting()
2575 static void _rtl92d_phy_lc_calibrate_sw(struct ieee80211_hw *hw, bool is2t) in _rtl92d_phy_lc_calibrate_sw() argument
2577 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_lc_calibrate_sw()
2579 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); in _rtl92d_phy_lc_calibrate_sw()
2595 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER4, 0xF00000, 0x0F); in _rtl92d_phy_lc_calibrate_sw()
2601 rtl_set_rfreg(hw, (enum radio_path)index, RF_AC, in _rtl92d_phy_lc_calibrate_sw()
2605 rtl_set_rfreg(hw, (enum radio_path)index, RF_SYN_G7, in _rtl92d_phy_lc_calibrate_sw()
2608 rtl_set_rfreg(hw, (enum radio_path)index, RF_CHNLBW, in _rtl92d_phy_lc_calibrate_sw()
2611 u4tmp = rtl_get_rfreg(hw, (enum radio_path)index, RF_SYN_G6, in _rtl92d_phy_lc_calibrate_sw()
2616 u4tmp = rtl_get_rfreg(hw, (enum radio_path)index, in _rtl92d_phy_lc_calibrate_sw()
2621 u4tmp = rtl_get_rfreg(hw, index, RF_SYN_G4, RFREG_OFFSET_MASK); in _rtl92d_phy_lc_calibrate_sw()
2631 rtl_set_rfreg(hw, (enum radio_path)index, RF_CHNLBW, in _rtl92d_phy_lc_calibrate_sw()
2637 rtl_set_rfreg(hw, (enum radio_path)index, 0x3F, in _rtl92d_phy_lc_calibrate_sw()
2640 rtl_set_rfreg(hw, (enum radio_path)index, 0x4D, in _rtl92d_phy_lc_calibrate_sw()
2642 readval = rtl_get_rfreg(hw, (enum radio_path)index, in _rtl92d_phy_lc_calibrate_sw()
2647 readval2 = rtl_get_rfreg(hw, (enum radio_path)index, in _rtl92d_phy_lc_calibrate_sw()
2653 _rtl92d_phy_calc_curvindex(hw, targetchnl_5g, in _rtl92d_phy_lc_calibrate_sw()
2657 _rtl92d_phy_calc_curvindex(hw, targetchnl_2g, in _rtl92d_phy_lc_calibrate_sw()
2661 rtl_set_rfreg(hw, (enum radio_path)index, RF_SYN_G7, in _rtl92d_phy_lc_calibrate_sw()
2675 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER4, 0xF00000, 0x00); in _rtl92d_phy_lc_calibrate_sw()
2676 _rtl92d_phy_reload_lck_setting(hw, rtlpriv->phy.current_channel); in _rtl92d_phy_lc_calibrate_sw()
2679 static void _rtl92d_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t) in _rtl92d_phy_lc_calibrate() argument
2681 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_lc_calibrate()
2684 _rtl92d_phy_lc_calibrate_sw(hw, is2t); in _rtl92d_phy_lc_calibrate()
2687 void rtl92d_phy_lc_calibrate(struct ieee80211_hw *hw) in rtl92d_phy_lc_calibrate() argument
2689 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_lc_calibrate()
2704 _rtl92d_phy_lc_calibrate(hw, true); in rtl92d_phy_lc_calibrate()
2707 _rtl92d_phy_lc_calibrate(hw, false); in rtl92d_phy_lc_calibrate()
2713 void rtl92d_phy_ap_calibrate(struct ieee80211_hw *hw, char delta) in rtl92d_phy_ap_calibrate() argument
2739 void rtl92d_phy_reset_iqk_result(struct ieee80211_hw *hw) in rtl92d_phy_reset_iqk_result() argument
2741 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_reset_iqk_result()
2764 static bool _rtl92d_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw, in _rtl92d_phy_sw_chnl_step_by_step() argument
2768 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_sw_chnl_step_by_step()
2820 rtl92d_phy_set_txpower_level(hw, channel); in _rtl92d_phy_sw_chnl_step_by_step()
2855 rtl_set_rfreg(hw, (enum radio_path)rfpath, in _rtl92d_phy_sw_chnl_step_by_step()
2859 _rtl92d_phy_reload_imr_setting(hw, channel, in _rtl92d_phy_sw_chnl_step_by_step()
2862 _rtl92d_phy_switch_rf_setting(hw, channel); in _rtl92d_phy_sw_chnl_step_by_step()
2864 rtl92d_phy_reload_iqk_setting(hw, channel); in _rtl92d_phy_sw_chnl_step_by_step()
2878 u8 rtl92d_phy_sw_chnl(struct ieee80211_hw *hw) in rtl92d_phy_sw_chnl() argument
2880 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_sw_chnl()
2882 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); in rtl92d_phy_sw_chnl()
2893 if ((is_hal_stop(rtlhal)) || (RT_CANNOT_IO(hw))) { in rtl92d_phy_sw_chnl()
2904 ret_value = rtl_get_bbreg(hw, RFPGA0_XAB_RFPARAMETER, in rtl92d_phy_sw_chnl()
2907 rtl92d_phy_switch_wirelessband(hw, BAND_ON_5G); in rtl92d_phy_sw_chnl()
2909 rtl92d_phy_switch_wirelessband(hw, BAND_ON_2_4G); in rtl92d_phy_sw_chnl()
2942 if (!_rtl92d_phy_sw_chnl_step_by_step(hw, in rtl92d_phy_sw_chnl()
2959 static void rtl92d_phy_set_io(struct ieee80211_hw *hw) in rtl92d_phy_set_io() argument
2961 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_set_io()
2971 rtl92d_dm_write_dig(hw); in rtl92d_phy_set_io()
2972 rtl92d_phy_set_txpower_level(hw, rtlphy->current_channel); in rtl92d_phy_set_io()
2977 rtl92d_dm_write_dig(hw); in rtl92d_phy_set_io()
2989 bool rtl92d_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype) in rtl92d_phy_set_io_cmd() argument
2991 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_set_io_cmd()
3022 rtl92d_phy_set_io(hw); in rtl92d_phy_set_io_cmd()
3027 static void _rtl92d_phy_set_rfon(struct ieee80211_hw *hw) in _rtl92d_phy_set_rfon() argument
3029 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_set_rfon()
3048 static void _rtl92d_phy_set_rfsleep(struct ieee80211_hw *hw) in _rtl92d_phy_set_rfsleep() argument
3050 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92d_phy_set_rfsleep()
3057 rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00); in _rtl92d_phy_set_rfsleep()
3065 u4btmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK); in _rtl92d_phy_set_rfsleep()
3068 rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00); in _rtl92d_phy_set_rfsleep()
3070 u4btmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK); in _rtl92d_phy_set_rfsleep()
3092 bool rtl92d_phy_set_rf_power_state(struct ieee80211_hw *hw, in rtl92d_phy_set_rf_power_state() argument
3097 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_set_rf_power_state()
3098 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw); in rtl92d_phy_set_rf_power_state()
3099 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); in rtl92d_phy_set_rf_power_state()
3100 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); in rtl92d_phy_set_rf_power_state()
3101 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); in rtl92d_phy_set_rf_power_state()
3117 rtstatus = rtl_ps_enable_nic(hw); in rtl92d_phy_set_rf_power_state()
3129 _rtl92d_phy_set_rfon(hw); in rtl92d_phy_set_rf_power_state()
3133 rtlpriv->cfg->ops->led_control(hw, in rtl92d_phy_set_rf_power_state()
3136 rtlpriv->cfg->ops->led_control(hw, in rtl92d_phy_set_rf_power_state()
3143 rtl_ps_disable_nic(hw); in rtl92d_phy_set_rf_power_state()
3147 rtlpriv->cfg->ops->led_control(hw, in rtl92d_phy_set_rf_power_state()
3150 rtlpriv->cfg->ops->led_control(hw, in rtl92d_phy_set_rf_power_state()
3196 _rtl92d_phy_set_rfsleep(hw); in rtl92d_phy_set_rf_power_state()
3209 void rtl92d_phy_config_macphymode(struct ieee80211_hw *hw) in rtl92d_phy_config_macphymode() argument
3211 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_config_macphymode()
3212 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); in rtl92d_phy_config_macphymode()
3234 void rtl92d_phy_config_macphymode_info(struct ieee80211_hw *hw) in rtl92d_phy_config_macphymode_info() argument
3236 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_config_macphymode_info()
3237 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); in rtl92d_phy_config_macphymode_info()
3312 void rtl92d_phy_set_poweron(struct ieee80211_hw *hw) in rtl92d_phy_set_poweron() argument
3314 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_set_poweron()
3315 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); in rtl92d_phy_set_poweron()
3363 void rtl92d_phy_config_maccoexist_rfpage(struct ieee80211_hw *hw) in rtl92d_phy_config_maccoexist_rfpage() argument
3365 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_config_maccoexist_rfpage()
3388 void rtl92d_update_bbrf_configuration(struct ieee80211_hw *hw) in rtl92d_update_bbrf_configuration() argument
3390 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_update_bbrf_configuration()
3391 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); in rtl92d_update_bbrf_configuration()
3393 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); in rtl92d_update_bbrf_configuration()
3400 rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, BIT(0), 0x0); in rtl92d_update_bbrf_configuration()
3401 rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, BIT(15), 0x0); in rtl92d_update_bbrf_configuration()
3403 rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, BIT(16), 0x0); in rtl92d_update_bbrf_configuration()
3404 rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, BIT(31), 0x0); in rtl92d_update_bbrf_configuration()
3407 rtl_set_bbreg(hw, ROFDM0_AGCRSSITABLE, BIT(6) | BIT(7), 0x0); in rtl92d_update_bbrf_configuration()
3409 rtl_set_bbreg(hw, ROFDM1_CFOTRACKING, BIT(14) | BIT(13), 0x0); in rtl92d_update_bbrf_configuration()
3411 rtl_set_bbreg(hw, 0xB30, 0x00F00000, 0xa); in rtl92d_update_bbrf_configuration()
3413 rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE, MASKDWORD, in rtl92d_update_bbrf_configuration()
3415 rtl_set_bbreg(hw, ROFDM0_XBTxIQIMBALANCE, MASKDWORD, in rtl92d_update_bbrf_configuration()
3418 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, in rtl92d_update_bbrf_configuration()
3423 rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, in rtl92d_update_bbrf_configuration()
3428 rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, BIT(15), 0); in rtl92d_update_bbrf_configuration()
3430 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, in rtl92d_update_bbrf_configuration()
3439 rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, in rtl92d_update_bbrf_configuration()
3444 rtl_set_bbreg(hw, RFPGA0_XB_RFINTERFACEOE, in rtl92d_update_bbrf_configuration()
3449 rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, in rtl92d_update_bbrf_configuration()
3455 rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, BIT(0), 0x1); in rtl92d_update_bbrf_configuration()
3456 rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, BIT(15), 0x1); in rtl92d_update_bbrf_configuration()
3458 rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, BIT(16), 0x1); in rtl92d_update_bbrf_configuration()
3459 rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, BIT(31), 0x1); in rtl92d_update_bbrf_configuration()
3462 rtl_set_bbreg(hw, ROFDM0_AGCRSSITABLE, BIT(6) | BIT(7), 0x1); in rtl92d_update_bbrf_configuration()
3464 rtl_set_bbreg(hw, ROFDM1_CFOTRACKING, BIT(14) | BIT(13), 0x1); in rtl92d_update_bbrf_configuration()
3466 rtl_set_bbreg(hw, 0xB30, 0x00F00000, 0x0); in rtl92d_update_bbrf_configuration()
3469 rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE, MASKDWORD, in rtl92d_update_bbrf_configuration()
3472 rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE, MASKDWORD, in rtl92d_update_bbrf_configuration()
3475 rtl_set_bbreg(hw, ROFDM0_XBTxIQIMBALANCE, MASKDWORD, in rtl92d_update_bbrf_configuration()
3478 rtl_set_bbreg(hw, ROFDM0_XBTxIQIMBALANCE, MASKDWORD, in rtl92d_update_bbrf_configuration()
3481 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, in rtl92d_update_bbrf_configuration()
3484 rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, BIT(10), in rtl92d_update_bbrf_configuration()
3486 rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, BIT(15), in rtl92d_update_bbrf_configuration()
3489 rtl_set_bbreg(hw, RFPGA0_XAB_RFINTERFACESW, in rtl92d_update_bbrf_configuration()
3494 rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, BIT(10), in rtl92d_update_bbrf_configuration()
3496 rtl_set_bbreg(hw, RFPGA0_XB_RFINTERFACEOE, BIT(10), in rtl92d_update_bbrf_configuration()
3498 rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, in rtl92d_update_bbrf_configuration()
3505 rtl_set_bbreg(hw, ROFDM0_XARXIQIMBALANCE, MASKDWORD, 0x40000100); in rtl92d_update_bbrf_configuration()
3506 rtl_set_bbreg(hw, ROFDM0_XBRXIQIMBALANCE, MASKDWORD, 0x40000100); in rtl92d_update_bbrf_configuration()
3507 rtl_set_bbreg(hw, ROFDM0_XCTxAFE, 0xF0000000, 0x00); in rtl92d_update_bbrf_configuration()
3508 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(30) | BIT(28) | in rtl92d_update_bbrf_configuration()
3510 rtl_set_bbreg(hw, ROFDM0_XDTxAFE, 0xF0000000, 0x00); in rtl92d_update_bbrf_configuration()
3511 rtl_set_bbreg(hw, 0xca0, 0xF0000000, 0x00); in rtl92d_update_bbrf_configuration()
3512 rtl_set_bbreg(hw, ROFDM0_AGCRSSITABLE, 0x0000F000, 0x00); in rtl92d_update_bbrf_configuration()
3519 rtl_set_rfreg(hw, rfpath, RF_CHNLBW, BIT(8) | BIT(16) | in rtl92d_update_bbrf_configuration()
3522 rtl_set_rfreg(hw, (enum radio_path)rfpath, 0x0B, in rtl92d_update_bbrf_configuration()
3526 rtl_set_rfreg(hw, rfpath, RF_CHNLBW, BIT(8) | in rtl92d_update_bbrf_configuration()
3535 rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0, 0x11); in rtl92d_update_bbrf_configuration()
3536 rtl_set_bbreg(hw, ROFDM1_TRXPATHENABLE, BDWORD, 0x1); in rtl92d_update_bbrf_configuration()
3540 rtl_set_bbreg(hw, RFPGA0_ADDALLOCKEN, BIT(12) | in rtl92d_update_bbrf_configuration()
3543 rtl92d_phy_enable_anotherphy(hw, false); in rtl92d_update_bbrf_configuration()
3547 rtl92de_write_dword_dbi(hw, RFPGA0_ADDALLOCKEN, in rtl92d_update_bbrf_configuration()
3548 rtl92de_read_dword_dbi(hw, in rtl92d_update_bbrf_configuration()
3552 rtl92d_phy_powerdown_anotherphy(hw, false); in rtl92d_update_bbrf_configuration()
3557 rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0, 0x33); in rtl92d_update_bbrf_configuration()
3558 rtl_set_bbreg(hw, ROFDM1_TRXPATHENABLE, BDWORD, 0x3); in rtl92d_update_bbrf_configuration()
3560 rtl_set_bbreg(hw, RFPGA0_ADDALLOCKEN, BIT(12) | BIT(13), 0); in rtl92d_update_bbrf_configuration()
3564 rtlphy->rfreg_chnlval[rfpath] = rtl_get_rfreg(hw, rfpath, in rtl92d_update_bbrf_configuration()
3566 rtlphy->reg_rf3c[rfpath] = rtl_get_rfreg(hw, rfpath, 0x3C, in rtl92d_update_bbrf_configuration()
3576 bool rtl92d_phy_check_poweroff(struct ieee80211_hw *hw) in rtl92d_phy_check_poweroff() argument
3578 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92d_phy_check_poweroff()
3579 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); in rtl92d_phy_check_poweroff()