Lines Matching refs:MASKDWORD

92 	if (bitmask != MASKDWORD) {  in rtl88e_phy_set_bb_reg()
182 tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD); in _rtl88e_phy_rf_serial_read()
186 tmplong2 = rtl_get_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD); in _rtl88e_phy_rf_serial_read()
189 rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD, in _rtl88e_phy_rf_serial_read()
192 rtl_set_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD, tmplong2); in _rtl88e_phy_rf_serial_read()
229 rtl_set_bbreg(hw, pphyreg->rf3wire_offset, MASKDWORD, data_and_addr); in _rtl88e_phy_rf_serial_write()
362 rtl_set_bbreg(hw, addr, MASKDWORD, data); in _rtl8188e_config_bb_reg()
479 rtl_set_bbreg(hw, array_table[i], MASKDWORD, in handle_branch2()
504 MASKDWORD, in handle_branch2()
840 MASKDWORD); in rtl88e_phy_get_hw_reg_originalvalue()
1389 rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x10008c1c); in _rtl88e_phy_path_a_iqk()
1390 rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x30008c1c); in _rtl88e_phy_path_a_iqk()
1391 rtl_set_bbreg(hw, 0xe38, MASKDWORD, 0x8214032a); in _rtl88e_phy_path_a_iqk()
1392 rtl_set_bbreg(hw, 0xe3c, MASKDWORD, 0x28160000); in _rtl88e_phy_path_a_iqk()
1394 rtl_set_bbreg(hw, 0xe4c, MASKDWORD, 0x00462911); in _rtl88e_phy_path_a_iqk()
1395 rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf9000000); in _rtl88e_phy_path_a_iqk()
1396 rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf8000000); in _rtl88e_phy_path_a_iqk()
1400 reg_eac = rtl_get_bbreg(hw, 0xeac, MASKDWORD); in _rtl88e_phy_path_a_iqk()
1401 reg_e94 = rtl_get_bbreg(hw, 0xe94, MASKDWORD); in _rtl88e_phy_path_a_iqk()
1402 reg_e9c = rtl_get_bbreg(hw, 0xe9c, MASKDWORD); in _rtl88e_phy_path_a_iqk()
1403 reg_ea4 = rtl_get_bbreg(hw, 0xea4, MASKDWORD); in _rtl88e_phy_path_a_iqk()
1417 rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000002); in _rtl88e_phy_path_b_iqk()
1418 rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000000); in _rtl88e_phy_path_b_iqk()
1420 reg_eac = rtl_get_bbreg(hw, 0xeac, MASKDWORD); in _rtl88e_phy_path_b_iqk()
1421 reg_eb4 = rtl_get_bbreg(hw, 0xeb4, MASKDWORD); in _rtl88e_phy_path_b_iqk()
1422 reg_ebc = rtl_get_bbreg(hw, 0xebc, MASKDWORD); in _rtl88e_phy_path_b_iqk()
1423 reg_ec4 = rtl_get_bbreg(hw, 0xec4, MASKDWORD); in _rtl88e_phy_path_b_iqk()
1424 reg_ecc = rtl_get_bbreg(hw, 0xecc, MASKDWORD); in _rtl88e_phy_path_b_iqk()
1446 rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000); in _rtl88e_phy_path_a_rx_iqk()
1451 rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x80800000); in _rtl88e_phy_path_a_rx_iqk()
1454 rtl_set_bbreg(hw, RTX_IQK, MASKDWORD, 0x01007c00); in _rtl88e_phy_path_a_rx_iqk()
1455 rtl_set_bbreg(hw, RRX_IQK, MASKDWORD, 0x81004800); in _rtl88e_phy_path_a_rx_iqk()
1458 rtl_set_bbreg(hw, RTX_IQK_TONE_A, MASKDWORD, 0x10008c1c); in _rtl88e_phy_path_a_rx_iqk()
1459 rtl_set_bbreg(hw, RRX_IQK_TONE_A, MASKDWORD, 0x30008c1c); in _rtl88e_phy_path_a_rx_iqk()
1460 rtl_set_bbreg(hw, RTX_IQK_PI_A, MASKDWORD, 0x82160804); in _rtl88e_phy_path_a_rx_iqk()
1461 rtl_set_bbreg(hw, RRX_IQK_PI_A, MASKDWORD, 0x28160000); in _rtl88e_phy_path_a_rx_iqk()
1464 rtl_set_bbreg(hw, RIQK_AGC_RSP, MASKDWORD, 0x0046a911); in _rtl88e_phy_path_a_rx_iqk()
1466 rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf9000000); in _rtl88e_phy_path_a_rx_iqk()
1467 rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf8000000); in _rtl88e_phy_path_a_rx_iqk()
1471 reg_eac = rtl_get_bbreg(hw, RRX_POWER_AFTER_IQK_A_2, MASKDWORD); in _rtl88e_phy_path_a_rx_iqk()
1472 reg_e94 = rtl_get_bbreg(hw, RTX_POWER_BEFORE_IQK_A, MASKDWORD); in _rtl88e_phy_path_a_rx_iqk()
1473 reg_e9c = rtl_get_bbreg(hw, RTX_POWER_AFTER_IQK_A, MASKDWORD); in _rtl88e_phy_path_a_rx_iqk()
1485 rtl_set_bbreg(hw, RTX_IQK, MASKDWORD, u32temp); in _rtl88e_phy_path_a_rx_iqk()
1488 rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000); in _rtl88e_phy_path_a_rx_iqk()
1493 rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x80800000); in _rtl88e_phy_path_a_rx_iqk()
1496 rtl_set_bbreg(hw, RRX_IQK, MASKDWORD, 0x01004800); in _rtl88e_phy_path_a_rx_iqk()
1499 rtl_set_bbreg(hw, RTX_IQK_TONE_A, MASKDWORD, 0x30008c1c); in _rtl88e_phy_path_a_rx_iqk()
1500 rtl_set_bbreg(hw, RRX_IQK_TONE_A, MASKDWORD, 0x10008c1c); in _rtl88e_phy_path_a_rx_iqk()
1501 rtl_set_bbreg(hw, RTX_IQK_PI_A, MASKDWORD, 0x82160c05); in _rtl88e_phy_path_a_rx_iqk()
1502 rtl_set_bbreg(hw, RRX_IQK_PI_A, MASKDWORD, 0x28160c05); in _rtl88e_phy_path_a_rx_iqk()
1505 rtl_set_bbreg(hw, RIQK_AGC_RSP, MASKDWORD, 0x0046a911); in _rtl88e_phy_path_a_rx_iqk()
1507 rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf9000000); in _rtl88e_phy_path_a_rx_iqk()
1508 rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf8000000); in _rtl88e_phy_path_a_rx_iqk()
1512 reg_eac = rtl_get_bbreg(hw, RRX_POWER_AFTER_IQK_A_2, MASKDWORD); in _rtl88e_phy_path_a_rx_iqk()
1513 reg_e94 = rtl_get_bbreg(hw, RTX_POWER_BEFORE_IQK_A, MASKDWORD); in _rtl88e_phy_path_a_rx_iqk()
1514 reg_e9c = rtl_get_bbreg(hw, RTX_POWER_AFTER_IQK_A, MASKDWORD); in _rtl88e_phy_path_a_rx_iqk()
1515 reg_ea4 = rtl_get_bbreg(hw, RRX_POWER_BEFORE_IQK_A_2, MASKDWORD); in _rtl88e_phy_path_a_rx_iqk()
1535 MASKDWORD) >> 22) & 0x3FF; in _rtl88e_phy_path_a_fill_iqk_matrix()
1571 addabackup[i] = rtl_get_bbreg(hw, addareg[i], MASKDWORD); in _rtl88e_phy_save_adda_registers()
1592 rtl_set_bbreg(hw, addareg[i], MASKDWORD, addabackup[i]); in _rtl88e_phy_reload_adda_registers()
1615 rtl_set_bbreg(hw, addareg[0], MASKDWORD, 0x0b1b25a0); in _rtl88e_phy_path_adda_on()
1617 rtl_set_bbreg(hw, addareg[0], MASKDWORD, pathon); in _rtl88e_phy_path_adda_on()
1621 rtl_set_bbreg(hw, addareg[i], MASKDWORD, pathon); in _rtl88e_phy_path_adda_on()
1640 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x0); in _rtl88e_phy_path_a_standby()
1641 rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00010000); in _rtl88e_phy_path_a_standby()
1642 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000); in _rtl88e_phy_path_a_standby()
1650 rtl_set_bbreg(hw, 0x820, MASKDWORD, mode); in _rtl88e_phy_pi_mode_switch()
1651 rtl_set_bbreg(hw, 0x828, MASKDWORD, mode); in _rtl88e_phy_pi_mode_switch()
1756 rtl_set_bbreg(hw, 0xc04, MASKDWORD, 0x03a05600); in _rtl88e_phy_iq_calibrate()
1757 rtl_set_bbreg(hw, 0xc08, MASKDWORD, 0x000800e4); in _rtl88e_phy_iq_calibrate()
1758 rtl_set_bbreg(hw, 0x874, MASKDWORD, 0x22204000); in _rtl88e_phy_iq_calibrate()
1766 rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00010000); in _rtl88e_phy_iq_calibrate()
1767 rtl_set_bbreg(hw, 0x844, MASKDWORD, 0x00010000); in _rtl88e_phy_iq_calibrate()
1771 rtl_set_bbreg(hw, 0xb68, MASKDWORD, 0x0f600000); in _rtl88e_phy_iq_calibrate()
1773 rtl_set_bbreg(hw, 0xb6c, MASKDWORD, 0x0f600000); in _rtl88e_phy_iq_calibrate()
1775 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000); in _rtl88e_phy_iq_calibrate()
1776 rtl_set_bbreg(hw, 0xe40, MASKDWORD, 0x01007c00); in _rtl88e_phy_iq_calibrate()
1777 rtl_set_bbreg(hw, 0xe44, MASKDWORD, 0x81004800); in _rtl88e_phy_iq_calibrate()
1783 result[t][0] = (rtl_get_bbreg(hw, 0xe94, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1785 result[t][1] = (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1796 result[t][2] = (rtl_get_bbreg(hw, 0xea4, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1798 result[t][3] = (rtl_get_bbreg(hw, 0xeac, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1818 MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1821 (rtl_get_bbreg(hw, 0xebc, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1824 (rtl_get_bbreg(hw, 0xec4, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1827 (rtl_get_bbreg(hw, 0xecc, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1833 MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1836 result[t][5] = (rtl_get_bbreg(hw, 0xebc, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1841 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0); in _rtl88e_phy_iq_calibrate()
1854 rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00032ed3); in _rtl88e_phy_iq_calibrate()
1856 rtl_set_bbreg(hw, 0x844, MASKDWORD, 0x00032ed3); in _rtl88e_phy_iq_calibrate()
1857 rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x01008c00); in _rtl88e_phy_iq_calibrate()
1858 rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x01008c00); in _rtl88e_phy_iq_calibrate()