Lines Matching refs:eeprom

105 mt7601u_has_tssi(struct mt7601u_dev *dev, u8 *eeprom)  in mt7601u_has_tssi()  argument
107 u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1); in mt7601u_has_tssi()
113 mt7601u_set_chip_cap(struct mt7601u_dev *dev, u8 *eeprom) in mt7601u_set_chip_cap() argument
115 u16 nic_conf0 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_0); in mt7601u_set_chip_cap()
116 u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1); in mt7601u_set_chip_cap()
121 dev->ee->tssi_enabled = mt7601u_has_tssi(dev, eeprom) && in mt7601u_set_chip_cap()
138 mt7601u_set_macaddr(struct mt7601u_dev *dev, const u8 *eeprom) in mt7601u_set_macaddr() argument
140 const void *src = eeprom + MT_EE_MAC_ADDR; in mt7601u_set_macaddr()
159 u8 *eeprom, u8 max_pwr) in mt7601u_set_channel_target_power() argument
161 u8 trgt_pwr = eeprom[MT_EE_TX_TSSI_TARGET_POWER]; in mt7601u_set_channel_target_power()
173 mt7601u_set_channel_power(struct mt7601u_dev *dev, u8 *eeprom) in mt7601u_set_channel_power() argument
181 if (mt7601u_has_tssi(dev, eeprom)) { in mt7601u_set_channel_power()
182 mt7601u_set_channel_target_power(dev, eeprom, max_pwr); in mt7601u_set_channel_power()
187 s8 power = field_validate(eeprom[MT_EE_TX_POWER_OFFSET + i]); in mt7601u_set_channel_power()
197 mt7601u_set_country_reg(struct mt7601u_dev *dev, u8 *eeprom) in mt7601u_set_country_reg() argument
209 u8 val = eeprom[MT_EE_COUNTRY_REGION]; in mt7601u_set_country_reg()
233 mt7601u_set_rf_freq_off(struct mt7601u_dev *dev, u8 *eeprom) in mt7601u_set_rf_freq_off() argument
237 dev->ee->rf_freq_off = field_validate(eeprom[MT_EE_FREQ_OFFSET]); in mt7601u_set_rf_freq_off()
238 comp = field_validate(eeprom[MT_EE_FREQ_OFFSET_COMPENSATION]); in mt7601u_set_rf_freq_off()
247 mt7601u_set_rssi_offset(struct mt7601u_dev *dev, u8 *eeprom) in mt7601u_set_rssi_offset() argument
253 rssi_offset[i] = eeprom[MT_EE_RSSI_OFFSET + i]; in mt7601u_set_rssi_offset()
337 mt7601u_config_tx_power_per_rate(struct mt7601u_dev *dev, u8 *eeprom) in mt7601u_config_tx_power_per_rate() argument
343 bw40_delta = get_delta(eeprom[MT_EE_TX_POWER_DELTA_BW40]); in mt7601u_config_tx_power_per_rate()
346 val = get_unaligned_le32(eeprom + MT_EE_TX_POWER_BYRATE(i)); in mt7601u_config_tx_power_per_rate()
358 mt7601u_init_tssi_params(struct mt7601u_dev *dev, u8 *eeprom) in mt7601u_init_tssi_params() argument
365 d->slope = eeprom[MT_EE_TX_TSSI_SLOPE]; in mt7601u_init_tssi_params()
366 d->tx0_delta_offset = eeprom[MT_EE_TX_TSSI_OFFSET] * 1024; in mt7601u_init_tssi_params()
367 d->offset[0] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP]; in mt7601u_init_tssi_params()
368 d->offset[1] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP + 1]; in mt7601u_init_tssi_params()
369 d->offset[2] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP + 2]; in mt7601u_init_tssi_params()
375 u8 *eeprom; in mt7601u_eeprom_init() local
386 eeprom = kmalloc(MT7601U_EEPROM_SIZE, GFP_KERNEL); in mt7601u_eeprom_init()
387 if (!eeprom) in mt7601u_eeprom_init()
391 ret = mt7601u_efuse_read(dev, i, eeprom + i, MT_EE_READ); in mt7601u_eeprom_init()
396 if (eeprom[MT_EE_VERSION_EE] > MT7601U_EE_MAX_VER) in mt7601u_eeprom_init()
399 eeprom[MT_EE_VERSION_EE]); in mt7601u_eeprom_init()
401 eeprom[MT_EE_VERSION_EE], eeprom[MT_EE_VERSION_FAE]); in mt7601u_eeprom_init()
403 mt7601u_set_macaddr(dev, eeprom); in mt7601u_eeprom_init()
404 mt7601u_set_chip_cap(dev, eeprom); in mt7601u_eeprom_init()
405 mt7601u_set_channel_power(dev, eeprom); in mt7601u_eeprom_init()
406 mt7601u_set_country_reg(dev, eeprom); in mt7601u_eeprom_init()
407 mt7601u_set_rf_freq_off(dev, eeprom); in mt7601u_eeprom_init()
408 mt7601u_set_rssi_offset(dev, eeprom); in mt7601u_eeprom_init()
409 dev->ee->ref_temp = eeprom[MT_EE_REF_TEMP]; in mt7601u_eeprom_init()
410 dev->ee->lna_gain = eeprom[MT_EE_LNA_GAIN]; in mt7601u_eeprom_init()
412 mt7601u_config_tx_power_per_rate(dev, eeprom); in mt7601u_eeprom_init()
414 mt7601u_init_tssi_params(dev, eeprom); in mt7601u_eeprom_init()
416 kfree(eeprom); in mt7601u_eeprom_init()